Commit 6dc13410 authored by Archit Taneja's avatar Archit Taneja Committed by Rob Clark

dt-bindings: msm/dsi: Add DSIv2 documentation

Add additional property info needed for DSIv2 DT.

Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh@kernel.org>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarArchit Taneja <architt@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent 60834ca1
...@@ -21,10 +21,13 @@ Required properties: ...@@ -21,10 +21,13 @@ Required properties:
* "byte_clk" * "byte_clk"
* "pixel_clk" * "pixel_clk"
* "core_clk" * "core_clk"
For DSIv2, we need an additional clock:
* "src_clk"
- vdd-supply: phandle to vdd regulator device node - vdd-supply: phandle to vdd regulator device node
- vddio-supply: phandle to vdd-io regulator device node - vddio-supply: phandle to vdd-io regulator device node
- vdda-supply: phandle to vdda regulator device node - vdda-supply: phandle to vdda regulator device node
- qcom,dsi-phy: phandle to DSI PHY device node - qcom,dsi-phy: phandle to DSI PHY device node
- syscon-sfpb: A phandle to mmss_sfpb syscon node (only for DSIv2)
Optional properties: Optional properties:
- panel@0: Node of panel connected to this DSI controller. - panel@0: Node of panel connected to this DSI controller.
...@@ -51,6 +54,7 @@ Required properties: ...@@ -51,6 +54,7 @@ Required properties:
* "qcom,dsi-phy-28nm-hpm" * "qcom,dsi-phy-28nm-hpm"
* "qcom,dsi-phy-28nm-lp" * "qcom,dsi-phy-28nm-lp"
* "qcom,dsi-phy-20nm" * "qcom,dsi-phy-20nm"
* "qcom,dsi-phy-28nm-8960"
- reg: Physical base address and length of the registers of PLL, PHY and PHY - reg: Physical base address and length of the registers of PLL, PHY and PHY
regulator regulator
- reg-names: The names of register regions. The following regions are required: - reg-names: The names of register regions. The following regions are required:
......
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