Commit 6e714b58 authored by Marijn Suijten's avatar Marijn Suijten Committed by Stephen Boyd

clk: qcom: gpucc-sdm660: Remove fallback to global clock names

The necessary clocks for this driver are already fully specified in
sdm630 DT under the .fw_name, and do not need an implicit fallback to
their global name.
Signed-off-by: default avatarMarijn Suijten <marijn.suijten@somainline.org>
Link: https://lore.kernel.org/r/20210829204822.289829-5-marijn.suijten@somainline.orgSigned-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 916e9ece
...@@ -44,8 +44,7 @@ static struct clk_branch gpucc_cxo_clk = { ...@@ -44,8 +44,7 @@ static struct clk_branch gpucc_cxo_clk = {
.hw.init = &(struct clk_init_data){ .hw.init = &(struct clk_init_data){
.name = "gpucc_cxo_clk", .name = "gpucc_cxo_clk",
.parent_data = &(const struct clk_parent_data){ .parent_data = &(const struct clk_parent_data){
.fw_name = "xo", .fw_name = "xo"
.name = "xo"
}, },
.num_parents = 1, .num_parents = 1,
.ops = &clk_branch2_ops, .ops = &clk_branch2_ops,
...@@ -101,7 +100,7 @@ static const struct clk_parent_data gpucc_parent_data_1[] = { ...@@ -101,7 +100,7 @@ static const struct clk_parent_data gpucc_parent_data_1[] = {
{ .hw = &gpucc_cxo_clk.clkr.hw }, { .hw = &gpucc_cxo_clk.clkr.hw },
{ .hw = &gpu_pll0_pll_out_main.clkr.hw }, { .hw = &gpu_pll0_pll_out_main.clkr.hw },
{ .hw = &gpu_pll1_pll_out_main.clkr.hw }, { .hw = &gpu_pll1_pll_out_main.clkr.hw },
{ .fw_name = "gcc_gpu_gpll0_clk", .name = "gcc_gpu_gpll0_clk" }, { .fw_name = "gcc_gpu_gpll0_clk" },
}; };
static struct clk_rcg2_gfx3d gfx3d_clk_src = { static struct clk_rcg2_gfx3d gfx3d_clk_src = {
...@@ -154,8 +153,8 @@ static const struct parent_map gpucc_parent_map_0[] = { ...@@ -154,8 +153,8 @@ static const struct parent_map gpucc_parent_map_0[] = {
static const struct clk_parent_data gpucc_parent_data_0[] = { static const struct clk_parent_data gpucc_parent_data_0[] = {
{ .hw = &gpucc_cxo_clk.clkr.hw }, { .hw = &gpucc_cxo_clk.clkr.hw },
{ .fw_name = "gcc_gpu_gpll0_clk", .name = "gcc_gpu_gpll0_clk" }, { .fw_name = "gcc_gpu_gpll0_clk" },
{ .fw_name = "gcc_gpu_gpll0_div_clk", .name = "gcc_gpu_gpll0_div_clk" }, { .fw_name = "gcc_gpu_gpll0_div_clk" },
}; };
static const struct freq_tbl ftbl_rbbmtimer_clk_src[] = { static const struct freq_tbl ftbl_rbbmtimer_clk_src[] = {
......
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