Commit 6ec8765f authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Arnd Bergmann:
 "We have various small DT fixes, and one important regression fix:

  The recent device tree bugfixes that were intended to address issues
  that 'dtc' started warning about in 4.15 fixed various USB PHY device
  nodes, but it turns out that we had code that depended on those nodes
  being incorrect and the probe failing with a particular error code.
  With the workaround we can also deal with correct device nodes.

  The DT fixes include:

   - Allwinner A10 and A20 had the display pipeline set up incorrectly
     (introduced in v4.15)

   - The Altera PMU lacked an interrupt-parent (never worked)

   - Pin muxing on the Openblocks A7 (never worked)

   - Clocks might get set up wrong on Armada 7K/8K (4.15 regression)

  We now have additional device tree patches to address all the
  remaining warnings introduced in 4.15, but decided to queue them for
  4.16 instead, to avoid risking another regression like the USB PHY
  thing mentioned above.

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  phy: work around 'phys' references to usb-nop-xceiv devices
  ARM: sunxi_defconfig: Enable CMA
  arm64: dts: socfpga: add missing interrupt-parent
  ARM: dts: sun[47]i: Fix display backend 1 output to TCON0 remote endpoint
  ARM64: dts: marvell: armada-cp110: Fix clock resources for various node
  ARM: dts: da850-lcdk: Remove leading 0x and 0s from unit address
  ARM: dts: kirkwood: fix pin-muxing of MPP7 on OpenBlocks A7
parents 4917d5df b7563e27
...@@ -293,12 +293,12 @@ partition@0 { ...@@ -293,12 +293,12 @@ partition@0 {
label = "u-boot env"; label = "u-boot env";
reg = <0 0x020000>; reg = <0 0x020000>;
}; };
partition@0x020000 { partition@20000 {
/* The LCDK defaults to booting from this partition */ /* The LCDK defaults to booting from this partition */
label = "u-boot"; label = "u-boot";
reg = <0x020000 0x080000>; reg = <0x020000 0x080000>;
}; };
partition@0x0a0000 { partition@a0000 {
label = "free space"; label = "free space";
reg = <0x0a0000 0>; reg = <0x0a0000 0>;
}; };
......
...@@ -53,7 +53,8 @@ s24c02: s24c02@50 { ...@@ -53,7 +53,8 @@ s24c02: s24c02@50 {
}; };
pinctrl: pin-controller@10000 { pinctrl: pin-controller@10000 {
pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header>; pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header
&pmx_gpio_header_gpo>;
pinctrl-names = "default"; pinctrl-names = "default";
pmx_uart0: pmx-uart0 { pmx_uart0: pmx-uart0 {
...@@ -85,11 +86,16 @@ pmx_dip_switches: pmx-dip-switches { ...@@ -85,11 +86,16 @@ pmx_dip_switches: pmx-dip-switches {
* ground. * ground.
*/ */
pmx_gpio_header: pmx-gpio-header { pmx_gpio_header: pmx-gpio-header {
marvell,pins = "mpp17", "mpp7", "mpp29", "mpp28", marvell,pins = "mpp17", "mpp29", "mpp28",
"mpp35", "mpp34", "mpp40"; "mpp35", "mpp34", "mpp40";
marvell,function = "gpio"; marvell,function = "gpio";
}; };
pmx_gpio_header_gpo: pxm-gpio-header-gpo {
marvell,pins = "mpp7";
marvell,function = "gpo";
};
pmx_gpio_init: pmx-init { pmx_gpio_init: pmx-init {
marvell,pins = "mpp38"; marvell,pins = "mpp38";
marvell,function = "gpio"; marvell,function = "gpio";
......
...@@ -1104,7 +1104,7 @@ be1_out: port@1 { ...@@ -1104,7 +1104,7 @@ be1_out: port@1 {
be1_out_tcon0: endpoint@0 { be1_out_tcon0: endpoint@0 {
reg = <0>; reg = <0>;
remote-endpoint = <&tcon1_in_be0>; remote-endpoint = <&tcon0_in_be1>;
}; };
be1_out_tcon1: endpoint@1 { be1_out_tcon1: endpoint@1 {
......
...@@ -1354,7 +1354,7 @@ be1_out: port@1 { ...@@ -1354,7 +1354,7 @@ be1_out: port@1 {
be1_out_tcon0: endpoint@0 { be1_out_tcon0: endpoint@0 {
reg = <0>; reg = <0>;
remote-endpoint = <&tcon1_in_be0>; remote-endpoint = <&tcon0_in_be1>;
}; };
be1_out_tcon1: endpoint@1 { be1_out_tcon1: endpoint@1 {
......
...@@ -10,6 +10,7 @@ CONFIG_SMP=y ...@@ -10,6 +10,7 @@ CONFIG_SMP=y
CONFIG_NR_CPUS=8 CONFIG_NR_CPUS=8
CONFIG_AEABI=y CONFIG_AEABI=y
CONFIG_HIGHMEM=y CONFIG_HIGHMEM=y
CONFIG_CMA=y
CONFIG_ARM_APPENDED_DTB=y CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ=y
...@@ -33,6 +34,7 @@ CONFIG_CAN_SUN4I=y ...@@ -33,6 +34,7 @@ CONFIG_CAN_SUN4I=y
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y CONFIG_DEVTMPFS_MOUNT=y
CONFIG_DMA_CMA=y
CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SD=y
CONFIG_ATA=y CONFIG_ATA=y
CONFIG_AHCI_SUNXI=y CONFIG_AHCI_SUNXI=y
......
...@@ -66,6 +66,7 @@ pmu { ...@@ -66,6 +66,7 @@ pmu {
<&cpu1>, <&cpu1>,
<&cpu2>, <&cpu2>,
<&cpu3>; <&cpu3>;
interrupt-parent = <&intc>;
}; };
psci { psci {
......
...@@ -63,8 +63,10 @@ config-space@f2000000 { ...@@ -63,8 +63,10 @@ config-space@f2000000 {
cpm_ethernet: ethernet@0 { cpm_ethernet: ethernet@0 {
compatible = "marvell,armada-7k-pp22"; compatible = "marvell,armada-7k-pp22";
reg = <0x0 0x100000>, <0x129000 0xb000>; reg = <0x0 0x100000>, <0x129000 0xb000>;
clocks = <&cpm_clk 1 3>, <&cpm_clk 1 9>, <&cpm_clk 1 5>; clocks = <&cpm_clk 1 3>, <&cpm_clk 1 9>,
clock-names = "pp_clk", "gop_clk", "mg_clk"; <&cpm_clk 1 5>, <&cpm_clk 1 18>;
clock-names = "pp_clk", "gop_clk",
"mg_clk","axi_clk";
marvell,system-controller = <&cpm_syscon0>; marvell,system-controller = <&cpm_syscon0>;
status = "disabled"; status = "disabled";
dma-coherent; dma-coherent;
...@@ -155,7 +157,8 @@ cpm_mdio: mdio@12a200 { ...@@ -155,7 +157,8 @@ cpm_mdio: mdio@12a200 {
#size-cells = <0>; #size-cells = <0>;
compatible = "marvell,orion-mdio"; compatible = "marvell,orion-mdio";
reg = <0x12a200 0x10>; reg = <0x12a200 0x10>;
clocks = <&cpm_clk 1 9>, <&cpm_clk 1 5>; clocks = <&cpm_clk 1 9>, <&cpm_clk 1 5>,
<&cpm_clk 1 6>, <&cpm_clk 1 18>;
status = "disabled"; status = "disabled";
}; };
...@@ -338,8 +341,8 @@ cpm_sdhci0: sdhci@780000 { ...@@ -338,8 +341,8 @@ cpm_sdhci0: sdhci@780000 {
compatible = "marvell,armada-cp110-sdhci"; compatible = "marvell,armada-cp110-sdhci";
reg = <0x780000 0x300>; reg = <0x780000 0x300>;
interrupts = <ICU_GRP_NSR 27 IRQ_TYPE_LEVEL_HIGH>; interrupts = <ICU_GRP_NSR 27 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "core"; clock-names = "core","axi";
clocks = <&cpm_clk 1 4>; clocks = <&cpm_clk 1 4>, <&cpm_clk 1 18>;
dma-coherent; dma-coherent;
status = "disabled"; status = "disabled";
}; };
......
...@@ -63,8 +63,10 @@ config-space@f4000000 { ...@@ -63,8 +63,10 @@ config-space@f4000000 {
cps_ethernet: ethernet@0 { cps_ethernet: ethernet@0 {
compatible = "marvell,armada-7k-pp22"; compatible = "marvell,armada-7k-pp22";
reg = <0x0 0x100000>, <0x129000 0xb000>; reg = <0x0 0x100000>, <0x129000 0xb000>;
clocks = <&cps_clk 1 3>, <&cps_clk 1 9>, <&cps_clk 1 5>; clocks = <&cps_clk 1 3>, <&cps_clk 1 9>,
clock-names = "pp_clk", "gop_clk", "mg_clk"; <&cps_clk 1 5>, <&cps_clk 1 18>;
clock-names = "pp_clk", "gop_clk",
"mg_clk", "axi_clk";
marvell,system-controller = <&cps_syscon0>; marvell,system-controller = <&cps_syscon0>;
status = "disabled"; status = "disabled";
dma-coherent; dma-coherent;
...@@ -155,7 +157,8 @@ cps_mdio: mdio@12a200 { ...@@ -155,7 +157,8 @@ cps_mdio: mdio@12a200 {
#size-cells = <0>; #size-cells = <0>;
compatible = "marvell,orion-mdio"; compatible = "marvell,orion-mdio";
reg = <0x12a200 0x10>; reg = <0x12a200 0x10>;
clocks = <&cps_clk 1 9>, <&cps_clk 1 5>; clocks = <&cps_clk 1 9>, <&cps_clk 1 5>,
<&cps_clk 1 6>, <&cps_clk 1 18>;
status = "disabled"; status = "disabled";
}; };
......
...@@ -410,6 +410,10 @@ static struct phy *_of_phy_get(struct device_node *np, int index) ...@@ -410,6 +410,10 @@ static struct phy *_of_phy_get(struct device_node *np, int index)
if (ret) if (ret)
return ERR_PTR(-ENODEV); return ERR_PTR(-ENODEV);
/* This phy type handled by the usb-phy subsystem for now */
if (of_device_is_compatible(args.np, "usb-nop-xceiv"))
return ERR_PTR(-ENODEV);
mutex_lock(&phy_provider_mutex); mutex_lock(&phy_provider_mutex);
phy_provider = of_phy_provider_lookup(args.np); phy_provider = of_phy_provider_lookup(args.np);
if (IS_ERR(phy_provider) || !try_module_get(phy_provider->owner)) { if (IS_ERR(phy_provider) || !try_module_get(phy_provider->owner)) {
......
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