Commit 6f70a4c3 authored by Ben Skeggs's avatar Ben Skeggs Committed by Dave Airlie

drm/nv50-nvc0: prevent multiple vm/bar flushes occuring simultanenously

The per-vm mutex doesn't prevent this completely, a flush coming from the
BAR VM could potentially happen at the same time as one for the channel
VM.  Not to mention that if/when we get per-client/channel VM, this will
happen far more frequently.
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent ef1b2871
...@@ -403,16 +403,24 @@ nv50_instmem_unmap(struct nouveau_gpuobj *gpuobj) ...@@ -403,16 +403,24 @@ nv50_instmem_unmap(struct nouveau_gpuobj *gpuobj)
void void
nv50_instmem_flush(struct drm_device *dev) nv50_instmem_flush(struct drm_device *dev)
{ {
struct drm_nouveau_private *dev_priv = dev->dev_private;
spin_lock(&dev_priv->ramin_lock);
nv_wr32(dev, 0x00330c, 0x00000001); nv_wr32(dev, 0x00330c, 0x00000001);
if (!nv_wait(dev, 0x00330c, 0x00000002, 0x00000000)) if (!nv_wait(dev, 0x00330c, 0x00000002, 0x00000000))
NV_ERROR(dev, "PRAMIN flush timeout\n"); NV_ERROR(dev, "PRAMIN flush timeout\n");
spin_unlock(&dev_priv->ramin_lock);
} }
void void
nv84_instmem_flush(struct drm_device *dev) nv84_instmem_flush(struct drm_device *dev)
{ {
struct drm_nouveau_private *dev_priv = dev->dev_private;
spin_lock(&dev_priv->ramin_lock);
nv_wr32(dev, 0x070000, 0x00000001); nv_wr32(dev, 0x070000, 0x00000001);
if (!nv_wait(dev, 0x070000, 0x00000002, 0x00000000)) if (!nv_wait(dev, 0x070000, 0x00000002, 0x00000000))
NV_ERROR(dev, "PRAMIN flush timeout\n"); NV_ERROR(dev, "PRAMIN flush timeout\n");
spin_unlock(&dev_priv->ramin_lock);
} }
...@@ -169,7 +169,11 @@ nv50_vm_flush(struct nouveau_vm *vm) ...@@ -169,7 +169,11 @@ nv50_vm_flush(struct nouveau_vm *vm)
void void
nv50_vm_flush_engine(struct drm_device *dev, int engine) nv50_vm_flush_engine(struct drm_device *dev, int engine)
{ {
struct drm_nouveau_private *dev_priv = dev->dev_private;
spin_lock(&dev_priv->ramin_lock);
nv_wr32(dev, 0x100c80, (engine << 16) | 1); nv_wr32(dev, 0x100c80, (engine << 16) | 1);
if (!nv_wait(dev, 0x100c80, 0x00000001, 0x00000000)) if (!nv_wait(dev, 0x100c80, 0x00000001, 0x00000000))
NV_ERROR(dev, "vm flush timeout: engine %d\n", engine); NV_ERROR(dev, "vm flush timeout: engine %d\n", engine);
spin_unlock(&dev_priv->ramin_lock);
} }
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