Commit 708c69e9 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven

pinctrl: sh-pfc: r8a7796: Add R8A77961 PFC support

Add support for the Pin Function Controller in the R-Car M3-W+
(R8A77961) SoC.

R-Car M3-W+ is pin compatible with R-Car M3-W (R8A77960), which allows
for both SoCs to share a driver.
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20191023122955.12420-4-geert+renesas@glider.be
parent d15ca3a3
...@@ -28,6 +28,7 @@ config PINCTRL_SH_PFC ...@@ -28,6 +28,7 @@ config PINCTRL_SH_PFC
select PINCTRL_PFC_R8A7794 if ARCH_R8A7794 select PINCTRL_PFC_R8A7794 if ARCH_R8A7794
select PINCTRL_PFC_R8A7795 if ARCH_R8A7795 select PINCTRL_PFC_R8A7795 if ARCH_R8A7795
select PINCTRL_PFC_R8A77960 if ARCH_R8A77960 || ARCH_R8A7796 select PINCTRL_PFC_R8A77960 if ARCH_R8A77960 || ARCH_R8A7796
select PINCTRL_PFC_R8A77961 if ARCH_R8A77961
select PINCTRL_PFC_R8A77965 if ARCH_R8A77965 select PINCTRL_PFC_R8A77965 if ARCH_R8A77965
select PINCTRL_PFC_R8A77970 if ARCH_R8A77970 select PINCTRL_PFC_R8A77970 if ARCH_R8A77970
select PINCTRL_PFC_R8A77980 if ARCH_R8A77980 select PINCTRL_PFC_R8A77980 if ARCH_R8A77980
...@@ -120,6 +121,9 @@ config PINCTRL_PFC_R8A7795 ...@@ -120,6 +121,9 @@ config PINCTRL_PFC_R8A7795
config PINCTRL_PFC_R8A77960 config PINCTRL_PFC_R8A77960
bool "R-Car M3-W pin control support" if COMPILE_TEST bool "R-Car M3-W pin control support" if COMPILE_TEST
config PINCTRL_PFC_R8A77961
bool "R-Car M3-W+ pin control support" if COMPILE_TEST
config PINCTRL_PFC_R8A77965 config PINCTRL_PFC_R8A77965
bool "R-Car M3-N pin control support" if COMPILE_TEST bool "R-Car M3-N pin control support" if COMPILE_TEST
......
...@@ -21,6 +21,7 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7794) += pfc-r8a7794.o ...@@ -21,6 +21,7 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7794) += pfc-r8a7794.o
obj-$(CONFIG_PINCTRL_PFC_R8A7795) += pfc-r8a7795.o obj-$(CONFIG_PINCTRL_PFC_R8A7795) += pfc-r8a7795.o
obj-$(CONFIG_PINCTRL_PFC_R8A7795) += pfc-r8a7795-es1.o obj-$(CONFIG_PINCTRL_PFC_R8A7795) += pfc-r8a7795-es1.o
obj-$(CONFIG_PINCTRL_PFC_R8A77960) += pfc-r8a7796.o obj-$(CONFIG_PINCTRL_PFC_R8A77960) += pfc-r8a7796.o
obj-$(CONFIG_PINCTRL_PFC_R8A77961) += pfc-r8a7796.o
obj-$(CONFIG_PINCTRL_PFC_R8A77965) += pfc-r8a77965.o obj-$(CONFIG_PINCTRL_PFC_R8A77965) += pfc-r8a77965.o
obj-$(CONFIG_PINCTRL_PFC_R8A77970) += pfc-r8a77970.o obj-$(CONFIG_PINCTRL_PFC_R8A77970) += pfc-r8a77970.o
obj-$(CONFIG_PINCTRL_PFC_R8A77980) += pfc-r8a77980.o obj-$(CONFIG_PINCTRL_PFC_R8A77980) += pfc-r8a77980.o
......
...@@ -587,6 +587,12 @@ static const struct of_device_id sh_pfc_of_table[] = { ...@@ -587,6 +587,12 @@ static const struct of_device_id sh_pfc_of_table[] = {
.data = &r8a77960_pinmux_info, .data = &r8a77960_pinmux_info,
}, },
#endif #endif
#ifdef CONFIG_PINCTRL_PFC_R8A77961
{
.compatible = "renesas,pfc-r8a77961",
.data = &r8a77961_pinmux_info,
},
#endif
#ifdef CONFIG_PINCTRL_PFC_R8A77965 #ifdef CONFIG_PINCTRL_PFC_R8A77965
{ {
.compatible = "renesas,pfc-r8a77965", .compatible = "renesas,pfc-r8a77965",
......
// SPDX-License-Identifier: GPL-2.0 // SPDX-License-Identifier: GPL-2.0
/* /*
* R8A7796 processor support - PFC hardware block. * R8A7796 (R-Car M3-W/W+) support - PFC hardware block.
* *
* Copyright (C) 2016-2019 Renesas Electronics Corp. * Copyright (C) 2016-2019 Renesas Electronics Corp.
* *
...@@ -6236,3 +6236,30 @@ const struct sh_pfc_soc_info r8a77960_pinmux_info = { ...@@ -6236,3 +6236,30 @@ const struct sh_pfc_soc_info r8a77960_pinmux_info = {
.pinmux_data_size = ARRAY_SIZE(pinmux_data), .pinmux_data_size = ARRAY_SIZE(pinmux_data),
}; };
#endif #endif
#ifdef CONFIG_PINCTRL_PFC_R8A77961
const struct sh_pfc_soc_info r8a77961_pinmux_info = {
.name = "r8a77961_pfc",
.ops = &r8a7796_pinmux_ops,
.unlock_reg = 0xe6060000, /* PMMR */
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
.pins = pinmux_pins,
.nr_pins = ARRAY_SIZE(pinmux_pins),
.groups = pinmux_groups.common,
.nr_groups = ARRAY_SIZE(pinmux_groups.common) +
ARRAY_SIZE(pinmux_groups.automotive),
.functions = pinmux_functions.common,
.nr_functions = ARRAY_SIZE(pinmux_functions.common) +
ARRAY_SIZE(pinmux_functions.automotive),
.cfg_regs = pinmux_config_regs,
.drive_regs = pinmux_drive_regs,
.bias_regs = pinmux_bias_regs,
.ioctrl_regs = pinmux_ioctrl_regs,
.pinmux_data = pinmux_data,
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
};
#endif
...@@ -321,6 +321,7 @@ extern const struct sh_pfc_soc_info r8a7794_pinmux_info; ...@@ -321,6 +321,7 @@ extern const struct sh_pfc_soc_info r8a7794_pinmux_info;
extern const struct sh_pfc_soc_info r8a7795_pinmux_info; extern const struct sh_pfc_soc_info r8a7795_pinmux_info;
extern const struct sh_pfc_soc_info r8a7795es1_pinmux_info; extern const struct sh_pfc_soc_info r8a7795es1_pinmux_info;
extern const struct sh_pfc_soc_info r8a77960_pinmux_info; extern const struct sh_pfc_soc_info r8a77960_pinmux_info;
extern const struct sh_pfc_soc_info r8a77961_pinmux_info;
extern const struct sh_pfc_soc_info r8a77965_pinmux_info; extern const struct sh_pfc_soc_info r8a77965_pinmux_info;
extern const struct sh_pfc_soc_info r8a77970_pinmux_info; extern const struct sh_pfc_soc_info r8a77970_pinmux_info;
extern const struct sh_pfc_soc_info r8a77980_pinmux_info; extern const struct sh_pfc_soc_info r8a77980_pinmux_info;
......
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