Commit 710224fa authored by FUJITA Tomonori's avatar FUJITA Tomonori Committed by Linus Torvalds

arm: fix "arm: fix pci_set_consistent_dma_mask for dmabounce devices"

This fixes the regression caused by the commit 6fee48cd
("dma-mapping: arm: use generic pci_set_dma_mask and
pci_set_consistent_dma_mask").

ARM needs to clip the dma coherent mask for dmabounce devices. This
restores the old trick.

Note that strictly speaking, the DMA API doesn't allow architectures to do
such but I'm not sure it's worth adding the new API to set the dma mask
that allows architectures to clip it.
Reported-by: default avatarKrzysztof Halasa <khc@pm.waw.pl>
Signed-off-by: default avatarFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Acked-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent c227e690
...@@ -271,6 +271,14 @@ int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size) ...@@ -271,6 +271,14 @@ int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size)
((dma_addr + size - PHYS_OFFSET) >= SZ_64M); ((dma_addr + size - PHYS_OFFSET) >= SZ_64M);
} }
int dma_set_coherent_mask(struct device *dev, u64 mask)
{
if (mask >= PHYS_OFFSET + SZ_64M - 1)
return 0;
return -EIO;
}
int __init it8152_pci_setup(int nr, struct pci_sys_data *sys) int __init it8152_pci_setup(int nr, struct pci_sys_data *sys)
{ {
it8152_io.start = IT8152_IO_BASE + 0x12000; it8152_io.start = IT8152_IO_BASE + 0x12000;
......
...@@ -503,6 +503,14 @@ struct pci_bus * __devinit ixp4xx_scan_bus(int nr, struct pci_sys_data *sys) ...@@ -503,6 +503,14 @@ struct pci_bus * __devinit ixp4xx_scan_bus(int nr, struct pci_sys_data *sys)
return pci_scan_bus(sys->busnr, &ixp4xx_ops, sys); return pci_scan_bus(sys->busnr, &ixp4xx_ops, sys);
} }
int dma_set_coherent_mask(struct device *dev, u64 mask)
{
if (mask >= SZ_64M - 1)
return 0;
return -EIO;
}
EXPORT_SYMBOL(ixp4xx_pci_read); EXPORT_SYMBOL(ixp4xx_pci_read);
EXPORT_SYMBOL(ixp4xx_pci_write); EXPORT_SYMBOL(ixp4xx_pci_write);
...@@ -26,6 +26,8 @@ ...@@ -26,6 +26,8 @@
#define PCIBIOS_MAX_MEM 0x4BFFFFFF #define PCIBIOS_MAX_MEM 0x4BFFFFFF
#endif #endif
#define ARCH_HAS_DMA_SET_COHERENT_MASK
#define pcibios_assign_all_busses() 1 #define pcibios_assign_all_busses() 1
/* Register locations and bits */ /* Register locations and bits */
......
...@@ -309,7 +309,7 @@ extern unsigned long get_clock_tick_rate(void); ...@@ -309,7 +309,7 @@ extern unsigned long get_clock_tick_rate(void);
#define PCIBIOS_MIN_IO 0 #define PCIBIOS_MIN_IO 0
#define PCIBIOS_MIN_MEM 0 #define PCIBIOS_MIN_MEM 0
#define pcibios_assign_all_busses() 1 #define pcibios_assign_all_busses() 1
#define ARCH_HAS_DMA_SET_COHERENT_MASK
#endif #endif
#endif /* _ASM_ARCH_HARDWARE_H */ #endif /* _ASM_ARCH_HARDWARE_H */
...@@ -6,6 +6,8 @@ ...@@ -6,6 +6,8 @@
#ifndef __ASM_ARM_ARCH_IO_H #ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H
#include <mach/hardware.h>
#define IO_SPACE_LIMIT 0xffffffff #define IO_SPACE_LIMIT 0xffffffff
/* /*
......
...@@ -102,6 +102,9 @@ static inline u64 dma_get_mask(struct device *dev) ...@@ -102,6 +102,9 @@ static inline u64 dma_get_mask(struct device *dev)
return DMA_BIT_MASK(32); return DMA_BIT_MASK(32);
} }
#ifdef ARCH_HAS_DMA_SET_COHERENT_MASK
int dma_set_coherent_mask(struct device *dev, u64 mask);
#else
static inline int dma_set_coherent_mask(struct device *dev, u64 mask) static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
{ {
if (!dma_supported(dev, mask)) if (!dma_supported(dev, mask))
...@@ -109,6 +112,7 @@ static inline int dma_set_coherent_mask(struct device *dev, u64 mask) ...@@ -109,6 +112,7 @@ static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
dev->coherent_dma_mask = mask; dev->coherent_dma_mask = mask;
return 0; return 0;
} }
#endif
extern u64 dma_get_required_mask(struct device *dev); extern u64 dma_get_required_mask(struct device *dev);
......
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