Commit 714a9ac2 authored by Paolo Ciarrocchi's avatar Paolo Ciarrocchi Committed by Ingo Molnar

x86: coding style fixes to arch/x86/kernel/cpu/mcheck/non-fatal.c

Before:
   total: 5 errors, 5 warnings, 91 lines checked
After:
   total: 0 errors, 0 warnings, 94 lines checked

No code changed:

arch/x86/kernel/cpu/mcheck/non-fatal.o:

   text	   data	    bss	    dec	    hex	filename
    441	     80	      4	    525	    20d	non-fatal.o.before
    441	     80	      4	    525	    20d	non-fatal.o.after

md5:
   137bc114d2020ad331d5e76444a2c7d3  non-fatal.o.before.asm
   137bc114d2020ad331d5e76444a2c7d3  non-fatal.o.after.asm
Signed-off-by: default avatarPaolo Ciarrocchi <paolo.ciarrocchi@gmail.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 83e714e8
...@@ -16,7 +16,7 @@ ...@@ -16,7 +16,7 @@
#include <linux/smp.h> #include <linux/smp.h>
#include <linux/module.h> #include <linux/module.h>
#include <asm/processor.h> #include <asm/processor.h>
#include <asm/system.h> #include <asm/system.h>
#include <asm/msr.h> #include <asm/msr.h>
...@@ -26,23 +26,26 @@ static int firstbank; ...@@ -26,23 +26,26 @@ static int firstbank;
#define MCE_RATE 15*HZ /* timer rate is 15s */ #define MCE_RATE 15*HZ /* timer rate is 15s */
static void mce_checkregs (void *info) static void mce_checkregs(void *info)
{ {
u32 low, high; u32 low, high;
int i; int i;
for (i=firstbank; i<nr_mce_banks; i++) { for (i = firstbank; i < nr_mce_banks; i++) {
rdmsr (MSR_IA32_MC0_STATUS+i*4, low, high); rdmsr(MSR_IA32_MC0_STATUS+i*4, low, high);
if (high & (1<<31)) { if (high & (1<<31)) {
printk(KERN_INFO "MCE: The hardware reports a non " printk(KERN_INFO "MCE: The hardware reports a non "
"fatal, correctable incident occurred on " "fatal, correctable incident occurred on "
"CPU %d.\n", "CPU %d.\n",
smp_processor_id()); smp_processor_id());
printk (KERN_INFO "Bank %d: %08x%08x\n", i, high, low); printk(KERN_INFO "Bank %d: %08x%08x\n", i, high, low);
/* Scrub the error so we don't pick it up in MCE_RATE seconds time. */ /*
wrmsr (MSR_IA32_MC0_STATUS+i*4, 0UL, 0UL); * Scrub the error so we don't pick it up in MCE_RATE
* seconds time.
*/
wrmsr(MSR_IA32_MC0_STATUS+i*4, 0UL, 0UL);
/* Serialize */ /* Serialize */
wmb(); wmb();
...@@ -55,10 +58,10 @@ static void mce_work_fn(struct work_struct *work); ...@@ -55,10 +58,10 @@ static void mce_work_fn(struct work_struct *work);
static DECLARE_DELAYED_WORK(mce_work, mce_work_fn); static DECLARE_DELAYED_WORK(mce_work, mce_work_fn);
static void mce_work_fn(struct work_struct *work) static void mce_work_fn(struct work_struct *work)
{ {
on_each_cpu(mce_checkregs, NULL, 1, 1); on_each_cpu(mce_checkregs, NULL, 1, 1);
schedule_delayed_work(&mce_work, round_jiffies_relative(MCE_RATE)); schedule_delayed_work(&mce_work, round_jiffies_relative(MCE_RATE));
} }
static int __init init_nonfatal_mce_checker(void) static int __init init_nonfatal_mce_checker(void)
{ {
......
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