Commit 736ae5c9 authored by Ansuel Smith's avatar Ansuel Smith Committed by Lorenzo Pieralisi

dt-bindings: PCI: qcom: Add missing clks

Document missing clks used in ipq8064 SoC.

Link: https://lore.kernel.org/r/20200615210608.21469-3-ansuelsmth@gmail.comSigned-off-by: default avatarAnsuel Smith <ansuelsmth@gmail.com>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Acked-by: default avatarStanimir Varbanov <svarbanov@mm-sol.com>
parent 8b6f0330
...@@ -90,6 +90,8 @@ ...@@ -90,6 +90,8 @@
Definition: Should contain the following entries Definition: Should contain the following entries
- "core" Clocks the pcie hw block - "core" Clocks the pcie hw block
- "phy" Clocks the pcie PHY block - "phy" Clocks the pcie PHY block
- "aux" Clocks the pcie AUX block
- "ref" Clocks the pcie ref block
- clock-names: - clock-names:
Usage: required for apq8084/ipq4019 Usage: required for apq8084/ipq4019
Value type: <stringlist> Value type: <stringlist>
...@@ -277,8 +279,10 @@ ...@@ -277,8 +279,10 @@
<0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
clocks = <&gcc PCIE_A_CLK>, clocks = <&gcc PCIE_A_CLK>,
<&gcc PCIE_H_CLK>, <&gcc PCIE_H_CLK>,
<&gcc PCIE_PHY_CLK>; <&gcc PCIE_PHY_CLK>,
clock-names = "core", "iface", "phy"; <&gcc PCIE_AUX_CLK>,
<&gcc PCIE_ALT_REF_CLK>;
clock-names = "core", "iface", "phy", "aux", "ref";
resets = <&gcc PCIE_ACLK_RESET>, resets = <&gcc PCIE_ACLK_RESET>,
<&gcc PCIE_HCLK_RESET>, <&gcc PCIE_HCLK_RESET>,
<&gcc PCIE_POR_RESET>, <&gcc PCIE_POR_RESET>,
......
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