Commit 73ad0df5 authored by Codrin Ciubotariu's avatar Codrin Ciubotariu Committed by Mark Brown

ASoC: atmel-i2s: Remove unnecessary audio PLL clock (aclk)

The generated clock (gclk) driver is able to set aclk as its parent and
change its rate alone, if needed. This means that our driver no longer
needs to configure aclk and we can let gclk select and configure its
clock source.
Signed-off-by: default avatarCodrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 563c2632
...@@ -206,7 +206,6 @@ struct atmel_i2s_dev { ...@@ -206,7 +206,6 @@ struct atmel_i2s_dev {
struct regmap *regmap; struct regmap *regmap;
struct clk *pclk; struct clk *pclk;
struct clk *gclk; struct clk *gclk;
struct clk *aclk;
struct snd_dmaengine_dai_dma_data playback; struct snd_dmaengine_dai_dma_data playback;
struct snd_dmaengine_dai_dma_data capture; struct snd_dmaengine_dai_dma_data capture;
unsigned int fmt; unsigned int fmt;
...@@ -303,7 +302,7 @@ static int atmel_i2s_get_gck_param(struct atmel_i2s_dev *dev, int fs) ...@@ -303,7 +302,7 @@ static int atmel_i2s_get_gck_param(struct atmel_i2s_dev *dev, int fs)
{ {
int i, best; int i, best;
if (!dev->gclk || !dev->aclk) { if (!dev->gclk) {
dev_err(dev->dev, "cannot generate the I2S Master Clock\n"); dev_err(dev->dev, "cannot generate the I2S Master Clock\n");
return -EINVAL; return -EINVAL;
} }
...@@ -421,7 +420,7 @@ static int atmel_i2s_switch_mck_generator(struct atmel_i2s_dev *dev, ...@@ -421,7 +420,7 @@ static int atmel_i2s_switch_mck_generator(struct atmel_i2s_dev *dev,
bool enabled) bool enabled)
{ {
unsigned int mr, mr_mask; unsigned int mr, mr_mask;
unsigned long aclk_rate; unsigned long gclk_rate;
int ret; int ret;
mr = 0; mr = 0;
...@@ -445,35 +444,18 @@ static int atmel_i2s_switch_mck_generator(struct atmel_i2s_dev *dev, ...@@ -445,35 +444,18 @@ static int atmel_i2s_switch_mck_generator(struct atmel_i2s_dev *dev,
/* Disable/unprepare the PMC generated clock. */ /* Disable/unprepare the PMC generated clock. */
clk_disable_unprepare(dev->gclk); clk_disable_unprepare(dev->gclk);
/* Disable/unprepare the PLL audio clock. */
clk_disable_unprepare(dev->aclk);
return 0; return 0;
} }
if (!dev->gck_param) if (!dev->gck_param)
return -EINVAL; return -EINVAL;
aclk_rate = dev->gck_param->mck * (dev->gck_param->imckdiv + 1); gclk_rate = dev->gck_param->mck * (dev->gck_param->imckdiv + 1);
/* Fist change the PLL audio clock frequency ... */ ret = clk_set_rate(dev->gclk, gclk_rate);
ret = clk_set_rate(dev->aclk, aclk_rate);
if (ret) if (ret)
return ret; return ret;
/*
* ... then set the PMC generated clock rate to the very same frequency
* to set the gclk parent to aclk.
*/
ret = clk_set_rate(dev->gclk, aclk_rate);
if (ret)
return ret;
/* Prepare and enable the PLL audio clock first ... */
ret = clk_prepare_enable(dev->aclk);
if (ret)
return ret;
/* ... then prepare and enable the PMC generated clock. */
ret = clk_prepare_enable(dev->gclk); ret = clk_prepare_enable(dev->gclk);
if (ret) if (ret)
return ret; return ret;
...@@ -668,28 +650,14 @@ static int atmel_i2s_probe(struct platform_device *pdev) ...@@ -668,28 +650,14 @@ static int atmel_i2s_probe(struct platform_device *pdev)
return err; return err;
} }
/* Get audio clocks to generate the I2S Master Clock (I2S_MCK) */ /* Get audio clock to generate the I2S Master Clock (I2S_MCK) */
dev->aclk = devm_clk_get(&pdev->dev, "aclk");
dev->gclk = devm_clk_get(&pdev->dev, "gclk"); dev->gclk = devm_clk_get(&pdev->dev, "gclk");
if (IS_ERR(dev->aclk) && IS_ERR(dev->gclk)) { if (IS_ERR(dev->gclk)) {
if (PTR_ERR(dev->aclk) == -EPROBE_DEFER || if (PTR_ERR(dev->gclk) == -EPROBE_DEFER)
PTR_ERR(dev->gclk) == -EPROBE_DEFER)
return -EPROBE_DEFER; return -EPROBE_DEFER;
/* Master Mode not supported */ /* Master Mode not supported */
dev->aclk = NULL;
dev->gclk = NULL; dev->gclk = NULL;
} else if (IS_ERR(dev->gclk)) {
err = PTR_ERR(dev->gclk);
dev_err(&pdev->dev,
"failed to get the PMC generated clock: %d\n", err);
return err;
} else if (IS_ERR(dev->aclk)) {
err = PTR_ERR(dev->aclk);
dev_err(&pdev->dev,
"failed to get the PLL audio clock: %d\n", err);
return err;
} }
dev->dev = &pdev->dev; dev->dev = &pdev->dev;
dev->regmap = regmap; dev->regmap = regmap;
platform_set_drvdata(pdev, dev); platform_set_drvdata(pdev, dev);
......
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