Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk

into ppc970.osdl.org:/home/torvalds/v2.6/linux

MAINTAINERS

@@ -287,6 +287,11 @@ P:	Dave Gilbert
 M:	linux@treblig.org
 S:	Maintained
 
+ARM/CORGI MACHINE SUPPORT
+P:	Richard Purdie
+M:	rpurdie@rpsys.net
+S:	Maintained
+
 ARM/PLEB SUPPORT
 P:	Peter Chubb
 M:	pleb@gelato.unsw.edu.au

arch/arm/Kconfig

@@ -234,6 +234,11 @@ config SHARP_LOCOMO
 	depends on SA1100_COLLIE
 	default y
 
+config SHARP_SCOOP
+	bool
+	depends on PXA_SHARPSL
+	default y
+
 config FORCE_MAX_ZONEORDER
 	int
 	depends on SA1111

arch/arm/boot/compressed/Makefile

@@ -46,6 +46,10 @@ ifeq ($(CONFIG_CPU_XSCALE),y)
 OBJS		+= head-xscale.o
 endif
 
+ifeq ($(CONFIG_PXA_SHARPSL),y)
+OBJS		+= head-sharpsl.o
+endif
+
 ifeq ($(CONFIG_DEBUG_ICEDCC),y)
 OBJS            += ice-dcc.o
 endif

arch/arm/boot/compressed/head-sharpsl.S

+/*
+ * linux/arch/arm/boot/compressed/head-sharpsl.S
+ *
+ * Copyright (C) 2004-2005 Richard Purdie <rpurdie@rpsys.net>
+ *
+ * Sharp's bootloader doesn't pass any kind of machine ID
+ * so we have to figure out the machine for ourselves...
+ *
+ * Support for Poodle, Corgi (SL-C700), Shepherd (SL-C750)
+ * and Husky (SL-C760).
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/linkage.h>
+#include <asm/mach-types.h>
+
+#ifndef CONFIG_PXA_SHARPSL
+#error What am I doing here...
+#endif
+
+		.section        ".start", "ax"
+
+__SharpSL_start:
+
+	ldr	r1, .W100ADDR		@ Base address of w100 chip + regs offset
+
+	mov r6, #0x31			@ Load Magic Init value
+	str	r6, [r1, #0x280]	@ to SCRATCH_UMSK
+	mov r5, #0x3000
+.W100LOOP:
+	subs r5, r5, #1
+    bne .W100LOOP
+	mov r6, #0x30			@ Load 2nd Magic Init value
+	str	r6, [r1, #0x280]	@ to SCRATCH_UMSK
+
+	ldr	r6, [r1, #0]		@ Load Chip ID
+	ldr	r3, .W100ID
+	ldr	r7, .POODLEID
+	cmp	r6, r3
+	bne	.SHARPEND			@ We have no w100 - Poodle
+
+	mrc p15, 0, r6, c0, c0	@ Get Processor ID
+	and	r6, r6, #0xffffff00
+	ldr	r7, .CORGIID
+	ldr	r3, .PXA255ID
+	cmp	r6, r3
+	blo	.SHARPEND			@ We have a PXA250 - Corgi
+
+	mov	r1, #0x0c000000		@ Base address of NAND chip
+	ldrb	r3, [r1, #24]	@ Load FLASHCTL
+	bic	r3, r3, #0x11		@ SET NCE
+	orr	r3, r3, #0x0a		@ SET CLR + FLWP
+	strb	r3, [r1, #24]	@ Save to FLASHCTL
+	mov 	r2, #0x90		@ Command "readid"
+	strb	r2, [r1, #20]	@ Save to FLASHIO
+	bic	r3, r3, #2			@ CLR CLE
+	orr	r3, r3, #4			@ SET ALE
+	strb	r3, [r1, #24]	@ Save to FLASHCTL
+	mov		r2, #0			@ Address 0x00
+	strb	r2, [r1, #20]	@ Save to FLASHIO
+	bic	r3, r3, #4			@ CLR ALE
+	strb	r3, [r1, #24]	@ Save to FLASHCTL
+.SHARP1:
+	ldrb	r3, [r1, #24]	@ Load FLASHCTL
+	tst	r3, #32				@ Is chip ready?
+	beq	.SHARP1
+	ldrb	r2, [r1, #20]	@ NAND Manufacturer ID
+	ldrb	r3, [r1, #20]	@ NAND Chip ID
+	ldr	r7, .SHEPHERDID
+	cmp	r3, #0x76			@ 64MiB flash
+	beq	.SHARPEND			@ We have Shepherd
+	ldr	r7, .HUSKYID		@ Must be Husky
+	b .SHARPEND
+
+.PXA255ID:
+	.word	0x69052d00		@ PXA255 Processor ID
+.W100ID:
+	.word	0x57411002		@ w100 Chip ID
+.W100ADDR:
+	.word 	0x08010000		@ w100 Chip ID Reg Address
+.POODLEID:
+	.word	MACH_TYPE_POODLE
+.CORGIID:
+	.word	MACH_TYPE_CORGI
+.SHEPHERDID:
+	.word	MACH_TYPE_SHEPHERD
+.HUSKYID:
+	.word	MACH_TYPE_HUSKY
+.SHARPEND:
+
+

arch/arm/common/Makefile

@@ -11,3 +11,4 @@ obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o
 obj-$(CONFIG_DMABOUNCE)		+= dmabounce.o
 obj-$(CONFIG_TIMER_ACORN)	+= time-acorn.o
 obj-$(CONFIG_SHARP_LOCOMO)	+= locomo.o
+obj-$(CONFIG_SHARP_SCOOP)	+= scoop.o

arch/arm/common/scoop.c

+/*
+ * Support code for the SCOOP interface found on various Sharp PDAs
+ *
+ * Copyright (c) 2004 Richard Purdie
+ *
+ *	Based on code written by Sharp/Lineo for 2.4 kernels
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/device.h>
+#include <asm/io.h>
+#include <asm/hardware/scoop.h>
+
+static void __iomem *scoop_io_base;
+
+#define SCOOP_REG(adr) (*(volatile unsigned short*)(scoop_io_base+(adr)))
+
+void reset_scoop(void)
+{
+	SCOOP_REG(SCOOP_MCR) = 0x0100;	// 00
+	SCOOP_REG(SCOOP_CDR) = 0x0000;  // 04
+	SCOOP_REG(SCOOP_CPR) = 0x0000;  // 0C
+	SCOOP_REG(SCOOP_CCR) = 0x0000;  // 10
+	SCOOP_REG(SCOOP_IMR) = 0x0000;  // 18
+	SCOOP_REG(SCOOP_IRM) = 0x00FF;  // 14
+	SCOOP_REG(SCOOP_ISR) = 0x0000;  // 1C
+	SCOOP_REG(SCOOP_IRM) = 0x0000;
+}
+
+static spinlock_t scoop_lock = SPIN_LOCK_UNLOCKED;
+static u32 scoop_gpwr;
+
+unsigned short set_scoop_gpio(unsigned short bit)
+{
+	unsigned short gpio_bit;
+	unsigned long flag;
+
+	spin_lock_irqsave(&scoop_lock, flag);
+	gpio_bit = SCOOP_REG(SCOOP_GPWR) | bit;
+	SCOOP_REG(SCOOP_GPWR) = gpio_bit;
+	spin_unlock_irqrestore(&scoop_lock, flag);
+
+	return gpio_bit;
+}
+
+unsigned short reset_scoop_gpio(unsigned short bit)
+{
+	unsigned short gpio_bit;
+	unsigned long flag;
+
+	spin_lock_irqsave(&scoop_lock, flag);
+	gpio_bit = SCOOP_REG(SCOOP_GPWR) & ~bit;
+	SCOOP_REG(SCOOP_GPWR) = gpio_bit;
+	spin_unlock_irqrestore(&scoop_lock, flag);
+
+	return gpio_bit;
+}
+
+EXPORT_SYMBOL(set_scoop_gpio);
+EXPORT_SYMBOL(reset_scoop_gpio);
+
+unsigned short read_scoop_reg(unsigned short reg)
+{
+	return SCOOP_REG(reg);
+}
+
+void write_scoop_reg(unsigned short reg, unsigned short data)
+{
+	SCOOP_REG(reg)=data;
+}
+
+EXPORT_SYMBOL(reset_scoop);
+EXPORT_SYMBOL(read_scoop_reg);
+EXPORT_SYMBOL(write_scoop_reg);
+
+static int scoop_suspend(struct device *dev, uint32_t state, uint32_t level)
+{
+	if (level == SUSPEND_POWER_DOWN) {
+		scoop_gpwr = SCOOP_REG(SCOOP_GPWR);
+		SCOOP_REG(SCOOP_GPWR) = 0;
+	}
+	return 0;
+}
+
+static int scoop_resume(struct device *dev, uint32_t level)
+{
+	if (level == RESUME_POWER_ON) {
+		SCOOP_REG(SCOOP_GPWR) = scoop_gpwr;
+	}
+	return 0;
+}
+
+int __init scoop_probe(struct device *dev)
+{
+	struct scoop_config *inf;
+	struct platform_device *pdev = to_platform_device(dev);
+	struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+
+	if (!mem) return -EINVAL;
+
+	inf = dev->platform_data;
+	scoop_io_base = ioremap(mem->start, 0x1000);
+	if (!scoop_io_base) return -ENOMEM;
+
+	SCOOP_REG(SCOOP_MCR) = 0x0140;
+
+	reset_scoop();
+
+	SCOOP_REG(SCOOP_GPCR) = inf->io_dir & 0xffff;
+	SCOOP_REG(SCOOP_GPWR) = inf->io_out & 0xffff;
+
+	return 0;
+}
+
+static struct device_driver scoop_driver = {
+	.name		= "sharp-scoop",
+	.bus		= &platform_bus_type,
+	.probe		= scoop_probe,
+	.suspend	= scoop_suspend,
+	.resume		= scoop_resume,
+};
+
+int __init scoop_init(void)
+{
+	return driver_register(&scoop_driver);
+}
+
+subsys_initcall(scoop_init);

arch/arm/mach-pxa/Kconfig

@@ -18,10 +18,30 @@ config ARCH_PXA_IDP
 	bool "Accelent Xscale IDP"
 	select PXA25x
 
+config PXA_SHARPSL
+	bool "SHARP SL-C7xx Models (Corgi, Shepherd and Husky)"
+	select PXA25x
+	help
+	  Say Y here if you intend to run this kernel on a
+	  Sharp SL-C700 (Corgi), SL-C750 (Shepherd) or a
+	  Sharp SL-C760 (Husky) handheld computer.
+
 endchoice
 
 endmenu
 
+config MACH_CORGI
+	bool "Enable Sharp SL-C700 (Corgi) Support"
+	depends PXA_SHARPSL
+
+config MACH_SHEPHERD
+	bool "Enable Sharp SL-C750 (Shepherd) Support"
+	depends PXA_SHARPSL
+
+config MACH_HUSKY
+	bool "Enable Sharp SL-C760 (Husky) Support"
+	depends PXA_SHARPSL
+
 config PXA25x
 	bool
 	help

arch/arm/mach-pxa/Makefile

@@ -11,6 +11,7 @@ obj-$(CONFIG_PXA27x) += pxa27x.o
 obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o
 obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o
 obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
+obj-$(CONFIG_PXA_SHARPSL)	+= corgi.o
 
 # Support for blinky lights
 led-y := leds.o

arch/arm/mach-pxa/corgi.c

+/*
+ * Support for Sharp SL-C7xx PDAs
+ * Models: SL-C700 (Corgi), SL-C750 (Shepherd), SL-C760 (Husky)
+ *
+ * Copyright (c) 2004-2005 Richard Purdie
+ *
+ * Based on Sharp's 2.4 kernel patches/lubbock.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/major.h>
+#include <linux/fs.h>
+#include <linux/interrupt.h>
+
+#include <asm/setup.h>
+#include <asm/memory.h>
+#include <asm/mach-types.h>
+#include <asm/hardware.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/irq.h>
+#include <asm/arch/corgi.h>
+
+#include <asm/hardware/scoop.h>
+
+#include "generic.h"
+
+extern void corgi_ssp_lcdtg_send (u8 adrs, u8 data);
+
+static void __init corgi_init_irq(void)
+{
+	pxa_init_irq();
+}
+
+static struct resource corgi_scoop_resources[] = {
+	[0] = {
+		.start		= 0x10800000,
+		.end		= 0x10800fff,
+		.flags		= IORESOURCE_MEM,
+	},
+};
+
+static struct scoop_config corgi_scoop_setup = {
+	.io_dir 	= CORGI_SCOOP_IO_DIR,
+	.io_out		= CORGI_SCOOP_IO_OUT,
+};
+
+static struct platform_device corgiscoop_device = {
+	.name		= "sharp-scoop",
+	.id		= -1,
+	.dev		= {
+ 		.platform_data	= &corgi_scoop_setup,
+	},
+	.num_resources	= ARRAY_SIZE(corgi_scoop_resources),
+	.resource	= corgi_scoop_resources,
+};
+
+static struct platform_device *devices[] __initdata = {
+	&corgiscoop_device,
+};
+
+static struct sharpsl_flash_param_info sharpsl_flash_param;
+
+void corgi_get_param(void)
+{
+	sharpsl_flash_param.comadj_keyword = readl(FLASH_MEM_BASE + FLASH_COMADJ_MAGIC_ADR);
+	sharpsl_flash_param.comadj = readl(FLASH_MEM_BASE + FLASH_COMADJ_DATA_ADR);
+
+	sharpsl_flash_param.phad_keyword = readl(FLASH_MEM_BASE + FLASH_PHAD_MAGIC_ADR);
+	sharpsl_flash_param.phadadj = readl(FLASH_MEM_BASE + FLASH_PHAD_DATA_ADR);
+}
+
+static void __init corgi_init(void)
+{
+	platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+static void __init fixup_corgi(struct machine_desc *desc,
+		struct tag *tags, char **cmdline, struct meminfo *mi)
+{
+	corgi_get_param();
+	mi->nr_banks=1;
+	mi->bank[0].start = 0xa0000000;
+	mi->bank[0].node = 0;
+	if (machine_is_corgi())
+		mi->bank[0].size = (32*1024*1024);
+	else
+		mi->bank[0].size = (64*1024*1024);
+}
+
+static struct map_desc corgi_io_desc[] __initdata = {
+/*    virtual     physical    length      */
+/*	{ 0xf1000000, 0x08000000, 0x01000000, MT_DEVICE },*/ /* LCDC (readable for Qt driver) */
+/*	{ 0xef700000, 0x10800000, 0x00001000, MT_DEVICE },*/  /* SCOOP */
+	{ 0xef800000, 0x00000000, 0x00800000, MT_DEVICE }, /* Boot Flash */
+};
+
+static void __init corgi_map_io(void)
+{
+	pxa_map_io();
+	iotable_init(corgi_io_desc,ARRAY_SIZE(corgi_io_desc));
+
+	/* setup sleep mode values */
+	PWER  = 0x00000002;
+	PFER  = 0x00000000;
+	PRER  = 0x00000002;
+	PGSR0 = 0x0158C000;
+	PGSR1 = 0x00FF0080;
+	PGSR2 = 0x0001C004;
+	/* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
+	PCFR |= PCFR_OPDE;
+}
+
+#ifdef CONFIG_MACH_CORGI
+MACHINE_START(CORGI, "SHARP Corgi")
+	BOOT_MEM(0xa0000000, 0x40000000, io_p2v(0x40000000))
+	FIXUP(fixup_corgi)
+	MAPIO(corgi_map_io)
+	INITIRQ(corgi_init_irq)
+	.init_machine = corgi_init,
+	.timer = &pxa_timer,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_SHEPHERD
+MACHINE_START(SHEPHERD, "SHARP Shepherd")
+	BOOT_MEM(0xa0000000, 0x40000000, io_p2v(0x40000000))
+	FIXUP(fixup_corgi)
+	MAPIO(corgi_map_io)
+	INITIRQ(corgi_init_irq)
+	.init_machine = corgi_init,
+	.timer = &pxa_timer,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_HUSKY
+MACHINE_START(HUSKY, "SHARP Husky")
+	BOOT_MEM(0xa0000000, 0x40000000, io_p2v(0x40000000))
+	FIXUP(fixup_corgi)
+	MAPIO(corgi_map_io)
+	INITIRQ(corgi_init_irq)
+	.init_machine = corgi_init,
+	.timer = &pxa_timer,
+MACHINE_END
+#endif
+

arch/arm/mach-s3c2410/s3c2410.c

 /* linux/arch/arm/mach-s3c2410/s3c2410.c
  *
- * Copyright (c) 2003,2004 Simtec Electronics
+ * Copyright (c) 2003-2005 Simtec Electronics
  *	Ben Dooks <ben@simtec.co.uk>
  *
  * http://www.simtec.co.uk/products/EB2410ITX/
@@ -17,6 +17,7 @@
  *     21-Aug-2004 BJD  Added new struct s3c2410_board handler
  *     28-Sep-2004 BJD  Updates for new serial port bits
  *     04-Nov-2004 BJD  Updated UART configuration process
+ *     10-Jan-2004 BJD  Removed s3c2410_clock_tick_rate
 */
 
 #include <linux/kernel.h>
@@ -42,8 +43,6 @@
 #include "cpu.h"
 #include "clock.h"
 
-int s3c2410_clock_tick_rate = 12*1000*1000;  /* current timers at 12MHz */
-
 /* Initial IO mappings */
 
 static struct map_desc s3c2410_iodesc[] __initdata = {

arch/arm/mm/init.c

@@ -15,6 +15,7 @@
 #include <linux/init.h>
 #include <linux/bootmem.h>
 #include <linux/mman.h>
+#include <linux/nodemask.h>
 #include <linux/initrd.h>
 
 #include <asm/mach-types.h>

arch/arm/mm/mm-armv.c

@@ -15,6 +15,7 @@
 #include <linux/init.h>
 #include <linux/bootmem.h>
 #include <linux/highmem.h>
+#include <linux/nodemask.h>
 
 #include <asm/pgalloc.h>
 #include <asm/page.h>

include/asm-arm/arch-pxa/corgi.h

+/*
+ * Hardware specific definitions for SL-C7xx series of PDAs
+ *
+ * Copyright (c) 2004-2005 Richard Purdie
+ *
+ * Based on Sharp's 2.4 kernel patches
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#ifndef __ASM_ARCH_CORGI_H
+#define __ASM_ARCH_CORGI_H  1
+
+
+/*
+ * Corgi GPIO definitions
+ */
+#define CORGI_GPIO_KEY_INT			(0)	/* key interrupt */
+#define CORGI_GPIO_AC_IN			(1)
+#define CORGI_GPIO_WAKEUP			(3)
+#define CORGI_GPIO_AK_INT			(4)	// Remote Controller
+#define CORGI_GPIO_TP_INT			(5)	/* Touch Panel interrupt */
+#define CORGI_GPIO_nSD_CLK			(6)
+#define CORGI_GPIO_nSD_WP			(7)
+#define CORGI_GPIO_nSD_DETECT		(9)
+#define CORGI_GPIO_nSD_INT			(10)
+#define CORGI_GPIO_MAIN_BAT_LOW		(11)
+#define CORGI_GPIO_BAT_COVER		(11)
+#define CORGI_GPIO_LED_ORANGE		(13)
+#define CORGI_GPIO_CF_CD			(14)
+#define CORGI_GPIO_CHRG_FULL		(16)
+#define CORGI_GPIO_CF_IRQ			(17)
+#define CORGI_GPIO_ADC_TEMP_ON		(21)
+#define CORGI_GPIO_IR_ON			(22)
+#define CORGI_GPIO_SD_PWR			(33)
+#define CORGI_GPIO_CHRG_ON			(38)
+#define CORGI_GPIO_DISCHARGE_ON		(42)
+#define CORGI_GPIO_HSYNC			(44)
+#define CORGI_GPIO_USB_PULLUP		(45)
+
+
+/*
+ * Corgi Keyboard Definitions
+ */
+#define CORGI_KEY_STROBE_NUM		(12)
+#define CORGI_KEY_SENSE_NUM			(8)
+#define CORGI_GPIO_ALL_STROBE_BIT	(0x00003ffc)
+#define CORGI_GPIO_HIGH_SENSE_BIT	(0xfc000000)
+#define CORGI_GPIO_HIGH_SENSE_RSHIFT	(26)
+#define CORGI_GPIO_LOW_SENSE_BIT	(0x00000003)
+#define CORGI_GPIO_LOW_SENSE_LSHIFT	(6)
+#define CORGI_GPIO_STROBE_BIT(a)	GPIO_bit(66+(a))
+#define CORGI_GPIO_SENSE_BIT(a)		GPIO_bit(58+(a))
+#define CORGI_GAFR_ALL_STROBE_BIT	(0x0ffffff0)
+#define CORGI_GAFR_HIGH_SENSE_BIT	(0xfff00000)
+#define CORGI_GAFR_LOW_SENSE_BIT	(0x0000000f)
+#define CORGI_GPIO_KEY_SENSE(a)		(58+(a))
+#define CORGI_GPIO_KEY_STROBE(a)	(66+(a))
+
+
+/*
+ * Corgi Interrupts
+ */
+#define CORGI_IRQ_GPIO_KEY_INT		IRQ_GPIO(0)
+#define CORGI_IRQ_GPIO_AC_IN		IRQ_GPIO(1)
+#define CORGI_IRQ_GPIO_WAKEUP		IRQ_GPIO(3)
+#define CORGI_IRQ_GPIO_AK_INT		IRQ_GPIO(4)
+#define CORGI_IRQ_GPIO_TP_INT		IRQ_GPIO(5)
+#define CORGI_IRQ_GPIO_nSD_DETECT	IRQ_GPIO(9)
+#define CORGI_IRQ_GPIO_nSD_INT		IRQ_GPIO(10)
+#define CORGI_IRQ_GPIO_MAIN_BAT_LOW	IRQ_GPIO(11)
+#define CORGI_IRQ_GPIO_CF_CD		IRQ_GPIO(14)
+#define CORGI_IRQ_GPIO_CHRG_FULL	IRQ_GPIO(16)	/* Battery fully charged */
+#define CORGI_IRQ_GPIO_CF_IRQ		IRQ_GPIO(17)
+#define CORGI_IRQ_GPIO_KEY_SENSE(a)	IRQ_GPIO(58+(a))	/* Keyboard Sense lines */
+
+
+/*
+ * Corgi SCOOP GPIOs and Config
+ */
+#define CORGI_SCP_LED_GREEN		SCOOP_GPCR_PA11
+#define CORGI_SCP_SWA			SCOOP_GPCR_PA12  /* Hinge Switch A */
+#define CORGI_SCP_SWB			SCOOP_GPCR_PA13  /* Hinge Switch B */
+#define CORGI_SCP_MUTE_L		SCOOP_GPCR_PA14
+#define CORGI_SCP_MUTE_R		SCOOP_GPCR_PA15
+#define CORGI_SCP_AKIN_PULLUP	SCOOP_GPCR_PA16
+#define CORGI_SCP_APM_ON		SCOOP_GPCR_PA17
+#define CORGI_SCP_BACKLIGHT_CONT	SCOOP_GPCR_PA18
+#define CORGI_SCP_MIC_BIAS		SCOOP_GPCR_PA19
+
+#define CORGI_SCOOP_IO_DIR	( CORGI_SCP_LED_GREEN | CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R | \
+			CORGI_SCP_AKIN_PULLUP | CORGI_SCP_APM_ON | CORGI_SCP_BACKLIGHT_CONT | \
+			CORGI_SCP_MIC_BIAS )
+#define CORGI_SCOOP_IO_OUT	( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R )
+
+/*
+ * Corgi Parameter Area Definitions
+ */
+#define FLASH_MEM_BASE	0xa0000a00
+#define FLASH_MAGIC_CHG(a,b,c,d) ( ( d << 24 ) | ( c << 16 )  | ( b << 8 ) | a )
+
+#define FLASH_COMADJ_MAJIC	FLASH_MAGIC_CHG('C','M','A','D')
+#define	FLASH_COMADJ_MAGIC_ADR	0x00
+#define	FLASH_COMADJ_DATA_ADR	0x04
+
+#define FLASH_PHAD_MAJIC	FLASH_MAGIC_CHG('P','H','A','D')
+#define	FLASH_PHAD_MAGIC_ADR	0x38
+#define	FLASH_PHAD_DATA_ADR	0x3C
+
+struct sharpsl_flash_param_info {
+  unsigned int comadj_keyword;
+  unsigned int comadj;
+
+  unsigned int uuid_keyword;
+  unsigned char uuid[16];
+
+  unsigned int touch_keyword;
+  unsigned int touch1;
+  unsigned int touch2;
+  unsigned int touch3;
+  unsigned int touch4;
+
+  unsigned int adadj_keyword;
+  unsigned int adadj;
+
+  unsigned int phad_keyword;
+  unsigned int phadadj;
+};
+
+#endif /* __ASM_ARCH_CORGI_H  */
+

include/asm-arm/arch-s3c2410/entry-macro.S

@@ -8,16 +8,15 @@
  * warranty of any kind, whether express or implied.
  */
 
-		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
 
-30000:
+	.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
+
 		mov	\tmp, #S3C2410_VA_IRQ
 		ldr	\irqnr, [ \tmp, #0x14 ]		@ get irq no
+30000:
 		teq	\irqnr, #4
 		teqne	\irqnr, #5
 		beq	1002f				@ external irq reg
-		teq	\irqnr, #16
-		beq	1003f				@ lcd controller
 
 		@ debug check to see if interrupt reported is the same
 		@ as the offset....
@@ -29,15 +28,17 @@
 		tst	\irqstat, #1
 		bne	20002f
 
+		/* debug/warning if we get an invalud response from the
+		 * INTOFFSET register */
 #if 1
-		stmfd	r13!, { r0 - r4 , r14 }
-		ldr	r1,	[ \tmp, #0x14 ]		@ intoffset
+		stmfd	r13!, { r0 - r4 , r8-r12, r14 }
+		ldr	r1,	[ \tmp, #0x14 ]		@ INTOFFSET
 		ldr	r2,	[ \tmp, #0x10 ]		@ INTPND
 		ldr	r3,	[ \tmp, #0x00 ]		@ SRCPND
 		adr	r0, 20003f
 		bl	printk
 		b	20004f
-#endif
+
 20003:
 		.ascii	"<7>irq: err - bad offset %d, intpnd=%08x, srcpnd=%08x\n"
 		.byte	0
@@ -45,9 +46,10 @@
 20004:
 		mov	r1, #1
 		mov	\tmp, #S3C2410_VA_IRQ
-		ldmfd	r13!, { r0 - r4 , r14 }
+		ldmfd	r13!, { r0 - r4 , r8-r12, r14 }
+#endif
 
-		@ try working out interript number for ourselves
+		@ try working out interrupt number for ourselves
 		mov	\irqnr, #0
 		ldr	\irqstat, [ \tmp, #0x10 ]	@ INTPND
 10021:
@@ -98,19 +100,6 @@
 
 		@ found no interrupt, set Z flag and leave
 		movs	\irqnr, #0
-		b	1001f
-
-1003:
-		@ lcd interrupt has been asserted...
-		add	\tmp, \tmp, #S3C2410_VA_LCD - S3C2410_VA_IRQ
-		ldr	\irqstat, [ \tmp, # 0x54 ]	@ lcd int pending
-
-		tst	\irqstat, #2
-		movne	\irqnr, #IRQ_LCD_FRAME
-		tst	\irqstat, #1
-		movne	\irqnr, #IRQ_LCD_FIFO
-
-		@ fall through to exit with flags updated
 
 1004:		@ ensure Z flag clear in case our MOVS shifted out the last bit
 		teq	\irqnr, #0

include/asm-arm/arch-s3c2410/timex.h

 /* linux/include/asm-arm/arch-s3c2410/timex.h
  *
- * (c) 2003,2004 Simtec Electronics
+ * (c) 2003-2005 Simtec Electronics
  *  Ben Dooks <ben@simtec.co.uk>
  *
  * S3C2410 - time parameters
@@ -13,21 +13,19 @@
  *  02-Sep-2003 BJD  Created file
  *  05-Jan-2004 BJD  Updated for Linux 2.6.0
  *  22-Nov-2004 BJD  Fixed CLOCK_TICK_RATE
+ *  10-Jan-2004 BJD  Removed s3c2410_clock_tick_rate
 */
 
 #ifndef __ASM_ARCH_TIMEX_H
 #define __ASM_ARCH_TIMEX_H
 
-#if 0
-/* todo - this does not seem to work with 2.6.0 -> division by zero
- * in header files
- */
-extern int s3c2410_clock_tick_rate;
+/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
+ * a variable is useless. It seems as long as we make our timers an
+ * exact multiple of HZ, any value that makes a 1->1 correspondence
+ * for the time conversion functions to/from jiffies is acceptable.
+*/
 
-#define CLOCK_TICK_RATE (s3c2410_clock_tick_rate)
-#endif
 
-/* currently, the BAST uses 12MHz as a base clock rate */
 #define CLOCK_TICK_RATE 12000000
 
 

include/asm-arm/hardware/scoop.h

+/*
+ *  Definitions for the SCOOP interface found on various Sharp PDAs
+ *
+ *  Copyright (c) 2004 Richard Purdie
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ *
+ */
+
+#define SCOOP_MCR  0x00
+#define SCOOP_CDR  0x04
+#define SCOOP_CSR  0x08
+#define SCOOP_CPR  0x0C
+#define SCOOP_CCR  0x10
+#define SCOOP_IRR  0x14
+#define SCOOP_IRM  0x14
+#define SCOOP_IMR  0x18
+#define SCOOP_ISR  0x1C
+#define SCOOP_GPCR 0x20
+#define SCOOP_GPWR 0x24
+#define SCOOP_GPRR 0x28
+
+#define SCOOP_GPCR_PA22	( 1 << 12 )
+#define SCOOP_GPCR_PA21	( 1 << 11 )
+#define SCOOP_GPCR_PA20	( 1 << 10 )
+#define SCOOP_GPCR_PA19	( 1 << 9 )
+#define SCOOP_GPCR_PA18	( 1 << 8 )
+#define SCOOP_GPCR_PA17	( 1 << 7 )
+#define SCOOP_GPCR_PA16	( 1 << 6 )
+#define SCOOP_GPCR_PA15	( 1 << 5 )
+#define SCOOP_GPCR_PA14	( 1 << 4 )
+#define SCOOP_GPCR_PA13	( 1 << 3 )
+#define SCOOP_GPCR_PA12	( 1 << 2 )
+#define SCOOP_GPCR_PA11	( 1 << 1 )
+
+struct scoop_config {
+	unsigned short io_out;
+	unsigned short io_dir;
+};
+
+void reset_scoop(void);
+unsigned short set_scoop_gpio(unsigned short bit);
+unsigned short reset_scoop_gpio(unsigned short bit);
+unsigned short read_scoop_reg(unsigned short reg);
+void write_scoop_reg(unsigned short reg, unsigned short data);