media: i2c: st-vgxy61: Fix regulator counter underflow

Previously regulators were enabled on probe and never again.
However, as regulators are disabled on power off. After a second power off
the regulator counter will underflow. Plus regulators are not required
for probing the sensor, but for streaming.
Fix this by enabling regulators on power on to balance regulator counter
properly.
Signed-off-by: Benjamin Mugnier <benjamin.mugnier@foss.st.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>

drivers/media/i2c/st-vgxy61.c

@@ -1711,6 +1711,13 @@ static int vgxy61_power_on(struct device *dev)
 	struct vgxy61_dev *sensor = to_vgxy61_dev(sd);
 	int ret;
 
+	ret = regulator_bulk_enable(ARRAY_SIZE(vgxy61_supply_name),
+				    sensor->supplies);
+	if (ret) {
+		dev_err(&client->dev, "failed to enable regulators %d\n", ret);
+		return ret;
+	}
+
 	ret = clk_prepare_enable(sensor->xclk);
 	if (ret) {
 		dev_err(&client->dev, "failed to enable clock %d\n", ret);
@@ -1847,13 +1854,6 @@ static int vgxy61_probe(struct i2c_client *client)
 		return ret;
 	}
 
-	ret = regulator_bulk_enable(ARRAY_SIZE(vgxy61_supply_name),
-				    sensor->supplies);
-	if (ret) {
-		dev_err(&client->dev, "failed to enable regulators %d\n", ret);
-		return ret;
-	}
-
 	ret = vgxy61_power_on(dev);
 	if (ret)
 		return ret;