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Commit 74e2c958 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski
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ARM: dts: exynos: Use human-friendly symbols for interrupt properties in exynos4 

Replace hard-coded values of type of GIC interrupt and its flags with
respective macros from header to increase code readability.
Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
parent 9645ab2c
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Showing with 132 additions and 131 deletions
arch/arm/boot/dts/exynos4.dtsi
View file @ 74e2c958
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arch/arm/boot/dts/exynos4210-pinctrl.dtsi
View file @ 74e2c958
...@@ -537,14 +537,14 @@ gpx0: gpx0 { ...@@ -537,14 +537,14 @@ gpx0: gpx0 {
interrupt-controller; interrupt-controller;
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
interrupts = <0 16 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<0 17 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<0 18 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
<0 19 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<0 20 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
<0 21 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
<0 22 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
<0 23 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
...@@ -554,14 +554,14 @@ gpx1: gpx1 { ...@@ -554,14 +554,14 @@ gpx1: gpx1 {
interrupt-controller; interrupt-controller;
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
<0 25 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
<0 26 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
<0 27 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
<0 28 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
<0 29 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
<0 30 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
<0 31 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
......
arch/arm/boot/dts/exynos4210.dtsi
View file @ 74e2c958
...@@ -127,18 +127,18 @@ clock: clock-controller@10030000 { ...@@ -127,18 +127,18 @@ clock: clock-controller@10030000 {
pinctrl_0: pinctrl@11400000 { pinctrl_0: pinctrl@11400000 {
compatible = "samsung,exynos4210-pinctrl"; compatible = "samsung,exynos4210-pinctrl";
reg = <0x11400000 0x1000>; reg = <0x11400000 0x1000>;
interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
}; };
pinctrl_1: pinctrl@11000000 { pinctrl_1: pinctrl@11000000 {
compatible = "samsung,exynos4210-pinctrl"; compatible = "samsung,exynos4210-pinctrl";
reg = <0x11000000 0x1000>; reg = <0x11000000 0x1000>;
interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
wakup_eint: wakeup-interrupt-controller { wakup_eint: wakeup-interrupt-controller {
compatible = "samsung,exynos4210-wakeup-eint"; compatible = "samsung,exynos4210-wakeup-eint";
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
}; };
}; };
...@@ -182,7 +182,7 @@ cpu_alert2: cpu-alert-2 { ...@@ -182,7 +182,7 @@ cpu_alert2: cpu-alert-2 {
g2d: g2d@12800000 { g2d: g2d@12800000 {
compatible = "samsung,s5pv210-g2d"; compatible = "samsung,s5pv210-g2d";
reg = <0x12800000 0x1000>; reg = <0x12800000 0x1000>;
interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>; clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
clock-names = "sclk_fimg2d", "fimg2d"; clock-names = "sclk_fimg2d", "fimg2d";
power-domains = <&pd_lcd0>; power-domains = <&pd_lcd0>;
...@@ -424,22 +424,22 @@ &gic { ...@@ -424,22 +424,22 @@ &gic {
&combiner { &combiner {
samsung,combiner-nr = <16>; samsung,combiner-nr = <16>;
interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<0 1 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
<0 2 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<0 3 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<0 4 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<0 5 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<0 6 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<0 7 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
<0 8 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<0 9 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<0 10 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
<0 11 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<0 12 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<0 13 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
<0 14 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
<0 15 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
}; };
&mdma1 { &mdma1 {
......
arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
View file @ 74e2c958
...@@ -572,14 +572,14 @@ gpx0: gpx0 { ...@@ -572,14 +572,14 @@ gpx0: gpx0 {
interrupt-controller; interrupt-controller;
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
interrupts = <0 16 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<0 17 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<0 18 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
<0 19 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<0 20 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
<0 21 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
<0 22 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
<0 23 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
...@@ -589,14 +589,14 @@ gpx1: gpx1 { ...@@ -589,14 +589,14 @@ gpx1: gpx1 {
interrupt-controller; interrupt-controller;
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
<0 25 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
<0 26 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
<0 27 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
<0 28 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
<0 29 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
<0 30 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
<0 31 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
......
arch/arm/boot/dts/exynos4x12.dtsi
View file @ 74e2c958
...@@ -112,7 +112,7 @@ adc: adc@126C0000 { ...@@ -112,7 +112,7 @@ adc: adc@126C0000 {
g2d: g2d@10800000 { g2d: g2d@10800000 {
compatible = "samsung,exynos4212-g2d"; compatible = "samsung,exynos4212-g2d";
reg = <0x10800000 0x1000>; reg = <0x10800000 0x1000>;
interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>; clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
clock-names = "sclk_fimg2d", "fimg2d"; clock-names = "sclk_fimg2d", "fimg2d";
iommus = <&sysmmu_g2d>; iommus = <&sysmmu_g2d>;
...@@ -127,7 +127,7 @@ camera { ...@@ -127,7 +127,7 @@ camera {
fimc_lite_0: fimc-lite@12390000 { fimc_lite_0: fimc-lite@12390000 {
compatible = "samsung,exynos4212-fimc-lite"; compatible = "samsung,exynos4212-fimc-lite";
reg = <0x12390000 0x1000>; reg = <0x12390000 0x1000>;
interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_isp>; power-domains = <&pd_isp>;
clocks = <&clock CLK_FIMC_LITE0>; clocks = <&clock CLK_FIMC_LITE0>;
clock-names = "flite"; clock-names = "flite";
...@@ -138,7 +138,7 @@ fimc_lite_0: fimc-lite@12390000 { ...@@ -138,7 +138,7 @@ fimc_lite_0: fimc-lite@12390000 {
fimc_lite_1: fimc-lite@123A0000 { fimc_lite_1: fimc-lite@123A0000 {
compatible = "samsung,exynos4212-fimc-lite"; compatible = "samsung,exynos4212-fimc-lite";
reg = <0x123A0000 0x1000>; reg = <0x123A0000 0x1000>;
interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_isp>; power-domains = <&pd_isp>;
clocks = <&clock CLK_FIMC_LITE1>; clocks = <&clock CLK_FIMC_LITE1>;
clock-names = "flite"; clock-names = "flite";
...@@ -149,8 +149,8 @@ fimc_lite_1: fimc-lite@123A0000 { ...@@ -149,8 +149,8 @@ fimc_lite_1: fimc-lite@123A0000 {
fimc_is: fimc-is@12000000 { fimc_is: fimc-is@12000000 {
compatible = "samsung,exynos4212-fimc-is", "simple-bus"; compatible = "samsung,exynos4212-fimc-is", "simple-bus";
reg = <0x12000000 0x260000>; reg = <0x12000000 0x260000>;
interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
<0 95 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_isp>; power-domains = <&pd_isp>;
clocks = <&clock CLK_FIMC_LITE0>, clocks = <&clock CLK_FIMC_LITE0>,
<&clock CLK_FIMC_LITE1>, <&clock CLK_PPMUISPX>, <&clock CLK_FIMC_LITE1>, <&clock CLK_PPMUISPX>,
...@@ -201,7 +201,7 @@ i2c1_isp: i2c-isp@12140000 { ...@@ -201,7 +201,7 @@ i2c1_isp: i2c-isp@12140000 {
mshc_0: mmc@12550000 { mshc_0: mmc@12550000 {
compatible = "samsung,exynos4412-dw-mshc"; compatible = "samsung,exynos4412-dw-mshc";
reg = <0x12550000 0x1000>; reg = <0x12550000 0x1000>;
interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
fifo-depth = <0x80>; fifo-depth = <0x80>;
...@@ -462,26 +462,26 @@ opp@100000000 { ...@@ -462,26 +462,26 @@ opp@100000000 {
}; };
&combiner { &combiner {
interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<0 1 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
<0 2 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<0 3 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<0 4 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<0 5 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<0 6 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<0 7 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
<0 8 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<0 9 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<0 10 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
<0 11 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<0 12 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<0 13 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
<0 14 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
<0 15 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
<0 107 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
<0 108 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
<0 48 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
<0 42 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
}; };
&exynos_usbphy { &exynos_usbphy {
...@@ -545,18 +545,18 @@ &mixer { ...@@ -545,18 +545,18 @@ &mixer {
&pinctrl_0 { &pinctrl_0 {
compatible = "samsung,exynos4x12-pinctrl"; compatible = "samsung,exynos4x12-pinctrl";
reg = <0x11400000 0x1000>; reg = <0x11400000 0x1000>;
interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
}; };
&pinctrl_1 { &pinctrl_1 {
compatible = "samsung,exynos4x12-pinctrl"; compatible = "samsung,exynos4x12-pinctrl";
reg = <0x11000000 0x1000>; reg = <0x11000000 0x1000>;
interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
wakup_eint: wakeup-interrupt-controller { wakup_eint: wakeup-interrupt-controller {
compatible = "samsung,exynos4210-wakeup-eint"; compatible = "samsung,exynos4210-wakeup-eint";
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
}; };
}; };
...@@ -570,7 +570,7 @@ &pinctrl_2 { ...@@ -570,7 +570,7 @@ &pinctrl_2 {
&pinctrl_3 { &pinctrl_3 {
compatible = "samsung,exynos4x12-pinctrl"; compatible = "samsung,exynos4x12-pinctrl";
reg = <0x106E0000 0x1000>; reg = <0x106E0000 0x1000>;
interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
}; };
&pmu_system_controller { &pmu_system_controller {
......
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