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Commit 75de290e authored by Greg Ungerer's avatar Greg Ungerer Committed by Linus Torvalds
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[PATCH] reformat m68knommu 68360/uCquicc crt0_ram.S 

This patch reformats the 68360 crt_ram.S file to make it consistent
with the other m68knommu assembler files, and generally to good
style standards :-)
parent bf68af96
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Showing with 107 additions and 114 deletions
arch/m68knommu/platform/68360/uCquicc/crt0_ram.S
View file @ 75de290e
...@@ -15,7 +15,6 @@ ...@@ -15,7 +15,6 @@
#include <linux/config.h> #include <linux/config.h>
.global _stext .global _stext
.global __bss_start
.global _start .global _start
.global _rambase .global _rambase
...@@ -26,7 +25,6 @@ ...@@ -26,7 +25,6 @@
.global _quicc_base .global _quicc_base
.global _periph_base .global _periph_base
.global _dprbase
#define REGB 0x1000 #define REGB 0x1000
#define PEPAR (_dprbase + REGB + 0x0016) #define PEPAR (_dprbase + REGB + 0x0016)
...@@ -94,63 +92,62 @@ ...@@ -94,63 +92,62 @@
#include <asm/m68360_regs.h> #include <asm/m68360_regs.h>
/* By the time this RAM specific code begins to execute, DPRAM /*
* and DRAM should already be mapped and accessible. */ * By the time this RAM specific code begins to execute, DPRAM
* and DRAM should already be mapped and accessible.
*/
.text .text
_start: _start:
_stext: _stext:
nop nop
ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */ ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */
/* We should not need to setup the boot stack the reset should do it. */ /* We should not need to setup the boot stack the reset should do it. */
movea.l #_boot_stack, %sp /*set up stack at the end of DRAM:*/ movea.l #__ramend, %sp /*set up stack at the end of DRAM:*/
set_mbar_register: set_mbar_register:
moveq.l #0x07, %d1 /* Setup MBAR */ moveq.l #0x07, %d1 /* Setup MBAR */
movec %d1, %dfc movec %d1, %dfc
lea.l MCU_SIM_MBAR_ADRS, %a0 lea.l MCU_SIM_MBAR_ADRS, %a0
move.l #_dprbase, %d0 move.l #_dprbase, %d0
andi.l #MCU_SIM_MBAR_BA_MASK, %d0 andi.l #MCU_SIM_MBAR_BA_MASK, %d0
ori.l #MCU_SIM_MBAR_AS_MASK, %d0 ori.l #MCU_SIM_MBAR_AS_MASK, %d0
moves.l %d0, %a0@ moves.l %d0, %a0@
moveq.l #0x05, %d1 moveq.l #0x05, %d1
movec.l %d1, %dfc movec.l %d1, %dfc
/* Now we can begin to access registers in DPRAM */ /* Now we can begin to access registers in DPRAM */
set_sim_mcr: set_sim_mcr:
/* Set Module Configuration Register */ /* Set Module Configuration Register */
move.l #MCU_SIM_MCR, MCR move.l #MCU_SIM_MCR, MCR
/* to do: Determine cause of reset */ /* to do: Determine cause of reset */
/*
/* * configure system clock MC68360 p. 6-40
* configure system clock MC68360 p. 6-40 * (value +1)*osc/128 = system clock
* (value +1)*osc/128 = system clock */
*/
set_sim_clock: set_sim_clock:
move.w #MCU_SIM_PLLCR, PLLCR move.w #MCU_SIM_PLLCR, PLLCR
move.b #MCU_SIM_CLKOCR, CLKOCR move.b #MCU_SIM_CLKOCR, CLKOCR
move.w #MCU_SIM_CDVCR, CDVCR move.w #MCU_SIM_CDVCR, CDVCR
// Wait for the PLL to settle /* Wait for the PLL to settle */
move.w #16384, %d0 move.w #16384, %d0
pll_settle_wait: pll_settle_wait:
subi.w #1, %d0 subi.w #1, %d0
bne pll_settle_wait bne pll_settle_wait
/* Setup the system protection register, and watchdog timer register */ /* Setup the system protection register, and watchdog timer register */
move.b #MCU_SIM_SWIV, SWIV
move.w #MCU_SIM_PICR, PICR
move.w #MCU_SIM_PITR, PITR
move.w #MCU_SIM_SYPCR, SYPCR
move.b #MCU_SIM_SWIV, SWIV /* Clear DPRAM - system + parameter */
move.w #MCU_SIM_PICR, PICR
move.w #MCU_SIM_PITR, PITR
move.w #MCU_SIM_SYPCR, SYPCR
/* Clear DPRAM - system + parameter */
movea.l #_dprbase, %a0 movea.l #_dprbase, %a0
movea.l #_dprbase+0x2000, %a1 movea.l #_dprbase+0x2000, %a1
...@@ -161,72 +158,68 @@ clear_dpram: ...@@ -161,72 +158,68 @@ clear_dpram:
bhi clear_dpram bhi clear_dpram
configure_memory_controller: configure_memory_controller:
/* /* Set up Global Memory Register (GMR) */
* Set up Global Memory Register (GMR) move.l #MCU_SIM_GMR, %d0
*/ move.l %d0, GMR
move.l #MCU_SIM_GMR, %d0
move.l %d0, GMR
configure_chip_select_0: configure_chip_select_0:
move.l #__ramend, %d0 move.l #__ramend, %d0
subi.l #__ramstart, %d0 subi.l #__ramstart, %d0
subq.l #0x01, %d0 subq.l #0x01, %d0
eori.l #SIM_OR_MASK, %d0 eori.l #SIM_OR_MASK, %d0
ori.l #SIM_OR0_MASK, %d0 ori.l #SIM_OR0_MASK, %d0
move.l %d0, OR0 move.l %d0, OR0
move.l #__ramstart, %d0
ori.l #SIM_BR0_MASK, %d0
move.l %d0, BR0
move.l #__ramstart, %d0
ori.l #SIM_BR0_MASK, %d0
move.l %d0, BR0
configure_chip_select_1: configure_chip_select_1:
move.l #__flashend, %d0 move.l #__rom_end, %d0
subi.l #__flashstart, %d0 subi.l #__rom_start, %d0
subq.l #0x01, %d0 subq.l #0x01, %d0
eori.l #SIM_OR_MASK, %d0 eori.l #SIM_OR_MASK, %d0
ori.l #SIM_OR1_MASK, %d0 ori.l #SIM_OR1_MASK, %d0
move.l %d0, OR1 move.l %d0, OR1
move.l #__flashstart, %d0 move.l #__rom_start, %d0
ori.l #SIM_BR1_MASK, %d0 ori.l #SIM_BR1_MASK, %d0
move.l %d0, BR1 move.l %d0, BR1
move.w #MCU_SIM_PEPAR, PEPAR
move.w #MCU_SIM_PEPAR, PEPAR
/* point to vector table: */
/* point to vector table: */ move.l #_romvec, %a0
move.l #_romvec, %a0 move.l #_ramvec, %a1
move.l #_ramvec, %a1
copy_vectors: copy_vectors:
move.l %a0@, %d0 move.l %a0@, %d0
move.l %d0, %a1@ move.l %d0, %a1@
move.l %a0@, %a1@ move.l %a0@, %a1@
addq.l #0x04, %a0 addq.l #0x04, %a0
addq.l #0x04, %a1 addq.l #0x04, %a1
cmp.l #_start, %a0 cmp.l #_start, %a0
blt copy_vectors blt copy_vectors
move.l #_ramvec, %a1 move.l #_ramvec, %a1
movec %a1, %vbr movec %a1, %vbr
/* Copy data segment from ROM to RAM */ /* Copy data segment from ROM to RAM */
moveal #__data_rom_start, %a0 moveal #_stext, %a0
moveal #__data_start, %a1 moveal #_sdata, %a1
moveal #__data_end, %a2 moveal #_edata, %a2
/* Copy %a0 to %a1 until %a1 == %a2 */ /* Copy %a0 to %a1 until %a1 == %a2 */
LD1: LD1:
move.l %a0@, %d0 move.l %a0@, %d0
addq.l #0x04, %a0 addq.l #0x04, %a0
move.l %d0, %a1@ move.l %d0, %a1@
addq.l #0x04, %a1 addq.l #0x04, %a1
cmp.l #__data_end, %a1 cmp.l #_edata, %a1
blt LD1 blt LD1
moveal #__bss_start, %a0 moveal #_sbss, %a0
moveal #end, %a1 moveal #_ebss, %a1
/* Copy 0 to %a0 until %a0 == %a1 */ /* Copy 0 to %a0 until %a0 == %a1 */
L1: L1:
...@@ -235,21 +228,21 @@ L1: ...@@ -235,21 +228,21 @@ L1:
bhi L1 bhi L1
load_quicc: load_quicc:
move.l #_dprbase, _quicc_base move.l #_dprbase, _quicc_base
store_ram_size: store_ram_size:
/* Set ram size information */ /* Set ram size information */
move.l #_sdata, _rambase move.l #_sdata, _rambase
move.l #end, _ramstart move.l #_ebss, _ramstart
move.l #__ramend, %d0 move.l #__ramend, %d0
sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/ sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
move.l %d0, _ramend /* Different from __ramend.*/ move.l %d0, _ramend /* Different from __ramend.*/
store_flash_size: store_flash_size:
/* Set rom size information */ /* Set rom size information */
move.l #__flashend, %d0 move.l #__rom_end, %d0
sub.l #__flashstart, %d0 sub.l #__rom_start, %d0
move.l %d0, rom_length move.l %d0, rom_length
pea 0 pea 0
pea env pea env
...@@ -260,17 +253,14 @@ store_flash_size: ...@@ -260,17 +253,14 @@ store_flash_size:
lea 0x2000(%a2), %sp lea 0x2000(%a2), %sp
lp: lp:
jsr start_kernel jsr start_kernel
/* jmp lp */
_exit: _exit:
jmp _exit jmp _exit
.data .data
.align 4 .align 4
env: env:
.long 0 .long 0
_quicc_base: _quicc_base:
...@@ -278,13 +268,16 @@ _quicc_base: ...@@ -278,13 +268,16 @@ _quicc_base:
_periph_base: _periph_base:
.long 0 .long 0
_ramvec: _ramvec:
.long 0 .long 0
_rambase: _rambase:
.long 0 .long 0
_ramstart: _ramstart:
.long 0 .long 0
_ramend: _ramend:
.long 0 .long 0
_dprbase:
.long 0xffffe000
.text .text
/* /*
...@@ -293,7 +286,7 @@ _ramend: ...@@ -293,7 +286,7 @@ _ramend:
*/ */
.section ".data.initvect","awx" .section ".data.initvect","awx"
.long _boot_stack /* Reset: Initial Stack Pointer - 0. */ .long __ramend /* Reset: Initial Stack Pointer - 0. */
.long _start /* Reset: Initial Program Counter - 1. */ .long _start /* Reset: Initial Program Counter - 1. */
.long buserr /* Bus Error - 2. */ .long buserr /* Bus Error - 2. */
.long trap /* Address Error - 3. */ .long trap /* Address Error - 3. */
......
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