Commit 767b80a9 authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz Committed by Linus Torvalds

[PATCH] asm/ide.h: ide_ioreg_t cleanup

ide_ioreg_t is deprecated and hasn't been used by IDE driver for some time.
Use unsigned long directly on alpha, arm26, arm, mips, parisc, ppc64 and sh.

asm-ia64/ide.h (ide_ioreg_t is unsigned short) and asm-m68knommu/ide.h
(broken - ide_ioreg_t is not defined) are the only users of ide_ioreg_t left.
parent 76fff7db
......@@ -19,7 +19,7 @@
#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
#endif
static __inline__ int ide_default_irq(ide_ioreg_t base)
static inline int ide_default_irq(unsigned long base)
{
switch (base) {
case 0x1f0: return 14;
......@@ -31,7 +31,7 @@ static __inline__ int ide_default_irq(ide_ioreg_t base)
}
}
static __inline__ ide_ioreg_t ide_default_io_base(int index)
static inline unsigned long ide_default_io_base(int index)
{
switch (index) {
case 0: return 0x1f0;
......@@ -43,9 +43,10 @@ static __inline__ ide_ioreg_t ide_default_io_base(int index)
}
}
static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port, ide_ioreg_t ctrl_port, int *irq)
static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
unsigned long ctrl_port, int *irq)
{
ide_ioreg_t reg = data_port;
unsigned long reg = data_port;
int i;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
......
......@@ -13,10 +13,10 @@
* Set up a hw structure for a specified data port, control port and IRQ.
* This should follow whatever the default interface uses.
*/
static __inline__ void
ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
unsigned long ctrl_port, int *irq)
{
ide_ioreg_t reg = data_port;
unsigned long reg = data_port;
int i;
memset(hw, 0, sizeof(*hw));
......
......@@ -16,17 +16,17 @@
* Set up a hw structure for a specified data port, control port and IRQ.
* This should follow whatever the default interface uses.
*/
static __inline__ void
ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
unsigned long ctrl_port, int *irq)
{
ide_ioreg_t reg = (ide_ioreg_t) data_port;
unsigned long reg = data_port;
int i;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
hw->io_ports[i] = reg;
reg += 1;
}
hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port;
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
if (irq)
*irq = 0;
}
......
......@@ -18,23 +18,21 @@
* Set up a hw structure for a specified data port, control port and IRQ.
* This should follow whatever the default interface uses.
*/
static __inline__ void
ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
unsigned long ctrl_port, int *irq)
{
ide_ioreg_t reg;
unsigned long reg = data_port;
int i;
int regincr = 1;
memset(hw, 0, sizeof(*hw));
reg = (ide_ioreg_t)data_port;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
hw->io_ports[i] = reg;
reg += regincr;
}
hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port;
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
if (irq) *irq = 0;
}
......
......@@ -12,8 +12,8 @@
* Set up a hw structure for a specified data port, control port and IRQ.
* This should follow whatever the default interface uses.
*/
static __inline__ void
ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
unsigned long ctrl_port, int *irq)
{
}
......
......@@ -12,17 +12,17 @@
* Set up a hw structure for a specified data port, control port and IRQ.
* This should follow whatever the default interface uses.
*/
static __inline__ void
ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
unsigned long ctrl_port, int *irq)
{
ide_ioreg_t reg = (ide_ioreg_t) data_port;
unsigned long reg = data_port;
int i;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
hw->io_ports[i] = reg;
reg += 1;
}
hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port;
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
if (irq)
*irq = 0;
}
......
......@@ -23,23 +23,21 @@
* Set up a hw structure for a specified data port, control port and IRQ.
* This should follow whatever the default interface uses.
*/
static __inline__ void
ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
unsigned long ctrl_port, int *irq)
{
ide_ioreg_t reg;
unsigned long reg = data_port;
int i;
int regincr = 1;
memset(hw, 0, sizeof(*hw));
reg = (ide_ioreg_t)data_port;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
hw->io_ports[i] = reg;
reg += regincr;
}
hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port;
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
if (irq)
*irq = 0;
......
......@@ -16,10 +16,10 @@
* Set up a hw structure for a specified data port, control port and IRQ.
* This should follow whatever the default interface uses.
*/
static __inline__ void
ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
unsigned long ctrl_port, int *irq)
{
ide_ioreg_t reg = (ide_ioreg_t) data_port;
unsigned long reg = data_port;
int i;
memset(hw, 0, sizeof(*hw));
......@@ -28,7 +28,7 @@ ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
hw->io_ports[i] = reg;
reg += 1;
}
hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port;
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
if (irq)
*irq = 0;
}
......
......@@ -23,10 +23,10 @@
* This should follow whatever the default interface uses.
*/
static __inline__ void
ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
unsigned long ctrl_port, int *irq)
{
ide_ioreg_t reg = (ide_ioreg_t) data_port;
unsigned long reg = data_port;
int i;
memset(hw, 0, sizeof(*hw));
......@@ -35,7 +35,7 @@ ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
hw->io_ports[i] = reg;
reg += 1;
}
hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port;
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
if (irq)
*irq = 0;
}
......
......@@ -19,10 +19,10 @@
* Set up a hw structure for a specified data port, control port and IRQ.
* This should follow whatever the default interface uses.
*/
static __inline__ void
ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
unsigned long ctrl_port, int *irq)
{
ide_ioreg_t reg;
unsigned long reg = data_port;
int i;
int regincr = 1;
......@@ -36,14 +36,12 @@ ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
memset(hw, 0, sizeof(*hw));
reg = (ide_ioreg_t)data_port;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
hw->io_ports[i] = reg;
reg += regincr;
}
hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port;
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
if (irq)
*irq = 0;
......
......@@ -14,10 +14,10 @@
* Set up a hw structure for a specified data port, control port and IRQ.
* This should follow whatever the default interface uses.
*/
static __inline__ void
ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
unsigned long ctrl_port, int *irq)
{
ide_ioreg_t reg = (ide_ioreg_t) data_port;
unsigned long reg = data_port;
int i;
memset(hw, 0, sizeof(*hw));
......@@ -26,7 +26,7 @@ ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
hw->io_ports[i] = reg;
reg += 1;
}
hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port;
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
if (irq)
*irq = 0;
}
......
......@@ -23,7 +23,7 @@
* We always use the new IDE port registering,
* so these are fixed here.
*/
#define ide_default_io_base(i) ((ide_ioreg_t)0)
#define ide_default_io_base(i) (0)
#define ide_default_irq(b) (0)
#define __ide_mm_insw(port,addr,len) readsw(port,addr,len)
......
......@@ -30,17 +30,17 @@
* Set up a hw structure for a specified data port, control port and IRQ.
* This should follow whatever the default interface uses.
*/
static __inline__ void
ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
unsigned long ctrl_port, int *irq)
{
ide_ioreg_t reg = (ide_ioreg_t) data_port;
unsigned long reg = data_port;
int i;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
hw->io_ports[i] = reg;
reg += 1;
}
hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port;
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
if (irq)
*irq = 0;
}
......@@ -67,7 +67,7 @@ static __inline__ void ide_init_default_hwifs(void)
* We always use the new IDE port registering,
* so these are fixed here.
*/
#define ide_default_io_base(i) ((ide_ioreg_t)0)
#define ide_default_io_base(i) (0)
#define ide_default_irq(b) (0)
#endif /* __KERNEL__ */
......
......@@ -34,7 +34,7 @@ static inline int ide_default_irq(unsigned long base)
}
}
static inline ide_ioreg_t ide_default_io_base(int index)
static inline unsigned long ide_default_io_base(int index)
{
switch (index) {
case 0: return 0x1f0;
......
......@@ -20,11 +20,12 @@
#endif
#define ide_default_irq(base) (0)
#define ide_default_io_base(index) ((ide_ioreg_t)0)
#define ide_default_io_base(index) (0)
static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port, ide_ioreg_t ctrl_port, int *irq)
static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
unsigned long ctrl_port, int *irq)
{
ide_ioreg_t reg = data_port;
unsigned long reg = data_port;
int i;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
......
......@@ -22,12 +22,13 @@
# define MAX_HWIFS 4
#endif
static __inline__ int ide_default_irq(ide_ioreg_t base) { return 0; }
static __inline__ ide_ioreg_t ide_default_io_base(int index) { return 0; }
static inline int ide_default_irq(unsigned long base) { return 0; }
static inline unsigned long ide_default_io_base(int index) { return 0; }
static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port, ide_ioreg_t ctrl_port, int *irq)
static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
unsigned long ctrl_port, int *irq)
{
ide_ioreg_t reg = data_port;
unsigned long reg = data_port;
int i;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
......
......@@ -22,7 +22,7 @@
#define MAX_HWIFS 2
#endif
static __inline__ int ide_default_irq_hp600(ide_ioreg_t base)
static inline int ide_default_irq_hp600(unsigned long base)
{
switch (base) {
case 0x01f0: return 93;
......@@ -32,7 +32,7 @@ static __inline__ int ide_default_irq_hp600(ide_ioreg_t base)
}
}
static __inline__ int ide_default_irq(ide_ioreg_t base)
static inline int ide_default_irq(unsigned long base)
{
if (MACH_HP600) {
return ide_default_irq_hp600(base);
......@@ -45,7 +45,7 @@ static __inline__ int ide_default_irq(ide_ioreg_t base)
}
}
static __inline__ ide_ioreg_t ide_default_io_base_hp600(int index)
static inline unsigned long ide_default_io_base_hp600(int index)
{
switch (index) {
case 0:
......@@ -57,7 +57,7 @@ static __inline__ ide_ioreg_t ide_default_io_base_hp600(int index)
}
}
static __inline__ ide_ioreg_t ide_default_io_base(int index)
static inline unsigned long ide_default_io_base(int index)
{
if (MACH_HP600) {
return ide_default_io_base_hp600(index);
......@@ -72,9 +72,10 @@ static __inline__ ide_ioreg_t ide_default_io_base(int index)
}
}
static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port, ide_ioreg_t ctrl_port, int *irq)
static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
unsigned long ctrl_port, int *irq)
{
ide_ioreg_t reg = data_port;
unsigned long reg = data_port;
int i;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
......
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