Commit 7723de7e authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Greg Kroah-Hartman

USB: musb_gadget: remove pointless loop

Remove the pointless 'do () while (0)' loop from musb_g_tx() -- it
makes this function symmetric to musb_g_rx()...
Signed-off-by: default avatarSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 46034dca
...@@ -429,32 +429,33 @@ void musb_g_tx(struct musb *musb, u8 epnum) ...@@ -429,32 +429,33 @@ void musb_g_tx(struct musb *musb, u8 epnum)
DBG(4, "<== %s, txcsr %04x\n", musb_ep->end_point.name, csr); DBG(4, "<== %s, txcsr %04x\n", musb_ep->end_point.name, csr);
dma = is_dma_capable() ? musb_ep->dma : NULL; dma = is_dma_capable() ? musb_ep->dma : NULL;
do {
/* REVISIT for high bandwidth, MUSB_TXCSR_P_INCOMPTX /*
* probably rates reporting as a host error * REVISIT: for high bandwidth, MUSB_TXCSR_P_INCOMPTX
* probably rates reporting as a host error.
*/ */
if (csr & MUSB_TXCSR_P_SENTSTALL) { if (csr & MUSB_TXCSR_P_SENTSTALL) {
csr |= MUSB_TXCSR_P_WZC_BITS; csr |= MUSB_TXCSR_P_WZC_BITS;
csr &= ~MUSB_TXCSR_P_SENTSTALL; csr &= ~MUSB_TXCSR_P_SENTSTALL;
musb_writew(epio, MUSB_TXCSR, csr); musb_writew(epio, MUSB_TXCSR, csr);
break; return;
} }
if (csr & MUSB_TXCSR_P_UNDERRUN) { if (csr & MUSB_TXCSR_P_UNDERRUN) {
/* we NAKed, no big deal ... little reason to care */ /* We NAKed, no big deal... little reason to care. */
csr |= MUSB_TXCSR_P_WZC_BITS; csr |= MUSB_TXCSR_P_WZC_BITS;
csr &= ~(MUSB_TXCSR_P_UNDERRUN csr &= ~(MUSB_TXCSR_P_UNDERRUN | MUSB_TXCSR_TXPKTRDY);
| MUSB_TXCSR_TXPKTRDY);
musb_writew(epio, MUSB_TXCSR, csr); musb_writew(epio, MUSB_TXCSR, csr);
DBG(20, "underrun on ep%d, req %p\n", epnum, request); DBG(20, "underrun on ep%d, req %p\n", epnum, request);
} }
if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) { if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) {
/* SHOULD NOT HAPPEN ... has with cppi though, after /*
* SHOULD NOT HAPPEN... has with CPPI though, after
* changing SENDSTALL (and other cases); harmless? * changing SENDSTALL (and other cases); harmless?
*/ */
DBG(5, "%s dma still busy?\n", musb_ep->end_point.name); DBG(5, "%s dma still busy?\n", musb_ep->end_point.name);
break; return;
} }
if (request) { if (request) {
...@@ -463,55 +464,47 @@ void musb_g_tx(struct musb *musb, u8 epnum) ...@@ -463,55 +464,47 @@ void musb_g_tx(struct musb *musb, u8 epnum)
if (dma && (csr & MUSB_TXCSR_DMAENAB)) { if (dma && (csr & MUSB_TXCSR_DMAENAB)) {
is_dma = 1; is_dma = 1;
csr |= MUSB_TXCSR_P_WZC_BITS; csr |= MUSB_TXCSR_P_WZC_BITS;
csr &= ~(MUSB_TXCSR_DMAENAB csr &= ~(MUSB_TXCSR_DMAENAB | MUSB_TXCSR_P_UNDERRUN |
| MUSB_TXCSR_P_UNDERRUN MUSB_TXCSR_TXPKTRDY);
| MUSB_TXCSR_TXPKTRDY);
musb_writew(epio, MUSB_TXCSR, csr); musb_writew(epio, MUSB_TXCSR, csr);
/* ensure writebuffer is empty */ /* Ensure writebuffer is empty. */
csr = musb_readw(epio, MUSB_TXCSR); csr = musb_readw(epio, MUSB_TXCSR);
request->actual += musb_ep->dma->actual_len; request->actual += musb_ep->dma->actual_len;
DBG(4, "TXCSR%d %04x, dma off, " DBG(4, "TXCSR%d %04x, DMA off, len %zu, req %p\n",
"len %zu, req %p\n", epnum, csr, musb_ep->dma->actual_len, request);
epnum, csr,
musb_ep->dma->actual_len,
request);
} }
if (is_dma || request->actual == request->length) { if (is_dma || request->actual == request->length) {
/*
/* First, maybe a terminating short packet. * First, maybe a terminating short packet. Some DMA
* Some DMA engines might handle this by * engines might handle this by themselves.
* themselves.
*/ */
if ((request->zero if ((request->zero && request->length
&& request->length && request->length % musb_ep->packet_sz == 0)
&& (request->length
% musb_ep->packet_sz)
== 0)
#ifdef CONFIG_USB_INVENTRA_DMA #ifdef CONFIG_USB_INVENTRA_DMA
|| (is_dma && || (is_dma && (!dma->desired_mode ||
((!dma->desired_mode) ||
(request->actual & (request->actual &
(musb_ep->packet_sz - 1)))) (musb_ep->packet_sz - 1))))
#endif #endif
) { ) {
/* on dma completion, fifo may not /*
* be available yet ... * On DMA completion, FIFO may not be
* available yet...
*/ */
if (csr & MUSB_TXCSR_TXPKTRDY) if (csr & MUSB_TXCSR_TXPKTRDY)
break; return;
DBG(4, "sending zero pkt\n"); DBG(4, "sending zero pkt\n");
musb_writew(epio, MUSB_TXCSR, musb_writew(epio, MUSB_TXCSR, MUSB_TXCSR_MODE
MUSB_TXCSR_MODE
| MUSB_TXCSR_TXPKTRDY); | MUSB_TXCSR_TXPKTRDY);
request->zero = 0; request->zero = 0;
} }
/* ... or if not, then complete it */ /* ... or if not, then complete it. */
musb_g_giveback(musb_ep, request, 0); musb_g_giveback(musb_ep, request, 0);
/* kickstart next transfer if appropriate; /*
* Kickstart next transfer if appropriate;
* the packet that just completed might not * the packet that just completed might not
* be transmitted for hours or days. * be transmitted for hours or days.
* REVISIT for double buffering... * REVISIT for double buffering...
...@@ -520,21 +513,18 @@ void musb_g_tx(struct musb *musb, u8 epnum) ...@@ -520,21 +513,18 @@ void musb_g_tx(struct musb *musb, u8 epnum)
musb_ep_select(mbase, epnum); musb_ep_select(mbase, epnum);
csr = musb_readw(epio, MUSB_TXCSR); csr = musb_readw(epio, MUSB_TXCSR);
if (csr & MUSB_TXCSR_FIFONOTEMPTY) if (csr & MUSB_TXCSR_FIFONOTEMPTY)
break; return;
request = musb_ep->desc
? next_request(musb_ep) if (!musb_ep->desc) {
: NULL;
if (!request) {
DBG(4, "%s idle now\n", DBG(4, "%s idle now\n",
musb_ep->end_point.name); musb_ep->end_point.name);
break; return;
} } else
request = next_request(musb_ep);
} }
txstate(musb, to_musb_request(request)); txstate(musb, to_musb_request(request));
} }
} while (0);
} }
/* ------------------------------------------------------------ */ /* ------------------------------------------------------------ */
......
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