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Commit 77d51337 authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'mips_5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux 

Pull MIPS updates from Thomas Bogendoerfer:

 - removed get_fs/set_fs

 - removed broken/unmaintained MIPS KVM trap and emulate support

 - added support for Loongson-2K1000

 - fixes and cleanups

* tag 'mips_5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (107 commits)
  MIPS: BCM63XX: Use BUG_ON instead of condition followed by BUG.
  MIPS: select ARCH_KEEP_MEMBLOCK unconditionally
  mips: Do not include hi and lo in clobber list for R6
  MIPS:DTS:Correct the license for Loongson-2K
  MIPS:DTS:Fix label name and interrupt number of ohci for Loongson-2K
  MIPS: Avoid handcoded DIVU in `__div64_32' altogether
  lib/math/test_div64: Correct the spelling of "dividend"
  lib/math/test_div64: Fix error message formatting
  mips/bootinfo:correct some comments of fw_arg
  MIPS: Avoid DIVU in `__div64_32' is result would be zero
  MIPS: Reinstate platform `__div64_32' handler
  div64: Correct inline documentation for `do_div'
  lib/math: Add a `do_div' test module
  MIPS: Makefile: Replace -pg with CC_FLAGS_FTRACE
  MIPS: pci-legacy: revert "use generic pci_enable_resources"
  MIPS: Loongson64: Add kexec/kdump support
  MIPS: pci-legacy: use generic pci_enable_resources
  MIPS: pci-legacy: remove busn_resource field
  MIPS: pci-legacy: remove redundant info messages
  MIPS: pci-legacy: stop using of_pci_range_to_resource
  ...
parents 3644286f 7e9be673
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Documentation/devicetree/bindings/display/panel/kingdisplay,kd035g6-54nt.yaml
View file @ 77d51337
......@@ -47,7 +47,6 @@ examples:
spi-max-frequency = <3125000>;
spi-3wire;
spi-cs-high;
reset-gpios = <&gpe 2 GPIO_ACTIVE_LOW>;
......
Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
View file @ 77d51337
......@@ -10,9 +10,9 @@ maintainers:
- Jiaxun Yang <jiaxun.yang@flygoat.com>
description: |
This interrupt controller is found in the Loongson-3 family of chips as the primary
package interrupt controller which can route local I/O interrupt to interrupt lines
of cores.
This interrupt controller is found in the Loongson-3 family of chips and
Loongson-2K1000 chip, as the primary package interrupt controller which
can route local I/O interrupt to interrupt lines of cores.
allOf:
- $ref: /schemas/interrupt-controller.yaml#
......@@ -22,9 +22,17 @@ properties:
oneOf:
- const: loongson,liointc-1.0
- const: loongson,liointc-1.0a
- const: loongson,liointc-2.0
reg:
maxItems: 1
minItems: 1
maxItems: 3
reg-names:
items:
- const: main
- const: isr0
- const: isr1
interrupt-controller: true
......@@ -69,6 +77,26 @@ required:
unevaluatedProperties: false
if:
properties:
compatible:
contains:
enum:
- loongson,liointc-2.0
then:
properties:
reg:
minItems: 3
required:
- reg-names
else:
properties:
reg:
maxItems: 1
examples:
- |
iointc: interrupt-controller@3ff01400 {
......
arch/mips/Kconfig
View file @ 77d51337
......@@ -4,13 +4,15 @@ config MIPS
default y
select ARCH_32BIT_OFF_T if !64BIT
select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
select ARCH_HAS_FORTIFY_SOURCE
select ARCH_HAS_KCOV
select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
select ARCH_HAS_UBSAN_SANITIZE_ALL
select ARCH_HAS_GCOV_PROFILE_ALL
select ARCH_KEEP_MEMBLOCK if DEBUG_KERNEL
select ARCH_KEEP_MEMBLOCK
select ARCH_SUPPORTS_UPROBES
select ARCH_USE_BUILTIN_BSWAP
select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
......@@ -26,6 +28,7 @@ config MIPS
select GENERIC_ATOMIC64 if !64BIT
select GENERIC_CMOS_UPDATE
select GENERIC_CPU_AUTOPROBE
select GENERIC_FIND_FIRST_BIT
select GENERIC_GETTIMEOFDAY
select GENERIC_IOMAP
select GENERIC_IRQ_PROBE
......@@ -91,7 +94,6 @@ config MIPS
select PERF_USE_VMALLOC
select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
select RTC_LIB
select SET_FS
select SYSCTL_EXCEPTION_TRACE
select VIRT_TO_BUS
select ARCH_HAS_ELFCORE_COMPAT
......@@ -712,6 +714,7 @@ config SGI_IP27
select ARC_CMDLINE_ONLY
select BOOT_ELF64
select DEFAULT_SGI_PARTITION
select FORCE_PCI
select SYS_HAS_EARLY_PRINTK
select HAVE_PCI
select IRQ_MIPS_CPU
......@@ -774,6 +777,7 @@ config SGI_IP30
select BOOT_ELF64
select CEVT_R4K
select CSRC_R4K
select FORCE_PCI
select SYNC_R4K if SMP
select ZONE_DMA32
select HAVE_PCI
......@@ -998,6 +1002,7 @@ config CAVIUM_OCTEON_SOC
select NR_CPUS_DEFAULT_64
select MIPS_NR_CPU_NR_MAP_1024
select BUILTIN_DTB
select MTD
select MTD_COMPLEX_MAPPINGS
select SWIOTLB
select SYS_SUPPORTS_RELOCATABLE
......@@ -2118,7 +2123,7 @@ config CPU_MIPS32
config CPU_MIPS64
bool
default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
CPU_MIPS64_R6
CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
#
# These indicate the revision of the architecture
......@@ -2185,7 +2190,8 @@ config CPU_SUPPORTS_HUGEPAGES
depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
config MIPS_PGD_C0_CONTEXT
bool
default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
depends on 64BIT
default y if (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
#
# Set to y for ptrace access to watch registers.
......@@ -2219,23 +2225,6 @@ config 64BIT
endchoice
config KVM_GUEST
bool "KVM Guest Kernel"
depends on CPU_MIPS32_R2
depends on !64BIT && BROKEN_ON_SMP
help
Select this option if building a guest kernel for KVM (Trap & Emulate)
mode.
config KVM_GUEST_TIMER_FREQ
int "Count/Compare Timer Frequency (MHz)"
depends on KVM_GUEST
default 100
help
Set this to non-zero if building a guest kernel for KVM to skip RTC
emulation when determining guest CPU Frequency. Instead, the guest's
timer frequency is specified directly.
config MIPS_VA_BITS_48
bool "48 bits virtual memory"
depends on 64BIT
......
arch/mips/Kconfig.debug
View file @ 77d51337
......@@ -77,6 +77,7 @@ config CMDLINE_OVERRIDE
config SB1XXX_CORELIS
bool "Corelis Debugger"
depends on SIBYTE_SB1xxx_SOC
select DEBUG_KERNEL if !COMPILE_TEST
select DEBUG_INFO if !COMPILE_TEST
help
Select compile flags that produce code that can be processed by the
......
arch/mips/alchemy/common/clock.c
View file @ 77d51337
......@@ -111,7 +111,7 @@ static struct clk_aliastable {
/* access locks to SYS_FREQCTRL0/1 and SYS_CLKSRC registers */
static spinlock_t alchemy_clk_fg0_lock;
static spinlock_t alchemy_clk_fg1_lock;
static spinlock_t alchemy_clk_csrc_lock;
static DEFINE_SPINLOCK(alchemy_clk_csrc_lock);
/* CPU Core clock *****************************************************/
......@@ -996,7 +996,6 @@ static int __init alchemy_clk_setup_imux(int ctype)
if (!a)
return -ENOMEM;
spin_lock_init(&alchemy_clk_csrc_lock);
ret = 0;
for (i = 0; i < 6; i++) {
......
arch/mips/bcm63xx/clk.c
View file @ 77d51337
......@@ -76,7 +76,7 @@ static struct clk clk_enet_misc = {
};
/*
* Ethernet MAC clocks: only revelant on 6358, silently enable misc
* Ethernet MAC clocks: only relevant on 6358, silently enable misc
* clocks
*/
static void enetx_set(struct clk *clk, int enable)
......
arch/mips/bcm63xx/gpio.c
View file @ 77d51337
......@@ -43,8 +43,7 @@ static void bcm63xx_gpio_set(struct gpio_chip *chip,
u32 *v;
unsigned long flags;
if (gpio >= chip->ngpio)
BUG();
BUG_ON(gpio >= chip->ngpio);
if (gpio < 32) {
reg = gpio_out_low_reg;
......@@ -70,8 +69,7 @@ static int bcm63xx_gpio_get(struct gpio_chip *chip, unsigned gpio)
u32 reg;
u32 mask;
if (gpio >= chip->ngpio)
BUG();
BUG_ON(gpio >= chip->ngpio);
if (gpio < 32) {
reg = gpio_out_low_reg;
......@@ -92,8 +90,7 @@ static int bcm63xx_gpio_set_direction(struct gpio_chip *chip,
u32 tmp;
unsigned long flags;
if (gpio >= chip->ngpio)
BUG();
BUG_ON(gpio >= chip->ngpio);
if (gpio < 32) {
reg = GPIO_CTL_LO_REG;
......
arch/mips/bmips/dma.c
View file @ 77d51337
......@@ -10,7 +10,7 @@
#include <linux/device.h>
#include <linux/dma-direction.h>
#include <linux/dma-mapping.h>
#include <linux/dma-direct.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/of.h>
......
arch/mips/boot/compressed/Makefile
View file @ 77d51337
......@@ -18,7 +18,7 @@ include $(srctree)/arch/mips/Kbuild.platforms
BOOT_HEAP_SIZE := 0x400000
# Disable Function Tracer
KBUILD_CFLAGS := $(filter-out -pg, $(KBUILD_CFLAGS))
KBUILD_CFLAGS := $(filter-out $(CC_FLAGS_FTRACE), $(KBUILD_CFLAGS))
KBUILD_CFLAGS := $(filter-out -fstack-protector, $(KBUILD_CFLAGS))
......
arch/mips/boot/dts/brcm/bcm3368-netgear-cvg834g.dts
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
/include/ "bcm3368.dtsi"
#include "bcm3368.dtsi"
/ {
compatible = "netgear,cvg834g", "brcm,bcm3368";
......
arch/mips/boot/dts/brcm/bcm3368.dtsi
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
#include "dt-bindings/clock/bcm3368-clock.h"
/ {
#address-cells = <1>;
#size-cells = <1>;
......@@ -59,7 +62,7 @@ clkctl: clock-controller@fff8c004 {
periph_cntl: syscon@fff8c008 {
compatible = "syscon";
reg = <0xfff8c000 0x4>;
reg = <0xfff8c008 0x4>;
native-endian;
};
......
arch/mips/boot/dts/brcm/bcm63268-comtrend-vr-3032u.dts
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
/include/ "bcm63268.dtsi"
#include "bcm63268.dtsi"
/ {
compatible = "comtrend,vr-3032u", "brcm,bcm63268";
......
arch/mips/boot/dts/brcm/bcm63268.dtsi
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
#include "dt-bindings/clock/bcm63268-clock.h"
#include "dt-bindings/reset/bcm63268-reset.h"
#include "dt-bindings/soc/bcm63268-pm.h"
/ {
#address-cells = <1>;
#size-cells = <1>;
......@@ -24,16 +29,29 @@ cpu@1 {
};
clocks {
periph_clk: periph-clk {
periph_osc: periph-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
clock-output-names = "periph";
};
hsspi_osc: hsspi-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <400000000>;
clock-output-names = "hsspi_osc";
};
};
aliases {
nflash = &nflash;
serial0 = &uart0;
serial1 = &uart1;
spi0 = &lsspi;
spi1 = &hsspi;
};
cpu_intc: interrupt-controller {
......@@ -51,23 +69,22 @@ ubus {
compatible = "simple-bus";
ranges;
clkctl: clock-controller@10000004 {
periph_clk: clock-controller@10000004 {
compatible = "brcm,bcm63268-clocks";
reg = <0x10000004 0x4>;
#clock-cells = <1>;
};
periph_cntl: syscon@10000008 {
pll_cntl: syscon@10000008 {
compatible = "syscon";
reg = <0x10000000 0xc>;
reg = <0x10000008 0x4>;
native-endian;
};
reboot: syscon-reboot@10000008 {
compatible = "syscon-reboot";
regmap = <&periph_cntl>;
offset = <0x0>;
mask = <0x1>;
reboot {
compatible = "syscon-reboot";
offset = <0x0>;
mask = <0x1>;
};
};
periph_rst: reset-controller@10000010 {
......@@ -88,6 +105,16 @@ periph_intc: interrupt-controller@10000020 {
interrupts = <2>, <3>;
};
wdt: watchdog@1000009c {
compatible = "brcm,bcm7038-wdt";
reg = <0x1000009c 0xc>;
clocks = <&periph_osc>;
clock-names = "refclk";
timeout-sec = <30>;
};
uart0: serial@10000180 {
compatible = "brcm,bcm6345-uart";
reg = <0x10000180 0x18>;
......@@ -95,12 +122,34 @@ uart0: serial@10000180 {
interrupt-parent = <&periph_intc>;
interrupts = <5>;
clocks = <&periph_clk>;
clocks = <&periph_osc>;
clock-names = "refclk";
status = "disabled";
};
nflash: nand@10000200 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,nand-bcm6368",
"brcm,brcmnand-v4.0",
"brcm,brcmnand";
reg = <0x10000200 0x180>,
<0x10000600 0x200>,
<0x100000b0 0x10>;
reg-names = "nand",
"nand-cache",
"nand-int-base";
interrupt-parent = <&periph_intc>;
interrupts = <50>;
clocks = <&periph_clk BCM63268_CLK_NAND>;
clock-names = "nand";
status = "disabled";
};
uart1: serial@100001a0 {
compatible = "brcm,bcm6345-uart";
reg = <0x100001a0 0x18>;
......@@ -108,17 +157,44 @@ uart1: serial@100001a0 {
interrupt-parent = <&periph_intc>;
interrupts = <34>;
clocks = <&periph_clk>;
clocks = <&periph_osc>;
clock-names = "refclk";
status = "disabled";
};
leds0: led-controller@10001900 {
lsspi: spi@10000800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6328-leds";
reg = <0x10001900 0x24>;
compatible = "brcm,bcm6358-spi";
reg = <0x10000800 0x70c>;
interrupt-parent = <&periph_intc>;
interrupts = <80>;
clocks = <&periph_clk BCM63268_CLK_SPI>;
clock-names = "spi";
resets = <&periph_rst BCM63268_RST_SPI>;
status = "disabled";
};
hsspi: spi@10001000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6328-hsspi";
reg = <0x10001000 0x600>;
interrupt-parent = <&periph_intc>;
interrupts = <6>;
clocks = <&periph_clk BCM63268_CLK_HSSPI>,
<&hsspi_osc>;
clock-names = "hsspi",
"pll";
resets = <&periph_rst BCM63268_RST_SPI>;
status = "disabled";
};
......@@ -129,6 +205,15 @@ periph_pwr: power-controller@1000184c {
#power-domain-cells = <1>;
};
leds0: led-controller@10001900 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6328-leds";
reg = <0x10001900 0x24>;
status = "disabled";
};
ehci: usb@10002500 {
compatible = "brcm,bcm63268-ehci", "generic-ehci";
reg = <0x10002500 0x100>;
......@@ -137,6 +222,9 @@ ehci: usb@10002500 {
interrupt-parent = <&periph_intc>;
interrupts = <10>;
phys = <&usbh 0>;
phy-names = "usb";
status = "disabled";
};
......@@ -149,6 +237,25 @@ ohci: usb@10002600 {
interrupt-parent = <&periph_intc>;
interrupts = <9>;
phys = <&usbh 0>;
phy-names = "usb";
status = "disabled";
};
usbh: usb-phy@10002700 {
compatible = "brcm,bcm63268-usbh-phy";
reg = <0x10002700 0x38>;
#phy-cells = <1>;
clocks = <&periph_clk BCM63268_CLK_USBH>;
clock-names = "usbh";
power-domains = <&periph_pwr BCM63268_POWER_DOMAIN_USBH>;
resets = <&periph_rst BCM63268_RST_USBH>;
reset-names = "usbh";
status = "disabled";
};
};
......
arch/mips/boot/dts/brcm/bcm6328.dtsi
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
#include "dt-bindings/clock/bcm6328-clock.h"
#include "dt-bindings/reset/bcm6328-reset.h"
#include "dt-bindings/soc/bcm6328-pm.h"
/ {
#address-cells = <1>;
#size-cells = <1>;
......@@ -24,16 +29,26 @@ cpu@1 {
};
clocks {
periph_clk: periph-clk {
periph_osc: periph-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
clock-output-names = "periph";
};
hsspi_osc: hsspi-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <133333333>;
clock-output-names = "hsspi_osc";
};
};
aliases {
nflash = &nflash;
serial0 = &uart0;
serial1 = &uart1;
spi1 = &hsspi;
};
cpu_intc: interrupt-controller {
......@@ -51,7 +66,7 @@ ubus {
compatible = "simple-bus";
ranges;
clkctl: clock-controller@10000004 {
periph_clk: clock-controller@10000004 {
compatible = "brcm,bcm6328-clocks";
reg = <0x10000004 0x4>;
#clock-cells = <1>;
......@@ -75,37 +90,71 @@ periph_intc: interrupt-controller@10000020 {
interrupts = <2>, <3>;
};
wdt: watchdog@1000005c {
compatible = "brcm,bcm7038-wdt";
reg = <0x1000005c 0xc>;
clocks = <&periph_osc>;
clock-names = "refclk";
timeout-sec = <30>;
};
soft_reset: syscon@10000068 {
compatible = "syscon";
reg = <0x10000068 0x4>;
native-endian;
reboot {
compatible = "syscon-reboot";
offset = <0x0>;
mask = <0x1>;
};
};
uart0: serial@10000100 {
compatible = "brcm,bcm6345-uart";
reg = <0x10000100 0x18>;
interrupt-parent = <&periph_intc>;
interrupts = <28>;
clocks = <&periph_clk>;
clocks = <&periph_osc>;
clock-names = "refclk";
status = "disabled";
};
uart1: serial@10000120 {
compatible = "brcm,bcm6345-uart";
reg = <0x10000120 0x18>;
interrupt-parent = <&periph_intc>;
interrupts = <39>;
clocks = <&periph_clk>;
clocks = <&periph_osc>;
clock-names = "refclk";
status = "disabled";
};
timer: syscon@10000040 {
compatible = "syscon";
reg = <0x10000040 0x2c>;
native-endian;
};
nflash: nand@10000200 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,nand-bcm6368",
"brcm,brcmnand-v2.2",
"brcm,brcmnand";
reg = <0x10000200 0x180>,
<0x10000400 0x200>,
<0x10000070 0x10>;
reg-names = "nand",
"nand-cache",
"nand-int-base";
reboot: syscon-reboot@10000068 {
compatible = "syscon-reboot";
regmap = <&timer>;
offset = <0x28>;
mask = <0x1>;
interrupt-parent = <&periph_intc>;
interrupts = <0>;
status = "disabled";
};
leds0: led-controller@10000800 {
......@@ -113,6 +162,27 @@ leds0: led-controller@10000800 {
#size-cells = <0>;
compatible = "brcm,bcm6328-leds";
reg = <0x10000800 0x24>;
status = "disabled";
};
hsspi: spi@10001000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6328-hsspi";
reg = <0x10001000 0x600>;
interrupt-parent = <&periph_intc>;
interrupts = <29>;
clocks = <&periph_clk BCM6328_CLK_HSSPI>,
<&hsspi_osc>;
clock-names = "hsspi",
"pll";
resets = <&periph_rst BCM6328_RST_SPI>;
reset-names = "hsspi";
status = "disabled";
};
......@@ -126,8 +196,13 @@ ehci: usb@10002500 {
compatible = "brcm,bcm6328-ehci", "generic-ehci";
reg = <0x10002500 0x100>;
big-endian;
interrupt-parent = <&periph_intc>;
interrupts = <42>;
phys = <&usbh 0>;
phy-names = "usb";
status = "disabled";
};
......@@ -136,8 +211,29 @@ ohci: usb@10002600 {
reg = <0x10002600 0x100>;
big-endian;
no-big-frame-no;
interrupt-parent = <&periph_intc>;
interrupts = <41>;
phys = <&usbh 0>;
phy-names = "usb";
status = "disabled";
};
usbh: usb-phy@10002700 {
compatible = "brcm,bcm6328-usbh-phy";
reg = <0x10002700 0x38>;
#phy-cells = <1>;
clocks = <&periph_clk BCM6328_CLK_USBH>;
clock-names = "usbh";
power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_USBH>;
resets = <&periph_rst BCM6328_RST_USBH>;
reset-names = "usbh";
status = "disabled";
};
};
......
arch/mips/boot/dts/brcm/bcm6358-neufbox4-sercomm.dts
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
/include/ "bcm6358.dtsi"
#include "bcm6358.dtsi"
/ {
compatible = "sfr,nb4-ser", "brcm,bcm6358";
......
arch/mips/boot/dts/brcm/bcm6358.dtsi
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
#include "dt-bindings/clock/bcm6358-clock.h"
#include "dt-bindings/reset/bcm6358-reset.h"
/ {
#address-cells = <1>;
#size-cells = <1>;
......@@ -24,16 +28,19 @@ cpu@1 {
};
clocks {
periph_clk: periph-clk {
periph_osc: periph-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
clock-output-names = "periph";
};
};
aliases {
pflash = &pflash;
serial0 = &uart0;
serial1 = &uart1;
spi0 = &lsspi;
};
cpu_intc: interrupt-controller {
......@@ -51,23 +58,22 @@ ubus {
compatible = "simple-bus";
ranges;
clkctl: clock-controller@fffe0004 {
periph_clk: clock-controller@fffe0004 {
compatible = "brcm,bcm6358-clocks";
reg = <0xfffe0004 0x4>;
#clock-cells = <1>;
};
periph_cntl: syscon@fffe0008 {
pll_cntl: syscon@fffe0008 {
compatible = "syscon";
reg = <0xfffe0000 0x4>;
reg = <0xfffe0008 0x4>;
native-endian;
};
reboot: syscon-reboot@fffe0008 {
compatible = "syscon-reboot";
regmap = <&periph_cntl>;
offset = <0x0>;
mask = <0x1>;
reboot {
compatible = "syscon-reboot";
offset = <0x0>;
mask = <0x1>;
};
};
periph_intc: interrupt-controller@fffe000c {
......@@ -88,6 +94,16 @@ periph_rst: reset-controller@fffe0034 {
#reset-cells = <1>;
};
wdt: watchdog@fffe005c {
compatible = "brcm,bcm7038-wdt";
reg = <0xfffe005c 0xc>;
clocks = <&periph_osc>;
clock-names = "refclk";
timeout-sec = <30>;
};
leds0: led-controller@fffe00d0 {
#address-cells = <1>;
#size-cells = <0>;
......@@ -104,7 +120,7 @@ uart0: serial@fffe0100 {
interrupt-parent = <&periph_intc>;
interrupts = <2>;
clocks = <&periph_clk>;
clocks = <&periph_osc>;
clock-names = "refclk";
status = "disabled";
......@@ -117,18 +133,41 @@ uart1: serial@fffe0120 {
interrupt-parent = <&periph_intc>;
interrupts = <3>;
clocks = <&periph_clk>;
clocks = <&periph_osc>;
clock-names = "refclk";
status = "disabled";
};
lsspi: spi@fffe0800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6358-spi";
reg = <0xfffe0800 0x70c>;
interrupt-parent = <&periph_intc>;
interrupts = <1>;
clocks = <&periph_clk BCM6358_CLK_SPI>;
clock-names = "spi";
resets = <&periph_rst BCM6358_RST_SPI>;
reset-names = "spi";
status = "disabled";
};
ehci: usb@fffe1300 {
compatible = "brcm,bcm6358-ehci", "generic-ehci";
reg = <0xfffe1300 0x100>;
big-endian;
interrupt-parent = <&periph_intc>;
interrupts = <10>;
phys = <&usbh 0>;
phy-names = "usb";
status = "disabled";
};
......@@ -137,9 +176,35 @@ ohci: usb@fffe1400 {
reg = <0xfffe1400 0x100>;
big-endian;
no-big-frame-no;
interrupt-parent = <&periph_intc>;
interrupts = <5>;
phys = <&usbh 0>;
phy-names = "usb";
status = "disabled";
};
usbh: usb-phy@fffe1500 {
compatible = "brcm,bcm6358-usbh-phy";
reg = <0xfffe1500 0x38>;
#phy-cells = <1>;
resets = <&periph_rst BCM6358_RST_USBH>;
reset-names = "usbh";
status = "disabled";
};
};
pflash: nor@1e000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x1e000000 0x2000000>;
bank-width = <2>;
status = "disabled";
};
};
arch/mips/boot/dts/brcm/bcm6362-neufbox6-sercomm.dts
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
/include/ "bcm6362.dtsi"
#include "bcm6362.dtsi"
/ {
compatible = "sfr,nb6-ser", "brcm,bcm6362";
......
arch/mips/boot/dts/brcm/bcm6362.dtsi
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
#include "dt-bindings/clock/bcm6362-clock.h"
#include "dt-bindings/reset/bcm6362-reset.h"
#include "dt-bindings/soc/bcm6362-pm.h"
/ {
#address-cells = <1>;
#size-cells = <1>;
......@@ -24,16 +29,29 @@ cpu@1 {
};
clocks {
periph_clk: periph-clk {
periph_osc: periph-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
clock-output-names = "periph";
};
hsspi_osc: hsspi-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <400000000>;
clock-output-names = "hsspi_osc";
};
};
aliases {
nflash = &nflash;
serial0 = &uart0;
serial1 = &uart1;
spi0 = &lsspi;
spi1 = &hsspi;
};
cpu_intc: interrupt-controller {
......@@ -51,23 +69,22 @@ ubus {
compatible = "simple-bus";
ranges;
clkctl: clock-controller@10000004 {
periph_clk: clock-controller@10000004 {
compatible = "brcm,bcm6362-clocks";
reg = <0x10000004 0x4>;
#clock-cells = <1>;
};
periph_cntl: syscon@10000008 {
pll_cntl: syscon@10000008 {
compatible = "syscon";
reg = <0x10000000 0xc>;
reg = <0x10000008 0x4>;
native-endian;
};
reboot: syscon-reboot@10000008 {
compatible = "syscon-reboot";
regmap = <&periph_cntl>;
offset = <0x0>;
mask = <0x1>;
reboot {
compatible = "syscon-reboot";
offset = <0x0>;
mask = <0x1>;
};
};
periph_rst: reset-controller@10000010 {
......@@ -88,6 +105,16 @@ periph_intc: interrupt-controller@10000020 {
interrupts = <2>, <3>;
};
wdt: watchdog@1000005c {
compatible = "brcm,bcm7038-wdt";
reg = <0x1000005c 0xc>;
clocks = <&periph_osc>;
clock-names = "refclk";
timeout-sec = <30>;
};
uart0: serial@10000100 {
compatible = "brcm,bcm6345-uart";
reg = <0x10000100 0x18>;
......@@ -95,7 +122,7 @@ uart0: serial@10000100 {
interrupt-parent = <&periph_intc>;
interrupts = <3>;
clocks = <&periph_clk>;
clocks = <&periph_osc>;
clock-names = "refclk";
status = "disabled";
......@@ -108,12 +135,72 @@ uart1: serial@10000120 {
interrupt-parent = <&periph_intc>;
interrupts = <4>;
clocks = <&periph_clk>;
clocks = <&periph_osc>;
clock-names = "refclk";
status = "disabled";
};
nflash: nand@10000200 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,nand-bcm6368",
"brcm,brcmnand-v2.2",
"brcm,brcmnand";
reg = <0x10000200 0x180>,
<0x10000600 0x200>,
<0x10000070 0x10>;
reg-names = "nand",
"nand-cache",
"nand-int-base";
interrupt-parent = <&periph_intc>;
interrupts = <12>;
clocks = <&periph_clk BCM6362_CLK_NAND>;
clock-names = "nand";
status = "disabled";
};
lsspi: spi@10000800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6358-spi";
reg = <0x10000800 0x70c>;
interrupt-parent = <&periph_intc>;
interrupts = <2>;
clocks = <&periph_clk BCM6362_CLK_SPI>;
clock-names = "spi";
resets = <&periph_rst BCM6362_RST_SPI>;
reset-names = "spi";
status = "disabled";
};
hsspi: spi@10001000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6328-hsspi";
reg = <0x10001000 0x600>;
interrupt-parent = <&periph_intc>;
interrupts = <5>;
clocks = <&periph_clk BCM6362_CLK_HSSPI>,
<&hsspi_osc>;
clock-names = "hsspi",
"pll";
resets = <&periph_rst BCM6362_RST_SPI>;
reset-names = "hsspi";
status = "disabled";
};
periph_pwr: power-controller@10001848 {
compatible = "brcm,bcm6362-power-controller";
reg = <0x10001848 0x4>;
......@@ -137,6 +224,9 @@ ehci: usb@10002500 {
interrupt-parent = <&periph_intc>;
interrupts = <10>;
phys = <&usbh 0>;
phy-names = "usb";
status = "disabled";
};
......@@ -149,6 +239,26 @@ ohci: usb@10002600 {
interrupt-parent = <&periph_intc>;
interrupts = <9>;
phys = <&usbh 0>;
phy-names = "usb";
status = "disabled";
};
usbh: usb-phy@10002700 {
compatible = "brcm,bcm6362-usbh-phy";
reg = <0x10002700 0x38>;
#phy-cells = <1>;
clocks = <&periph_clk BCM6362_CLK_USBH>;
clock-names = "usbh";
power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_USBH>;
resets = <&periph_rst BCM6362_RST_USBH>;
reset-names = "usbh";
status = "disabled";
};
};
......
arch/mips/boot/dts/brcm/bcm6368.dtsi
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
#include "dt-bindings/clock/bcm6368-clock.h"
#include "dt-bindings/reset/bcm6368-reset.h"
/ {
#address-cells = <1>;
#size-cells = <1>;
......@@ -24,16 +28,20 @@ cpu@1 {
};
clocks {
periph_clk: periph-clk {
periph_osc: periph-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
clock-output-names = "periph";
};
};
aliases {
nflash = &nflash;
pflash = &pflash;
serial0 = &uart0;
serial1 = &uart1;
spi0 = &lsspi;
};
cpu_intc: interrupt-controller {
......@@ -51,23 +59,22 @@ ubus {
compatible = "simple-bus";
ranges;
clkctl: clock-controller@10000004 {
periph_clk: clock-controller@10000004 {
compatible = "brcm,bcm6368-clocks";
reg = <0x10000004 0x4>;
#clock-cells = <1>;
};
periph_cntl: syscon@100000008 {
pll_cntl: syscon@100000008 {
compatible = "syscon";
reg = <0x10000000 0xc>;
reg = <0x10000008 0x4>;
native-endian;
};
reboot: syscon-reboot@10000008 {
compatible = "syscon-reboot";
regmap = <&periph_cntl>;
offset = <0x0>;
mask = <0x1>;
reboot {
compatible = "syscon-reboot";
offset = <0x0>;
mask = <0x1>;
};
};
periph_rst: reset-controller@10000010 {
......@@ -88,31 +95,88 @@ periph_intc: interrupt-controller@10000020 {
interrupts = <2>, <3>;
};
wdt: watchdog@1000005c {
compatible = "brcm,bcm7038-wdt";
reg = <0x1000005c 0xc>;
clocks = <&periph_osc>;
clock-names = "refclk";
timeout-sec = <30>;
};
leds0: led-controller@100000d0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6358-leds";
reg = <0x100000d0 0x8>;
status = "disabled";
};
uart0: serial@10000100 {
compatible = "brcm,bcm6345-uart";
reg = <0x10000100 0x18>;
interrupt-parent = <&periph_intc>;
interrupts = <2>;
clocks = <&periph_clk>;
clocks = <&periph_osc>;
clock-names = "refclk";
status = "disabled";
};
uart1: serial@10000120 {
compatible = "brcm,bcm6345-uart";
reg = <0x10000120 0x18>;
interrupt-parent = <&periph_intc>;
interrupts = <3>;
clocks = <&periph_clk>;
clocks = <&periph_osc>;
clock-names = "refclk";
status = "disabled";
};
nflash: nand@10000200 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,nand-bcm6368",
"brcm,brcmnand-v2.1",
"brcm,brcmnand";
reg = <0x10000200 0x180>,
<0x10000600 0x200>,
<0x10000070 0x10>;
reg-names = "nand",
"nand-cache",
"nand-int-base";
interrupt-parent = <&periph_intc>;
interrupts = <10>;
clocks = <&periph_clk BCM6368_CLK_NAND>;
clock-names = "nand";
status = "disabled";
};
lsspi: spi@10000800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6358-spi";
reg = <0x10000800 0x70c>;
interrupt-parent = <&periph_intc>;
interrupts = <1>;
clocks = <&periph_clk BCM6368_CLK_SPI>;
clock-names = "spi";
resets = <&periph_rst BCM6368_RST_SPI>;
reset-names = "spi";
status = "disabled";
};
......@@ -120,8 +184,13 @@ ehci: usb@10001500 {
compatible = "brcm,bcm6368-ehci", "generic-ehci";
reg = <0x10001500 0x100>;
big-endian;
interrupt-parent = <&periph_intc>;
interrupts = <7>;
phys = <&usbh 0>;
phy-names = "usb";
status = "disabled";
};
......@@ -130,9 +199,49 @@ ohci: usb@10001600 {
reg = <0x10001600 0x100>;
big-endian;
no-big-frame-no;
interrupt-parent = <&periph_intc>;
interrupts = <5>;
phys = <&usbh 0>;
phy-names = "usb";
status = "disabled";
};
usbh: usb-phy@10001700 {
compatible = "brcm,bcm6368-usbh-phy";
reg = <0x10001700 0x38>;
#phy-cells = <1>;
clocks = <&periph_clk BCM6368_CLK_USBH>;
clock-names = "usbh";
resets = <&periph_rst BCM6368_RST_USBH>;
reset-names = "usbh";
status = "disabled";
};
random: rng@10004180 {
compatible = "brcm,bcm6368-rng";
reg = <0x10004180 0x14>;
clocks = <&periph_clk BCM6368_CLK_IPSEC>;
clock-names = "ipsec";
resets = <&periph_rst BCM6368_RST_IPSEC>;
reset-names = "ipsec";
};
};
pflash: nor@18000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x18000000 0x2000000>;
bank-width = <2>;
status = "disabled";
};
};
arch/mips/boot/dts/brcm/bcm93384wvg.dts
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
/include/ "bcm3384_zephyr.dtsi"
#include "bcm3384_zephyr.dtsi"
/ {
compatible = "brcm,bcm93384wvg", "brcm,bcm3384";
......
arch/mips/boot/dts/brcm/bcm93384wvg_viper.dts
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
/include/ "bcm3384_viper.dtsi"
#include "bcm3384_viper.dtsi"
/ {
compatible = "brcm,bcm93384wvg-viper", "brcm,bcm3384-viper";
......
arch/mips/boot/dts/brcm/bcm96368mvwg.dts
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
/include/ "bcm6368.dtsi"
#include "bcm6368.dtsi"
/ {
compatible = "brcm,bcm96368mvwg", "brcm,bcm6368";
......
arch/mips/boot/dts/brcm/bcm97125cbmb.dts
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
/include/ "bcm7125.dtsi"
#include "bcm7125.dtsi"
/ {
compatible = "brcm,bcm97125cbmb", "brcm,bcm7125";
......
arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
/include/ "bcm7346.dtsi"
/include/ "bcm97xxx-nand-cs1-bch24.dtsi"
#include "bcm7346.dtsi"
#include "bcm97xxx-nand-cs1-bch24.dtsi"
/ {
compatible = "brcm,bcm97346dbsmb", "brcm,bcm7346";
......
arch/mips/boot/dts/brcm/bcm97358svmb.dts
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
/include/ "bcm7358.dtsi"
/include/ "bcm97xxx-nand-cs1-bch4.dtsi"
#include "bcm7358.dtsi"
#include "bcm97xxx-nand-cs1-bch4.dtsi"
/ {
compatible = "brcm,bcm97358svmb", "brcm,bcm7358";
......
arch/mips/boot/dts/brcm/bcm97360svmb.dts
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
/include/ "bcm7360.dtsi"
#include "bcm7360.dtsi"
/ {
compatible = "brcm,bcm97360svmb", "brcm,bcm7360";
......
arch/mips/boot/dts/brcm/bcm97362svmb.dts
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
/include/ "bcm7362.dtsi"
/include/ "bcm97xxx-nand-cs1-bch4.dtsi"
#include "bcm7362.dtsi"
#include "bcm97xxx-nand-cs1-bch4.dtsi"
/ {
compatible = "brcm,bcm97362svmb", "brcm,bcm7362";
......
arch/mips/boot/dts/brcm/bcm97420c.dts
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
/include/ "bcm7420.dtsi"
#include "bcm7420.dtsi"
/ {
compatible = "brcm,bcm97420c", "brcm,bcm7420";
......
arch/mips/boot/dts/brcm/bcm97425svmb.dts
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
/include/ "bcm7425.dtsi"
/include/ "bcm97xxx-nand-cs1-bch24.dtsi"
#include "bcm7425.dtsi"
#include "bcm97xxx-nand-cs1-bch24.dtsi"
/ {
compatible = "brcm,bcm97425svmb", "brcm,bcm7425";
......
arch/mips/boot/dts/brcm/bcm97435svmb.dts
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
/include/ "bcm7435.dtsi"
/include/ "bcm97xxx-nand-cs1-bch24.dtsi"
#include "bcm7435.dtsi"
#include "bcm97xxx-nand-cs1-bch24.dtsi"
/ {
compatible = "brcm,bcm97435svmb", "brcm,bcm7435";
......
arch/mips/boot/dts/brcm/bcm9ejtagprb.dts
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
/include/ "bcm6328.dtsi"
#include "bcm6328.dtsi"
/ {
compatible = "brcm,bcm9ejtagprb", "brcm,bcm6328";
......
arch/mips/boot/dts/ingenic/gcw0.dts
View file @ 77d51337
......@@ -345,7 +345,6 @@ nt39016@0 {
spi-max-frequency = <3125000>;
spi-3wire;
spi-cs-high;
reset-gpios = <&gpe 2 GPIO_ACTIVE_LOW>;
......
arch/mips/boot/dts/loongson/Makefile
View file @ 77d51337
# SPDX_License_Identifier: GPL_2.0
dtb-$(CONFIG_MACH_LOONGSON64) += loongson64_2core_2k1000.dtb
dtb-$(CONFIG_MACH_LOONGSON64) += loongson64c_4core_ls7a.dtb
dtb-$(CONFIG_MACH_LOONGSON64) += loongson64c_4core_rs780e.dtb
dtb-$(CONFIG_MACH_LOONGSON64) += loongson64c_8core_rs780e.dtb
......
arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi 0 → 100644
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
/ {
compatible = "loongson,loongson2k1000";
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "loongson,gs264";
reg = <0x0>;
#clock-cells = <1>;
clocks = <&cpu_clk>;
};
};
memory {
compatible = "memory";
device_type = "memory";
reg = <0x00000000 0x00200000 0x00000000 0x0ee00000>, /* 238 MB at 2 MB */
<0x00000000 0x20000000 0x00000000 0x1f000000>, /* 496 MB at 512 MB */
<0x00000001 0x10000000 0x00000001 0xb0000000>; /* 6912 MB at 4352MB */
};
cpu_clk: cpu_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <800000000>;
};
cpuintc: interrupt-controller {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
compatible = "mti,cpu-interrupt-controller";
};
package0: bus@10000000 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* ioports */
0 0x40000000 0 0x40000000 0 0x40000000
0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>;
liointc0: interrupt-controller@1fe11400 {
compatible = "loongson,liointc-2.0";
reg = <0 0x1fe11400 0 0x40>,
<0 0x1fe11040 0 0x8>,
<0 0x1fe11140 0 0x8>;
reg-names = "main", "isr0", "isr1";
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&cpuintc>;
interrupts = <2>;
interrupt-names = "int0";
loongson,parent_int_map = <0xffffffff>, /* int0 */
<0x00000000>, /* int1 */
<0x00000000>, /* int2 */
<0x00000000>; /* int3 */
};
liointc1: interrupt-controller@1fe11440 {
compatible = "loongson,liointc-2.0";
reg = <0 0x1fe11440 0 0x40>,
<0 0x1fe11048 0 0x8>,
<0 0x1fe11148 0 0x8>;
reg-names = "main", "isr0", "isr1";
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&cpuintc>;
interrupts = <3>;
interrupt-names = "int1";
loongson,parent_int_map = <0x00000000>, /* int0 */
<0xffffffff>, /* int1 */
<0x00000000>, /* int2 */
<0x00000000>; /* int3 */
};
uart0: serial@1fe00000 {
compatible = "ns16550a";
reg = <0 0x1fe00000 0 0x8>;
clock-frequency = <125000000>;
interrupt-parent = <&liointc0>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
no-loopback-test;
};
pci@1a000000 {
compatible = "loongson,ls2k-pci";
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <2>;
reg = <0 0x1a000000 0 0x02000000>,
<0xfe 0x00000000 0 0x20000000>;
ranges = <0x01000000 0x0 0x00000000 0x0 0x18000000 0x0 0x00010000>,
<0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
ehci@4,1 {
compatible = "pci0014,7a14.0",
"pci0014,7a14",
"pciclass0c0320",
"pciclass0c03";
reg = <0x2100 0x0 0x0 0x0 0x0>;
interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&liointc1>;
};
ohci@4,2 {
compatible = "pci0014,7a24.0",
"pci0014,7a24",
"pciclass0c0310",
"pciclass0c03";
reg = <0x2200 0x0 0x0 0x0 0x0>;
interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&liointc1>;
};
sata@8,0 {
compatible = "pci0014,7a08.0",
"pci0014,7a08",
"pciclass010601",
"pciclass0106";
reg = <0x4000 0x0 0x0 0x0 0x0>;
interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&liointc0>;
};
pci_bridge@9,0 {
compatible = "pci0014,7a19.0",
"pci0014,7a19",
"pciclass060400",
"pciclass0604";
reg = <0x4800 0x0 0x0 0x0 0x0>;
#interrupt-cells = <1>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&liointc1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &liointc1 0 IRQ_TYPE_LEVEL_LOW>;
external-facing;
};
pci_bridge@a,0 {
compatible = "pci0014,7a19.0",
"pci0014,7a19",
"pciclass060400",
"pciclass0604";
reg = <0x5000 0x0 0x0 0x0 0x0>;
#interrupt-cells = <1>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&liointc1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &liointc1 1 IRQ_TYPE_LEVEL_LOW>;
external-facing;
};
pci_bridge@b,0 {
compatible = "pci0014,7a19.0",
"pci0014,7a19",
"pciclass060400",
"pciclass0604";
reg = <0x5800 0x0 0x0 0x0 0x0>;
#interrupt-cells = <1>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&liointc1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &liointc1 2 IRQ_TYPE_LEVEL_LOW>;
external-facing;
};
pci_bridge@c,0 {
compatible = "pci0014,7a19.0",
"pci0014,7a19",
"pciclass060400",
"pciclass0604";
reg = <0x6000 0x0 0x0 0x0 0x0>;
#interrupt-cells = <1>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&liointc1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &liointc1 3 IRQ_TYPE_LEVEL_LOW>;
external-facing;
};
pci_bridge@d,0 {
compatible = "pci0014,7a19.0",
"pci0014,7a19",
"pciclass060400",
"pciclass0604";
reg = <0x6800 0x0 0x0 0x0 0x0>;
#interrupt-cells = <1>;
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&liointc1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &liointc1 4 IRQ_TYPE_LEVEL_LOW>;
external-facing;
};
pci_bridge@e,0 {
compatible = "pci0014,7a19.0",
"pci0014,7a19",
"pciclass060400",
"pciclass0604";
reg = <0x7000 0x0 0x0 0x0 0x0>;
#interrupt-cells = <1>;
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&liointc1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &liointc1 5 IRQ_TYPE_LEVEL_LOW>;
external-facing;
};
};
};
};
arch/mips/boot/dts/loongson/loongson64_2core_2k1000.dts 0 → 100644
View file @ 77d51337
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "loongson64-2k1000.dtsi"
/ {
compatible = "loongson,loongson64-2core-2k1000";
};
arch/mips/cavium-octeon/oct_ilm.c
View file @ 77d51337
......@@ -62,7 +62,7 @@ static int reset_statistics(void *data, u64 value)
return 0;
}
DEFINE_SIMPLE_ATTRIBUTE(reset_statistics_ops, NULL, reset_statistics, "%llu\n");
DEFINE_DEBUGFS_ATTRIBUTE(reset_statistics_ops, NULL, reset_statistics, "%llu\n");
static void init_debugfs(void)
{
......
arch/mips/cavium-octeon/octeon-memcpy.S
View file @ 77d51337
......@@ -150,8 +150,12 @@ LEAF(memcpy) /* a0=dst a1=src a2=len */
EXPORT_SYMBOL(memcpy)
move v0, dst /* return value */
__memcpy:
FEXPORT(__copy_user)
EXPORT_SYMBOL(__copy_user)
FEXPORT(__raw_copy_from_user)
EXPORT_SYMBOL(__raw_copy_from_user)
FEXPORT(__raw_copy_to_user)
EXPORT_SYMBOL(__raw_copy_to_user)
FEXPORT(__raw_copy_in_user)
EXPORT_SYMBOL(__raw_copy_in_user)
/*
* Note: dst & src may be unaligned, len may be 0
* Temps
......
arch/mips/configs/bigsur_defconfig
View file @ 77d51337
......@@ -105,10 +105,6 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m
CONFIG_BLK_DEV_NBD=m
CONFIG_EEPROM_LEGACY=y
CONFIG_EEPROM_MAX6875=y
CONFIG_IDE=y
CONFIG_BLK_DEV_IDECD=y
CONFIG_BLK_DEV_IDETAPE=y
CONFIG_BLK_DEV_TC86C001=m
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_ST=y
CONFIG_BLK_DEV_SR=y
......
arch/mips/configs/loongson2k_defconfig 0 → 100644
View file @ 77d51337
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_KERNEL_LZMA=y
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_AUDIT=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
CONFIG_TASKSTATS=y
CONFIG_TASK_DELAY_ACCT=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y
CONFIG_MEMCG=y
CONFIG_BLK_CGROUP=y
CONFIG_SCHED_AUTOGROUP=y
CONFIG_SYSFS_DEPRECATED=y
CONFIG_RELAY=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EMBEDDED=y
CONFIG_MACH_LOONGSON64=y
# CONFIG_CPU_LOONGSON3_CPUCFG_EMULATION is not set
CONFIG_HZ_256=y
CONFIG_MIPS32_O32=y
CONFIG_MIPS32_N32=y
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_IOSCHED_BFQ=y
CONFIG_BFQ_GROUP_IOSCHED=y
CONFIG_BINFMT_MISC=m
CONFIG_KSM=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_IP_ROUTE_MULTIPATH=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_NETFILTER=y
CONFIG_NETFILTER_NETLINK_LOG=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
CONFIG_NETFILTER_XT_TARGET_MARK=m
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
CONFIG_NETFILTER_XT_MATCH_COMMENT=m
CONFIG_NETFILTER_XT_MATCH_DCCP=m
CONFIG_NETFILTER_XT_MATCH_ESP=m
CONFIG_NETFILTER_XT_MATCH_LENGTH=m
CONFIG_NETFILTER_XT_MATCH_LIMIT=m
CONFIG_NETFILTER_XT_MATCH_MAC=m
CONFIG_NETFILTER_XT_MATCH_MARK=m
CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
CONFIG_NETFILTER_XT_MATCH_QUOTA=m
CONFIG_NETFILTER_XT_MATCH_REALM=m
CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
CONFIG_NETFILTER_XT_MATCH_STRING=m
CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
CONFIG_IP_VS=m
CONFIG_IP_NF_IPTABLES=m
CONFIG_IP_NF_MATCH_AH=m
CONFIG_IP_NF_MATCH_ECN=m
CONFIG_IP_NF_MATCH_TTL=m
CONFIG_IP_NF_FILTER=m
CONFIG_IP_NF_TARGET_REJECT=m
CONFIG_IP_NF_MANGLE=m
CONFIG_IP_NF_TARGET_ECN=m
CONFIG_IP_NF_TARGET_TTL=m
CONFIG_IP_NF_RAW=m
CONFIG_IP_NF_ARPTABLES=m
CONFIG_IP_NF_ARPFILTER=m
CONFIG_IP_NF_ARP_MANGLE=m
CONFIG_IP_SCTP=m
CONFIG_L2TP=m
CONFIG_BRIDGE=m
CONFIG_CFG80211=m
CONFIG_CFG80211_WEXT=y
CONFIG_MAC80211=m
CONFIG_RFKILL=m
CONFIG_RFKILL_INPUT=y
CONFIG_PCIEPORTBUS=y
CONFIG_HOTPLUG_PCI_PCIE=y
CONFIG_PCIEASPM_PERFORMANCE=y
CONFIG_HOTPLUG_PCI=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_MTD=m
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_CRYPTOLOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_RAID_ATTRS=m
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_DEV_SR=y
CONFIG_CHR_DEV_SG=y
CONFIG_CHR_DEV_SCH=m
CONFIG_SCSI_CONSTANTS=y
CONFIG_SCSI_LOGGING=y
CONFIG_SCSI_SPI_ATTRS=m
CONFIG_SCSI_FC_ATTRS=m
CONFIG_ISCSI_TCP=m
CONFIG_MEGARAID_NEWGEN=y
CONFIG_MEGARAID_MM=y
CONFIG_MEGARAID_MAILBOX=y
CONFIG_MEGARAID_LEGACY=y
CONFIG_MEGARAID_SAS=y
CONFIG_ATA=y
CONFIG_SATA_AHCI=y
CONFIG_PATA_ATIIXP=y
CONFIG_MD=y
CONFIG_BLK_DEV_MD=m
CONFIG_MD_LINEAR=m
CONFIG_MD_RAID0=m
CONFIG_MD_RAID1=m
CONFIG_MD_RAID10=m
CONFIG_MD_RAID456=m
CONFIG_MD_MULTIPATH=m
CONFIG_BLK_DEV_DM=m
CONFIG_DM_CRYPT=m
CONFIG_DM_SNAPSHOT=m
CONFIG_DM_MIRROR=m
CONFIG_DM_ZERO=m
CONFIG_TARGET_CORE=m
CONFIG_TCM_IBLOCK=m
CONFIG_TCM_FILEIO=m
CONFIG_TCM_PSCSI=m
CONFIG_LOOPBACK_TARGET=m
CONFIG_ISCSI_TARGET=m
CONFIG_NETDEVICES=y
CONFIG_TUN=m
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_NET_VENDOR_ADAPTEC is not set
# CONFIG_NET_VENDOR_ALTEON is not set
# CONFIG_NET_VENDOR_AMD is not set
# CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_VENDOR_ATHEROS is not set
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_BROCADE is not set
# CONFIG_NET_VENDOR_CHELSIO is not set
# CONFIG_NET_VENDOR_CIRRUS is not set
# CONFIG_NET_VENDOR_CISCO is not set
# CONFIG_NET_VENDOR_DEC is not set
# CONFIG_NET_VENDOR_DLINK is not set
# CONFIG_NET_VENDOR_EMULEX is not set
# CONFIG_NET_VENDOR_I825XX is not set
CONFIG_E1000=y
CONFIG_E1000E=y
CONFIG_IGB=y
CONFIG_IXGB=y
CONFIG_IXGBE=y
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MELLANOX is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_MICROCHIP is not set
# CONFIG_NET_VENDOR_MICROSEMI is not set
# CONFIG_NET_VENDOR_MYRI is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_NETERION is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
# CONFIG_NET_VENDOR_NI is not set
# CONFIG_NET_VENDOR_NVIDIA is not set
# CONFIG_NET_VENDOR_OKI is not set
# CONFIG_NET_VENDOR_PACKET_ENGINES is not set
# CONFIG_NET_VENDOR_PENSANDO is not set
# CONFIG_NET_VENDOR_QLOGIC is not set
# CONFIG_NET_VENDOR_QUALCOMM is not set
# CONFIG_NET_VENDOR_RDC is not set
CONFIG_8139CP=y
CONFIG_8139TOO=y
# CONFIG_8139TOO_PIO is not set
CONFIG_R8169=y
# CONFIG_NET_VENDOR_RENESAS is not set
# CONFIG_NET_VENDOR_ROCKER is not set
# CONFIG_NET_VENDOR_SAMSUNG is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_SILAN is not set
# CONFIG_NET_VENDOR_SIS is not set
# CONFIG_NET_VENDOR_SMSC is not set
CONFIG_STMMAC_ETH=y
# CONFIG_NET_VENDOR_SUN is not set
# CONFIG_NET_VENDOR_TEHUTI is not set
# CONFIG_NET_VENDOR_TI is not set
# CONFIG_NET_VENDOR_TOSHIBA is not set
# CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m
CONFIG_PPP_BSDCOMP=m
CONFIG_PPP_DEFLATE=m
CONFIG_PPP_FILTER=y
CONFIG_PPP_MPPE=m
CONFIG_PPP_MULTILINK=y
CONFIG_PPPOE=m
CONFIG_PPPOL2TP=m
CONFIG_PPP_ASYNC=m
CONFIG_PPP_SYNC_TTY=m
CONFIG_ATH9K=m
CONFIG_HOSTAP=m
CONFIG_INPUT_LEDS=m
CONFIG_INPUT_SPARSEKMAP=y
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_XTKBD=m
# CONFIG_MOUSE_PS2 is not set
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=m
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=m
CONFIG_SERIO_LIBPS2=y
CONFIG_SERIO_RAW=m
CONFIG_LEGACY_PTY_COUNT=16
CONFIG_SERIAL_8250=y
# CONFIG_SERIAL_8250_16550A_VARIANTS is not set
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=16
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_8250_RSA=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIAL_NONSTANDARD=y
CONFIG_HW_RANDOM=y
CONFIG_RAW_DRIVER=m
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_PIIX4=y
CONFIG_GPIO_LOONGSON=y
CONFIG_SENSORS_LM75=m
CONFIG_SENSORS_LM93=m
CONFIG_SENSORS_W83627HF=m
# CONFIG_MEDIA_CEC_SUPPORT is not set
CONFIG_MEDIA_SUPPORT=m
# CONFIG_MEDIA_CONTROLLER is not set
CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_USB_VIDEO_CLASS=m
CONFIG_DRM=y
CONFIG_DRM_RADEON=y
CONFIG_FB_RADEON=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_LCD_PLATFORM=m
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
CONFIG_LOGO=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_VERBOSE_PRINTK=y
CONFIG_SND_SEQUENCER=y
CONFIG_SND_SEQ_DUMMY=m
# CONFIG_SND_ISA is not set
CONFIG_SND_HDA_INTEL=y
CONFIG_SND_HDA_HWDEP=y
CONFIG_SND_HDA_PATCH_LOADER=y
CONFIG_SND_HDA_CODEC_REALTEK=y
CONFIG_SND_HDA_CODEC_ANALOG=y
CONFIG_SND_HDA_CODEC_SIGMATEL=y
CONFIG_SND_HDA_CODEC_VIA=y
CONFIG_SND_HDA_CODEC_CONEXANT=y
# CONFIG_SND_USB is not set
CONFIG_SND_SOC=y
CONFIG_HID_A4TECH=m
CONFIG_HID_SUNPLUS=m
CONFIG_USB=y
CONFIG_USB_MON=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_UHCI_HCD=m
CONFIG_USB_STORAGE=y
CONFIG_USB_SERIAL=m
CONFIG_USB_SERIAL_OPTION=m
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_CMOS=y
CONFIG_DMADEVICES=y
# CONFIG_CPU_HWMON is not set
CONFIG_PM_DEVFREQ=y
CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
CONFIG_DEVFREQ_GOV_PERFORMANCE=y
CONFIG_DEVFREQ_GOV_POWERSAVE=y
CONFIG_DEVFREQ_GOV_USERSPACE=y
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
CONFIG_XFS_FS=y
CONFIG_XFS_QUOTA=y
CONFIG_XFS_POSIX_ACL=y
CONFIG_QUOTA=y
# CONFIG_PRINT_QUOTA_WARNING is not set
CONFIG_AUTOFS4_FS=y
CONFIG_FUSE_FS=m
CONFIG_ISO9660_FS=m
CONFIG_JOLIET=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=936
CONFIG_FAT_DEFAULT_IOCHARSET="gb2312"
CONFIG_PROC_KCORE=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_CONFIGFS_FS=y
CONFIG_CRAMFS=m
CONFIG_SQUASHFS=y
CONFIG_SQUASHFS_XATTR=y
CONFIG_NFS_FS=m
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=m
CONFIG_NFSD=m
CONFIG_NFSD_V3_ACL=y
CONFIG_NFSD_V4=y
CONFIG_CIFS=m
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_936=y
CONFIG_NLS_ASCII=y
CONFIG_NLS_UTF8=y
CONFIG_SECURITY=y
CONFIG_SECURITYFS=y
CONFIG_SECURITY_NETWORK=y
CONFIG_SECURITY_PATH=y
CONFIG_SECURITY_SELINUX=y
CONFIG_SECURITY_SELINUX_BOOTPARAM=y
CONFIG_SECURITY_SELINUX_DISABLE=y
CONFIG_DEFAULT_SECURITY_DAC=y
CONFIG_CRYPTO_SEQIV=m
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAST5=m
CONFIG_CRYPTO_CAST6=m
CONFIG_CRYPTO_SERPENT=m
CONFIG_CRYPTO_TWOFISH=m
CONFIG_CRYPTO_DEFLATE=m
CONFIG_PRINTK_TIME=y
CONFIG_FRAME_WARN=1024
CONFIG_STRIP_ASM_SYMS=y
CONFIG_MAGIC_SYSRQ=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_PREEMPT is not set
# CONFIG_FTRACE is not set
arch/mips/configs/loongson3_defconfig
View file @ 77d51337
......@@ -26,6 +26,7 @@ CONFIG_SCHED_AUTOGROUP=y
CONFIG_SYSFS_DEPRECATED=y
CONFIG_RELAY=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_BPF_SYSCALL=y
CONFIG_EMBEDDED=y
CONFIG_PERF_EVENTS=y
CONFIG_MACH_LOONGSON64=y
......@@ -39,7 +40,7 @@ CONFIG_MIPS32_O32=y
CONFIG_MIPS32_N32=y
CONFIG_VIRTUALIZATION=y
CONFIG_KVM=m
CONFIG_KVM_MIPS_VZ=y
CONFIG_KPROBES=y
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
......@@ -129,6 +130,7 @@ CONFIG_L2TP=m
CONFIG_BRIDGE=m
CONFIG_VSOCKETS=m
CONFIG_VIRTIO_VSOCKETS=m
CONFIG_BPF_JIT=y
CONFIG_CFG80211=m
CONFIG_CFG80211_WEXT=y
CONFIG_MAC80211=m
......@@ -318,6 +320,7 @@ CONFIG_USB_OHCI_HCD=y
CONFIG_USB_UHCI_HCD=m
CONFIG_USB_STORAGE=m
CONFIG_USB_SERIAL=m
CONFIG_USB_SERIAL_PL2303=m
CONFIG_USB_SERIAL_OPTION=m
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_CMOS=y
......@@ -405,8 +408,10 @@ CONFIG_CRYPTO_DEFLATE=m
CONFIG_PRINTK_TIME=y
CONFIG_STRIP_ASM_SYMS=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_PREEMPT is not set
# CONFIG_FTRACE is not set
CONFIG_FUNCTION_TRACER=y
CONFIG_FTRACE_SYSCALLS=y
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="ieee754=relaxed"
arch/mips/configs/malta_kvm_defconfig
View file @ 77d51337
......@@ -238,9 +238,6 @@ CONFIG_BLK_DEV_NBD=m
CONFIG_BLK_DEV_RAM=y
CONFIG_CDROM_PKTCDVD=m
CONFIG_ATA_OVER_ETH=m
CONFIG_IDE=y
CONFIG_BLK_DEV_IDECD=y
CONFIG_BLK_DEV_TC86C001=m
CONFIG_RAID_ATTRS=m
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_ST=m
......
arch/mips/configs/malta_kvm_guest_defconfig deleted 100644 → 0
View file @ 3644286f
This diff is collapsed.
arch/mips/configs/maltaup_xpa_defconfig
View file @ 77d51337
......@@ -236,9 +236,6 @@ CONFIG_BLK_DEV_NBD=m
CONFIG_BLK_DEV_RAM=y
CONFIG_CDROM_PKTCDVD=m
CONFIG_ATA_OVER_ETH=m
CONFIG_IDE=y
CONFIG_BLK_DEV_IDECD=y
CONFIG_BLK_DEV_TC86C001=m
CONFIG_RAID_ATTRS=m
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_ST=m
......
arch/mips/configs/rbtx49xx_defconfig
View file @ 77d51337
......@@ -44,9 +44,6 @@ CONFIG_MTD_NAND_TXX9NDFMC=m
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_IDE=y
CONFIG_BLK_DEV_IDE_TX4938=y
CONFIG_BLK_DEV_IDE_TX4939=y
CONFIG_NETDEVICES=y
CONFIG_NE2000=y
CONFIG_SMC91X=y
......
arch/mips/configs/sb1250_swarm_defconfig
View file @ 77d51337
......@@ -17,7 +17,6 @@ CONFIG_64BIT=y
CONFIG_SMP=y
CONFIG_NR_CPUS=2
CONFIG_HZ_1000=y
CONFIG_PCI=y
CONFIG_MIPS32_O32=y
CONFIG_PM=y
CONFIG_MODULES=y
......@@ -34,25 +33,28 @@ CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m
CONFIG_INET_XFRM_MODE_BEET=m
CONFIG_TCP_MD5SIG=y
# CONFIG_IPV6 is not set
CONFIG_NETWORK_SECMARK=y
CONFIG_CFG80211=m
CONFIG_MAC80211=m
CONFIG_RFKILL=m
CONFIG_PCI=y
CONFIG_FW_LOADER=m
CONFIG_CONNECTOR=m
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=9220
CONFIG_CDROM_PKTCDVD=m
CONFIG_ATA_OVER_ETH=m
CONFIG_IDE=y
CONFIG_BLK_DEV_IDECD=y
CONFIG_BLK_DEV_IDETAPE=y
CONFIG_RAID_ATTRS=m
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_DEV_SR=y
CONFIG_CHR_DEV_SG=y
CONFIG_SCSI_CONSTANTS=y
# CONFIG_SCSI_LOWLEVEL is not set
CONFIG_ATA=y
# CONFIG_ATA_BMDMA is not set
CONFIG_PATA_PLATFORM=y
CONFIG_NETDEVICES=y
CONFIG_MACVLAN=m
CONFIG_SB1250_MAC=y
......@@ -88,18 +90,14 @@ CONFIG_CRYPTO_MICHAEL_MIC=m
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m
CONFIG_CRYPTO_CAST5=m
CONFIG_CRYPTO_CAST6=m
CONFIG_CRYPTO_DES=m
CONFIG_CRYPTO_FCRYPT=m
CONFIG_CRYPTO_KHAZAD=m
CONFIG_CRYPTO_SALSA20=m
CONFIG_CRYPTO_SEED=m
CONFIG_CRYPTO_SERPENT=m
CONFIG_CRYPTO_TEA=m
CONFIG_CRYPTO_TWOFISH=m
CONFIG_CRYPTO_DEFLATE=m
CONFIG_CRYPTO_LZO=m
......
arch/mips/configs/workpad_defconfig
View file @ 77d51337
......@@ -26,9 +26,12 @@ CONFIG_IP_MULTICAST=y
# CONFIG_IPV6 is not set
CONFIG_NETWORK_SECMARK=y
CONFIG_BLK_DEV_RAM=m
CONFIG_IDE=y
CONFIG_BLK_DEV_IDECS=m
CONFIG_IDE_GENERIC=y
# CONFIG_SCSI_PROC_FS is not set
# CONFIG_SCSI_LOWLEVEL is not set
CONFIG_ATA=y
# CONFIG_ATA_VERBOSE_ERROR is not set
# CONFIG_ATA_FORCE is not set
# CONFIG_ATA_BMDMA is not set
CONFIG_NETDEVICES=y
CONFIG_PCMCIA_3C574=m
CONFIG_PCMCIA_3C589=m
......
arch/mips/crypto/.gitignore 0 → 100644
View file @ 77d51337
# SPDX-License-Identifier: GPL-2.0-only
poly1305-core.S
arch/mips/generic/board-boston.its.S
View file @ 77d51337
/ {
images {
fdt@boston {
fdt-boston {
description = "img,boston Device Tree";
data = /incbin/("boot/dts/img/boston.dtb");
type = "flat_dt";
arch = "mips";
compression = "none";
hash@0 {
hash {
algo = "sha1";
};
};
};
configurations {
conf@boston {
conf-boston {
description = "Boston Linux kernel";
kernel = "kernel@0";
fdt = "fdt@boston";
kernel = "kernel";
fdt = "fdt-boston";
};
};
};
arch/mips/generic/board-jaguar2.its.S
View file @ 77d51337
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
/ {
images {
fdt@jaguar2_pcb110 {
fdt-jaguar2_pcb110 {
description = "MSCC Jaguar2 PCB110 Device Tree";
data = /incbin/("boot/dts/mscc/jaguar2_pcb110.dtb");
type = "flat_dt";
arch = "mips";
compression = "none";
hash@0 {
hash {
algo = "sha1";
};
};
fdt@jaguar2_pcb111 {
fdt-jaguar2_pcb111 {
description = "MSCC Jaguar2 PCB111 Device Tree";
data = /incbin/("boot/dts/mscc/jaguar2_pcb111.dtb");
type = "flat_dt";
arch = "mips";
compression = "none";
hash@0 {
hash {
algo = "sha1";
};
};
......@@ -26,14 +26,14 @@
configurations {
pcb110 {
description = "Jaguar2 Linux kernel";
kernel = "kernel@0";
fdt = "fdt@jaguar2_pcb110";
kernel = "kernel";
fdt = "fdt-jaguar2_pcb110";
ramdisk = "ramdisk";
};
pcb111 {
description = "Jaguar2 Linux kernel";
kernel = "kernel@0";
fdt = "fdt@jaguar2_pcb111";
kernel = "kernel";
fdt = "fdt-jaguar2_pcb111";
ramdisk = "ramdisk";
};
};
......
arch/mips/generic/board-luton.its.S
View file @ 77d51337
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
/ {
images {
fdt@luton_pcb091 {
fdt-luton_pcb091 {
description = "MSCC Luton PCB091 Device Tree";
data = /incbin/("boot/dts/mscc/luton_pcb091.dtb");
type = "flat_dt";
arch = "mips";
compression = "none";
hash@0 {
hash {
algo = "sha1";
};
};
......@@ -16,8 +16,8 @@
configurations {
pcb091 {
description = "Luton Linux kernel";
kernel = "kernel@0";
fdt = "fdt@luton_pcb091";
kernel = "kernel";
fdt = "fdt-luton_pcb091";
};
};
};
arch/mips/generic/board-ni169445.its.S
View file @ 77d51337
/ {
images {
fdt@ni169445 {
fdt-ni169445 {
description = "NI 169445 device tree";
data = /incbin/("boot/dts/ni/169445.dtb");
type = "flat_dt";
arch = "mips";
compression = "none";
hash@0 {
hash {
algo = "sha1";
};
};
};
configurations {
conf@ni169445 {
conf-ni169445 {
description = "NI 169445 Linux Kernel";
kernel = "kernel@0";
fdt = "fdt@ni169445";
kernel = "kernel";
fdt = "fdt-ni169445";
};
};
};
arch/mips/generic/board-ocelot.its.S
View file @ 77d51337
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
/ {
images {
fdt@ocelot_pcb123 {
fdt-ocelot_pcb123 {
description = "MSCC Ocelot PCB123 Device Tree";
data = /incbin/("boot/dts/mscc/ocelot_pcb123.dtb");
type = "flat_dt";
arch = "mips";
compression = "none";
hash@0 {
hash {
algo = "sha1";
};
};
fdt@ocelot_pcb120 {
fdt-ocelot_pcb120 {
description = "MSCC Ocelot PCB120 Device Tree";
data = /incbin/("boot/dts/mscc/ocelot_pcb120.dtb");
type = "flat_dt";
arch = "mips";
compression = "none";
hash@0 {
hash {
algo = "sha1";
};
};
};
configurations {
conf@ocelot_pcb123 {
conf-ocelot_pcb123 {
description = "Ocelot Linux kernel";
kernel = "kernel@0";
fdt = "fdt@ocelot_pcb123";
kernel = "kernel";
fdt = "fdt-ocelot_pcb123";
};
conf@ocelot_pcb120 {
conf-ocelot_pcb120 {
description = "Ocelot Linux kernel";
kernel = "kernel@0";
fdt = "fdt@ocelot_pcb120";
kernel = "kernel";
fdt = "fdt-ocelot_pcb120";
};
};
};
arch/mips/generic/board-serval.its.S
View file @ 77d51337
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
/ {
images {
fdt@serval_pcb105 {
fdt-serval_pcb105 {
description = "MSCC Serval PCB105 Device Tree";
data = /incbin/("boot/dts/mscc/serval_pcb105.dtb");
type = "flat_dt";
arch = "mips";
compression = "none";
hash@0 {
hash {
algo = "sha1";
};
};
......@@ -16,8 +16,8 @@
configurations {
pcb105 {
description = "Serval Linux kernel";
kernel = "kernel@0";
fdt = "fdt@serval_pcb105";
kernel = "kernel";
fdt = "fdt-serval_pcb105";
ramdisk = "ramdisk";
};
};
......
arch/mips/generic/board-xilfpga.its.S
View file @ 77d51337
/ {
images {
fdt@xilfpga {
fdt-xilfpga {
description = "MIPSfpga (xilfpga) Device Tree";
data = /incbin/("boot/dts/xilfpga/nexys4ddr.dtb");
type = "flat_dt";
arch = "mips";
compression = "none";
hash@0 {
hash {
algo = "sha1";
};
};
};
configurations {
conf@xilfpga {
conf-xilfpga {
description = "MIPSfpga Linux kernel";
kernel = "kernel@0";
fdt = "fdt@xilfpga";
kernel = "kernel";
fdt = "fdt-xilfpga";
};
};
};
arch/mips/generic/vmlinux.its.S
View file @ 77d51337
......@@ -6,7 +6,7 @@
#address-cells = <ADDR_CELLS>;
images {
kernel@0 {
kernel {
description = KERNEL_NAME;
data = /incbin/(VMLINUX_BINARY);
type = "kernel";
......@@ -15,18 +15,18 @@
compression = VMLINUX_COMPRESSION;
load = /bits/ ADDR_BITS <VMLINUX_LOAD_ADDRESS>;
entry = /bits/ ADDR_BITS <VMLINUX_ENTRY_ADDRESS>;
hash@0 {
hash {
algo = "sha1";
};
};
};
configurations {
default = "conf@default";
default = "conf-default";
conf@default {
conf-default {
description = "Generic Linux kernel";
kernel = "kernel@0";
kernel = "kernel";
};
};
};
arch/mips/include/asm/Kbuild
View file @ 77d51337
# SPDX-License-Identifier: GPL-2.0
# MIPS headers
generated-y += syscall_table_32_o32.h
generated-y += syscall_table_64_n32.h
generated-y += syscall_table_64_n64.h
generated-y += syscall_table_64_o32.h
generated-y += syscall_table_n32.h
generated-y += syscall_table_n64.h
generated-y += syscall_table_o32.h
generated-y += unistd_nr_n32.h
generated-y += unistd_nr_n64.h
generated-y += unistd_nr_o32.h
......
arch/mips/include/asm/asmmacro.h
View file @ 77d51337
......@@ -44,8 +44,7 @@
.endm
#endif
#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR5) || \
defined(CONFIG_CPU_MIPSR6)
#ifdef CONFIG_CPU_HAS_DIEI
.macro local_irq_enable reg=t0
ei
irq_enable_hazard
......
arch/mips/include/asm/bootinfo.h
View file @ 77d51337
......@@ -107,7 +107,7 @@ extern void (*free_init_pages_eva)(void *begin, void *end);
extern char arcs_cmdline[COMMAND_LINE_SIZE];
/*
* Registers a0, a1, a3 and a4 as passed to the kernel entry by firmware
* Registers a0, a1, a2 and a3 as passed to the kernel entry by firmware
*/
extern unsigned long fw_arg0, fw_arg1, fw_arg2, fw_arg3;
......
arch/mips/include/asm/div64.h
View file @ 77d51337
/*
* Copyright (C) 2000, 2004 Maciej W. Rozycki
* Copyright (C) 2000, 2004, 2021 Maciej W. Rozycki
* Copyright (C) 2003, 07 Ralf Baechle (ralf@linux-mips.org)
*
* This file is subject to the terms and conditions of the GNU General Public
......@@ -9,25 +9,18 @@
#ifndef __ASM_DIV64_H
#define __ASM_DIV64_H
#include <asm-generic/div64.h>
#if BITS_PER_LONG == 64
#include <asm/bitsperlong.h>
#include <linux/types.h>
#if BITS_PER_LONG == 32
/*
* No traps on overflows for any of these...
*/
#define __div64_32(n, base) \
({ \
#define do_div64_32(res, high, low, base) ({ \
unsigned long __cf, __tmp, __tmp2, __i; \
unsigned long __quot32, __mod32; \
unsigned long __high, __low; \
unsigned long long __n; \
\
__high = *__n >> 32; \
__low = __n; \
__asm__( \
" .set push \n" \
" .set noat \n" \
......@@ -51,18 +44,48 @@
" subu %0, %0, %z6 \n" \
" addiu %2, %2, 1 \n" \
"3: \n" \
" bnez %4, 0b\n\t" \
" srl %5, %1, 0x1f\n\t" \
" bnez %4, 0b \n" \
" srl %5, %1, 0x1f \n" \
" .set pop" \
: "=&r" (__mod32), "=&r" (__tmp), \
"=&r" (__quot32), "=&r" (__cf), \
"=&r" (__i), "=&r" (__tmp2) \
: "Jr" (base), "0" (__high), "1" (__low)); \
: "Jr" (base), "0" (high), "1" (low)); \
\
(__n) = __quot32; \
(res) = __quot32; \
__mod32; \
})
#endif /* BITS_PER_LONG == 64 */
#define __div64_32(n, base) ({ \
unsigned long __upper, __low, __high, __radix; \
unsigned long long __quot; \
unsigned long long __div; \
unsigned long __mod; \
\
__div = (*n); \
__radix = (base); \
\
__high = __div >> 32; \
__low = __div; \
\
if (__high < __radix) { \
__upper = __high; \
__high = 0; \
} else { \
__upper = __high % __radix; \
__high /= __radix; \
} \
\
__mod = do_div64_32(__low, __upper, __low, __radix); \
\
__quot = __high; \
__quot = __quot << 32 | __low; \
(*n) = __quot; \
__mod; \
})
#endif /* BITS_PER_LONG == 32 */
#include <asm-generic/div64.h>
#endif /* __ASM_DIV64_H */
arch/mips/include/asm/io.h
View file @ 77d51337
......@@ -100,11 +100,23 @@ static inline void set_io_port_base(unsigned long base)
* almost all conceivable cases a device driver should not be using
* this function
*/
static inline unsigned long virt_to_phys(volatile const void *address)
static inline unsigned long __virt_to_phys_nodebug(volatile const void *address)
{
return __pa(address);
}
#ifdef CONFIG_DEBUG_VIRTUAL
extern phys_addr_t __virt_to_phys(volatile const void *x);
#else
#define __virt_to_phys(x) __virt_to_phys_nodebug(x)
#endif
#define virt_to_phys virt_to_phys
static inline phys_addr_t virt_to_phys(const volatile void *x)
{
return __virt_to_phys(x);
}
/*
* phys_to_virt - map physical address to virtual
* @address: address to remap
......
arch/mips/include/asm/kvm_host.h
View file @ 77d51337
This diff is collapsed.
arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
View file @ 77d51337
......@@ -157,4 +157,12 @@
.macro smp_slave_setup
.endm
#define USE_KEXEC_SMP_WAIT_FINAL
.macro kexec_smp_wait_final
.set push
.set noreorder
synci 0($0)
.set pop
.endm
#endif /* __ASM_MACH_CAVIUM_OCTEON_KERNEL_ENTRY_H */
arch/mips/include/asm/mach-generic/spaces.h
View file @ 77d51337
......@@ -30,11 +30,7 @@
#endif /* __ASSEMBLY__ */
#ifdef CONFIG_32BIT
#ifdef CONFIG_KVM_GUEST
#define CAC_BASE _AC(0x40000000, UL)
#else
#define CAC_BASE _AC(0x80000000, UL)
#endif
#ifndef IO_BASE
#define IO_BASE _AC(0xa0000000, UL)
#endif
......@@ -43,12 +39,8 @@
#endif
#ifndef MAP_BASE
#ifdef CONFIG_KVM_GUEST
#define MAP_BASE _AC(0x60000000, UL)
#else
#define MAP_BASE _AC(0xc0000000, UL)
#endif
#endif
/*
* Memory above this physical address will be considered highmem.
......@@ -100,11 +92,7 @@
#endif
#ifndef FIXADDR_TOP
#ifdef CONFIG_KVM_GUEST
#define FIXADDR_TOP ((unsigned long)(long)(int)0x7ffe0000)
#else
#define FIXADDR_TOP ((unsigned long)(long)(int)0xfffe0000)
#endif
#endif
#endif /* __ASM_MACH_GENERIC_SPACES_H */
arch/mips/include/asm/mach-loongson64/boot_param.h
View file @ 77d51337
......@@ -198,33 +198,6 @@ enum loongson_bridge_type {
VIRTUAL = 3
};
struct loongson_system_configuration {
u32 nr_cpus;
u32 nr_nodes;
int cores_per_node;
int cores_per_package;
u16 boot_cpu_id;
u16 reserved_cpus_mask;
enum loongson_cpu_type cputype;
enum loongson_bridge_type bridgetype;
u64 ht_control_base;
u64 pci_mem_start_addr;
u64 pci_mem_end_addr;
u64 pci_io_base;
u64 restart_addr;
u64 poweroff_addr;
u64 suspend_addr;
u64 vgabios_addr;
u32 dma_mask_bits;
char ecname[32];
u32 nr_uarts;
struct uart_device uarts[MAX_UARTS];
u32 nr_sensors;
struct sensor_device sensors[MAX_SENSORS];
u64 workarounds;
void (*early_config)(void);
};
extern struct efi_memory_map_loongson *loongson_memmap;
extern struct loongson_system_configuration loongson_sysconf;
......
arch/mips/include/asm/mach-loongson64/builtin_dtbs.h
View file @ 77d51337
......@@ -8,6 +8,7 @@
#ifndef __ASM_MACH_LOONGSON64_BUILTIN_DTBS_H_
#define __ASM_MACH_LOONGSON64_BUILTIN_DTBS_H_
extern u32 __dtb_loongson64_2core_2k1000_begin[];
extern u32 __dtb_loongson64c_4core_ls7a_begin[];
extern u32 __dtb_loongson64c_4core_rs780e_begin[];
extern u32 __dtb_loongson64c_8core_rs780e_begin[];
......
arch/mips/include/asm/mach-loongson64/kernel-entry-init.h
View file @ 77d51337
......@@ -75,4 +75,31 @@
.set pop
.endm
#define USE_KEXEC_SMP_WAIT_FINAL
.macro kexec_smp_wait_final
/* s0:prid s1:initfn */
/* a0:base t1:cpuid t2:node t9:count */
mfc0 t1, CP0_EBASE
andi t1, MIPS_EBASE_CPUNUM
dins a0, t1, 8, 2 /* insert core id*/
dext t2, t1, 2, 2
dins a0, t2, 44, 2 /* insert node id */
mfc0 s0, CP0_PRID
andi s0, s0, (PRID_IMP_MASK | PRID_REV_MASK)
beq s0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3B_R1), 1f
beq s0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3B_R2), 1f
b 2f /* Loongson-3A1000/3A2000/3A3000/3A4000 */
1: dins a0, t2, 14, 2 /* Loongson-3B1000/3B1500 need bit 15~14 */
2: li t9, 0x100 /* wait for init loop */
3: addiu t9, -1 /* limit mailbox access */
bnez t9, 3b
lw s1, 0x20(a0) /* check PC as an indicator */
beqz s1, 2b
ld s1, 0x20(a0) /* get PC via mailbox reg0 */
ld sp, 0x28(a0) /* get SP via mailbox reg1 */
ld gp, 0x30(a0) /* get GP via mailbox reg2 */
ld a1, 0x38(a0)
jr s1 /* jump to initial PC */
.endm
#endif /* __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H */
arch/mips/include/asm/mach-loongson64/loongson.h
View file @ 77d51337
......@@ -12,6 +12,30 @@
#include <linux/irq.h>
#include <boot_param.h>
enum loongson_fw_interface {
LOONGSON_LEFI,
LOONGSON_DTB,
};
/* machine-specific boot configuration */
struct loongson_system_configuration {
enum loongson_fw_interface fw_interface;
u32 nr_cpus;
u32 nr_nodes;
int cores_per_node;
int cores_per_package;
u16 boot_cpu_id;
u16 reserved_cpus_mask;
enum loongson_cpu_type cputype;
enum loongson_bridge_type bridgetype;
u64 restart_addr;
u64 poweroff_addr;
u64 suspend_addr;
u64 vgabios_addr;
u32 dma_mask_bits;
u64 workarounds;
void (*early_config)(void);
};
/* machine-specific reboot/halt operation */
extern void mach_prepare_reboot(void);
......@@ -23,7 +47,8 @@ extern u32 memsize, highmemsize;
extern const struct plat_smp_ops loongson3_smp_ops;
/* loongson-specific command line, env and memory initialization */
extern void __init prom_init_env(void);
extern void __init prom_dtb_init_env(void);
extern void __init prom_lefi_init_env(void);
extern void __init szmem(unsigned int node);
extern void *loongson_fdt_blob;
......
arch/mips/include/asm/mach-ralink/mt7621.h
View file @ 77d51337
......@@ -24,9 +24,10 @@
#define CHIP_REV_VER_SHIFT 8
#define CHIP_REV_ECO_MASK 0xf
#define MT7621_DRAM_BASE 0x0
#define MT7621_DDR2_SIZE_MIN 32
#define MT7621_DDR2_SIZE_MAX 256
#define MT7621_LOWMEM_BASE 0x0
#define MT7621_LOWMEM_MAX_SIZE 0x1C000000
#define MT7621_HIGHMEM_BASE 0x20000000
#define MT7621_HIGHMEM_SIZE 0x4000000
#define MT7621_CHIP_NAME0 0x3637544D
#define MT7621_CHIP_NAME1 0x20203132
......
arch/mips/include/asm/mips-cps.h
View file @ 77d51337
......@@ -10,6 +10,8 @@
#include <linux/io.h>
#include <linux/types.h>
#include <asm/mips-boards/launch.h>
extern unsigned long __cps_access_bad_size(void)
__compiletime_error("Bad size for CPS accessor");
......@@ -165,11 +167,30 @@ static inline uint64_t mips_cps_cluster_config(unsigned int cluster)
*/
static inline unsigned int mips_cps_numcores(unsigned int cluster)
{
unsigned int ncores;
if (!mips_cm_present())
return 0;
/* Add one before masking to handle 0xff indicating no cores */
return (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
ncores = (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
if (IS_ENABLED(CONFIG_SOC_MT7621)) {
struct cpulaunch *launch;
/*
* Ralink MT7621S SoC is single core, but the GCR_CONFIG method
* always reports 2 cores. Check the second core's LAUNCH_FREADY
* flag to detect if the second core is missing. This method
* only works before the core has been started.
*/
launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH);
launch += 2; /* MT7621 has 2 VPEs per core */
if (!(launch->flags & LAUNCH_FREADY))
ncores = 1;
}
return ncores;
}
/**
......
arch/mips/include/asm/octeon/cvmx-address.h
View file @ 77d51337
......@@ -152,7 +152,7 @@ typedef union {
/* physical mem address */
struct {
/* techically, <47:40> are dont-cares */
/* technically, <47:40> are dont-cares */
uint64_t zeroes:24;
/* the hardware ignores <39:36> in Octeon I */
uint64_t unaddr:4;
......
arch/mips/include/asm/octeon/cvmx-bootinfo.h
View file @ 77d51337
......@@ -298,6 +298,7 @@ enum cvmx_board_types_enum {
CVMX_BOARD_TYPE_UBNT_E200 = 20003,
CVMX_BOARD_TYPE_UBNT_E220 = 20005,
CVMX_BOARD_TYPE_CUST_DSR1000N = 20006,
CVMX_BOARD_TYPE_UBNT_E300 = 20300,
CVMX_BOARD_TYPE_KONTRON_S1901 = 21901,
CVMX_BOARD_TYPE_CUST_PRIVATE_MAX = 30000,
......@@ -401,6 +402,7 @@ static inline const char *cvmx_board_type_to_string(enum
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E200)
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E220)
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DSR1000N)
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E300)
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_KONTRON_S1901)
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MAX)
}
......
arch/mips/include/asm/page.h
View file @ 77d51337
......@@ -210,9 +210,16 @@ static inline unsigned long ___pa(unsigned long x)
* also affect MIPS so we keep this one until GCC 3.x has been retired
* before we can apply https://patchwork.linux-mips.org/patch/1541/
*/
#define __pa_symbol_nodebug(x) __pa(RELOC_HIDE((unsigned long)(x), 0))
#ifdef CONFIG_DEBUG_VIRTUAL
extern phys_addr_t __phys_addr_symbol(unsigned long x);
#else
#define __phys_addr_symbol(x) __pa_symbol_nodebug(x)
#endif
#ifndef __pa_symbol
#define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x), 0))
#define __pa_symbol(x) __phys_addr_symbol((unsigned long)(x))
#endif
#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
......
arch/mips/include/asm/pci.h
View file @ 77d51337
......@@ -38,7 +38,6 @@ struct pci_controller {
struct resource *io_resource;
unsigned long io_offset;
unsigned long io_map_base;
struct resource *busn_resource;
#ifndef CONFIG_PCI_DOMAINS_GENERIC
unsigned int index;
......
arch/mips/include/asm/processor.h
View file @ 77d51337
......@@ -32,16 +32,11 @@ extern unsigned int vced_count, vcei_count;
extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
#ifdef CONFIG_32BIT
#ifdef CONFIG_KVM_GUEST
/* User space process size is limited to 1GB in KVM Guest Mode */
#define TASK_SIZE 0x3fff8000UL
#else
/*
* User space process size: 2GB. This is hardcoded into a few places,
* so don't change it unless you know what you are doing.
*/
#define TASK_SIZE 0x80000000UL
#endif
#define STACK_TOP_MAX TASK_SIZE
......@@ -226,10 +221,6 @@ struct nlm_cop2_state {
#define COP2_INIT
#endif
typedef struct {
unsigned long seg;
} mm_segment_t;
#ifdef CONFIG_CPU_HAS_MSA
# define ARCH_MIN_TASKALIGN 16
# define FPU_ALIGN __aligned(16)
......
arch/mips/include/asm/thread_info.h
View file @ 77d51337
......@@ -28,11 +28,6 @@ struct thread_info {
unsigned long tp_value; /* thread pointer */
__u32 cpu; /* current CPU */
int preempt_count; /* 0 => preemptable, <0 => BUG */
mm_segment_t addr_limit; /*
* thread address space limit:
* 0x7fffffff for user-thead
* 0xffffffff for kernel-thread
*/
struct pt_regs *regs;
long syscall; /* syscall number */
};
......@@ -46,7 +41,6 @@ struct thread_info {
.flags = _TIF_FIXADE, \
.cpu = 0, \
.preempt_count = INIT_PREEMPT_COUNT, \
.addr_limit = KERNEL_DS, \
}
/*
......
arch/mips/include/asm/uaccess.h
View file @ 77d51337
This diff is collapsed.
arch/mips/include/asm/vdso/gettimeofday.h
View file @ 77d51337
......@@ -20,6 +20,12 @@
#define VDSO_HAS_CLOCK_GETRES 1
#if MIPS_ISA_REV < 6
#define VDSO_SYSCALL_CLOBBERS "hi", "lo",
#else
#define VDSO_SYSCALL_CLOBBERS
#endif
static __always_inline long gettimeofday_fallback(
struct __kernel_old_timeval *_tv,
struct timezone *_tz)
......@@ -35,7 +41,9 @@ static __always_inline long gettimeofday_fallback(
: "=r" (ret), "=r" (error)
: "r" (tv), "r" (tz), "r" (nr)
: "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
"$14", "$15", "$24", "$25", "hi", "lo", "memory");
"$14", "$15", "$24", "$25",
VDSO_SYSCALL_CLOBBERS
"memory");
return error ? -ret : ret;
}
......@@ -59,7 +67,9 @@ static __always_inline long clock_gettime_fallback(
: "=r" (ret), "=r" (error)
: "r" (clkid), "r" (ts), "r" (nr)
: "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
"$14", "$15", "$24", "$25", "hi", "lo", "memory");
"$14", "$15", "$24", "$25",
VDSO_SYSCALL_CLOBBERS
"memory");
return error ? -ret : ret;
}
......@@ -83,7 +93,9 @@ static __always_inline int clock_getres_fallback(
: "=r" (ret), "=r" (error)
: "r" (clkid), "r" (ts), "r" (nr)
: "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
"$14", "$15", "$24", "$25", "hi", "lo", "memory");
"$14", "$15", "$24", "$25",
VDSO_SYSCALL_CLOBBERS
"memory");
return error ? -ret : ret;
}
......@@ -105,7 +117,9 @@ static __always_inline long clock_gettime32_fallback(
: "=r" (ret), "=r" (error)
: "r" (clkid), "r" (ts), "r" (nr)
: "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
"$14", "$15", "$24", "$25", "hi", "lo", "memory");
"$14", "$15", "$24", "$25",
VDSO_SYSCALL_CLOBBERS
"memory");
return error ? -ret : ret;
}
......@@ -125,7 +139,9 @@ static __always_inline int clock_getres32_fallback(
: "=r" (ret), "=r" (error)
: "r" (clkid), "r" (ts), "r" (nr)
: "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
"$14", "$15", "$24", "$25", "hi", "lo", "memory");
"$14", "$15", "$24", "$25",
VDSO_SYSCALL_CLOBBERS
"memory");
return error ? -ret : ret;
}
......
arch/mips/kernel/Makefile
View file @ 77d51337
......@@ -17,10 +17,10 @@ obj-y += cpu-probe.o
endif
ifdef CONFIG_FUNCTION_TRACER
CFLAGS_REMOVE_ftrace.o = -pg
CFLAGS_REMOVE_early_printk.o = -pg
CFLAGS_REMOVE_perf_event.o = -pg
CFLAGS_REMOVE_perf_event_mipsxx.o = -pg
CFLAGS_REMOVE_ftrace.o = $(CC_FLAGS_FTRACE)
CFLAGS_REMOVE_early_printk.o = $(CC_FLAGS_FTRACE)
CFLAGS_REMOVE_perf_event.o = $(CC_FLAGS_FTRACE)
CFLAGS_REMOVE_perf_event_mipsxx.o = $(CC_FLAGS_FTRACE)
endif
obj-$(CONFIG_CEVT_BCM1480) += cevt-bcm1480.o
......
arch/mips/kernel/access-helper.h 0 → 100644
View file @ 77d51337
/* SPDX-License-Identifier: GPL-2.0 */
#include <linux/uaccess.h>
static inline int __get_addr(unsigned long *a, unsigned long *p, bool user)
{
return user ? get_user(*a, (unsigned long __user *)p) :
get_kernel_nofault(*a, p);
}
static inline int __get_inst16(u16 *i, u16 *p, bool user)
{
return user ? get_user(*i, (u16 __user *)p) : get_kernel_nofault(*i, p);
}
static inline int __get_inst32(u32 *i, u32 *p, bool user)
{
return user ? get_user(*i, (u32 __user *)p) : get_kernel_nofault(*i, p);
}
arch/mips/kernel/asm-offsets.c
View file @ 77d51337
......@@ -98,7 +98,6 @@ void output_thread_info_defines(void)
OFFSET(TI_TP_VALUE, thread_info, tp_value);
OFFSET(TI_CPU, thread_info, cpu);
OFFSET(TI_PRE_COUNT, thread_info, preempt_count);
OFFSET(TI_ADDR_LIMIT, thread_info, addr_limit);
OFFSET(TI_REGS, thread_info, regs);
DEFINE(_THREAD_SIZE, THREAD_SIZE);
DEFINE(_THREAD_MASK, THREAD_MASK);
......
arch/mips/kernel/cevt-r4k.c
View file @ 77d51337
......@@ -195,10 +195,6 @@ int c0_compare_int_usable(void)
unsigned int delta;
unsigned int cnt;
#ifdef CONFIG_KVM_GUEST
return 1;
#endif
/*
* IP7 already pending? Try to clear it by acking the timer.
*/
......
arch/mips/kernel/cpu-probe.c
View file @ 77d51337
......@@ -1752,7 +1752,6 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
set_isa(c, MIPS_CPU_ISA_M64R2);
break;
}
c->writecombine = _CACHE_UNCACHED_ACCELERATED;
c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_EXT |
MIPS_ASE_LOONGSON_EXT2);
break;
......@@ -1782,7 +1781,6 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
* register, we correct it here.
*/
c->options |= MIPS_CPU_FTLB | MIPS_CPU_TLBINV | MIPS_CPU_LDPTE;
c->writecombine = _CACHE_UNCACHED_ACCELERATED;
c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
MIPS_ASE_LOONGSON_EXT | MIPS_ASE_LOONGSON_EXT2);
c->ases &= ~MIPS_ASE_VZ; /* VZ of Loongson-3A2000/3000 is incomplete */
......@@ -1793,7 +1791,6 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
set_elf_platform(cpu, "loongson3a");
set_isa(c, MIPS_CPU_ISA_M64R2);
decode_cpucfg(c);
c->writecombine = _CACHE_UNCACHED_ACCELERATED;
break;
default:
panic("Unknown Loongson Processor ID!");
......
arch/mips/kernel/ftrace.c
View file @ 77d51337
......@@ -90,7 +90,6 @@ static int ftrace_modify_code_2(unsigned long ip, unsigned int new_code1,
unsigned int new_code2)
{
int faulted;
mm_segment_t old_fs;
safe_store_code(new_code1, ip, faulted);
if (unlikely(faulted))
......@@ -102,10 +101,7 @@ static int ftrace_modify_code_2(unsigned long ip, unsigned int new_code1,
return -EFAULT;
ip -= 4;
old_fs = get_fs();
set_fs(KERNEL_DS);
flush_icache_range(ip, ip + 8);
set_fs(old_fs);
return 0;
}
......@@ -114,7 +110,6 @@ static int ftrace_modify_code_2r(unsigned long ip, unsigned int new_code1,
unsigned int new_code2)
{
int faulted;
mm_segment_t old_fs;
ip += 4;
safe_store_code(new_code2, ip, faulted);
......@@ -126,10 +121,7 @@ static int ftrace_modify_code_2r(unsigned long ip, unsigned int new_code1,
if (unlikely(faulted))
return -EFAULT;
old_fs = get_fs();
set_fs(KERNEL_DS);
flush_icache_range(ip, ip + 8);
set_fs(old_fs);
return 0;
}
......
arch/mips/kernel/process.c
View file @ 77d51337
......@@ -124,7 +124,6 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
/* kernel thread */
unsigned long status = p->thread.cp0_status;
memset(childregs, 0, sizeof(struct pt_regs));
ti->addr_limit = KERNEL_DS;
p->thread.reg16 = usp; /* fn */
p->thread.reg17 = kthread_arg;
p->thread.reg29 = childksp;
......@@ -145,7 +144,6 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
childregs->regs[2] = 0; /* Child gets zero as return value */
if (usp)
childregs->regs[29] = usp;
ti->addr_limit = USER_DS;
p->thread.reg29 = (unsigned long) childregs;
p->thread.reg31 = (unsigned long) ret_from_fork;
......
arch/mips/kernel/relocate_kernel.S
View file @ 77d51337
......@@ -11,6 +11,8 @@
#include <asm/stackframe.h>
#include <asm/addrspace.h>
#include <kernel-entry-init.h>
LEAF(relocate_new_kernel)
PTR_L a0, arg0
PTR_L a1, arg1
......@@ -125,11 +127,8 @@ LEAF(kexec_smp_wait)
1: LONG_L s0, (t0)
bne s0, zero,1b
#ifdef CONFIG_CPU_CAVIUM_OCTEON
.set push
.set noreorder
synci 0($0)
.set pop
#ifdef USE_KEXEC_SMP_WAIT_FINAL
kexec_smp_wait_final
#else
sync
#endif
......
arch/mips/kernel/scall32-o32.S
View file @ 77d51337
......@@ -48,10 +48,8 @@ NESTED(handle_sys, PT_SIZE, sp)
* We intentionally keep the kernel stack a little below the top of
* userspace so we don't have to do a slower byte accurate check here.
*/
lw t5, TI_ADDR_LIMIT($28)
addu t4, t0, 32
and t5, t4
bltz t5, bad_stack # -> sp is bad
bltz t4, bad_stack # -> sp is bad
/*
* Ok, copy the args from the luser stack to the kernel stack.
......@@ -217,9 +215,9 @@ einval: li v0, -ENOSYS
#define sys_sched_getaffinity mipsmt_sys_sched_getaffinity
#endif /* CONFIG_MIPS_MT_FPAFF */
#define __SYSCALL_WITH_COMPAT(nr, native, compat) __SYSCALL(nr, native)
#define __SYSCALL(nr, entry) PTR entry
.align 2
.type sys_call_table, @object
EXPORT(sys_call_table)
#include <asm/syscall_table_32_o32.h>
#undef __SYSCALL
#include <asm/syscall_table_o32.h>
arch/mips/kernel/scall64-n32.S
View file @ 77d51337
......@@ -104,5 +104,4 @@ not_n32_scall:
#define __SYSCALL(nr, entry) PTR entry
.type sysn32_call_table, @object
EXPORT(sysn32_call_table)
#include <asm/syscall_table_64_n32.h>
#undef __SYSCALL
#include <asm/syscall_table_n32.h>
arch/mips/kernel/scall64-n64.S
View file @ 77d51337
......@@ -113,5 +113,4 @@ illegal_syscall:
.align 3
.type sys_call_table, @object
EXPORT(sys_call_table)
#include <asm/syscall_table_64_n64.h>
#undef __SYSCALL
#include <asm/syscall_table_n64.h>
arch/mips/kernel/scall64-o32.S
View file @ 77d51337
......@@ -213,9 +213,9 @@ einval: li v0, -ENOSYS
jr ra
END(sys32_syscall)
#define __SYSCALL_WITH_COMPAT(nr, native, compat) __SYSCALL(nr, compat)
#define __SYSCALL(nr, entry) PTR entry
.align 3
.type sys32_call_table,@object
EXPORT(sys32_call_table)
#include <asm/syscall_table_64_o32.h>
#undef __SYSCALL
#include <asm/syscall_table_o32.h>
arch/mips/kernel/smp-bmips.c
View file @ 77d51337
......@@ -134,17 +134,24 @@ static void __init bmips_smp_setup(void)
if (!board_ebase_setup)
board_ebase_setup = &bmips_ebase_setup;
__cpu_number_map[boot_cpu] = 0;
__cpu_logical_map[0] = boot_cpu;
for (i = 0; i < max_cpus; i++) {
if (i != boot_cpu) {
__cpu_number_map[i] = cpu;
__cpu_logical_map[cpu] = i;
cpu++;
if (max_cpus > 1) {
__cpu_number_map[boot_cpu] = 0;
__cpu_logical_map[0] = boot_cpu;
for (i = 0; i < max_cpus; i++) {
if (i != boot_cpu) {
__cpu_number_map[i] = cpu;
__cpu_logical_map[cpu] = i;
cpu++;
}
set_cpu_possible(i, 1);
set_cpu_present(i, 1);
}
set_cpu_possible(i, 1);
set_cpu_present(i, 1);
} else {
__cpu_number_map[0] = boot_cpu;
__cpu_logical_map[0] = 0;
set_cpu_possible(0, 1);
set_cpu_present(0, 1);
}
}
......
arch/mips/kernel/spinlock_test.c
View file @ 77d51337
......@@ -35,7 +35,7 @@ static int ss_get(void *data, u64 *val)
return 0;
}
DEFINE_SIMPLE_ATTRIBUTE(fops_ss, ss_get, NULL, "%llu\n");
DEFINE_DEBUGFS_ATTRIBUTE(fops_ss, ss_get, NULL, "%llu\n");
......@@ -114,13 +114,13 @@ static int multi_get(void *data, u64 *val)
return 0;
}
DEFINE_SIMPLE_ATTRIBUTE(fops_multi, multi_get, NULL, "%llu\n");
DEFINE_DEBUGFS_ATTRIBUTE(fops_multi, multi_get, NULL, "%llu\n");
static int __init spinlock_test(void)
{
debugfs_create_file("spin_single", S_IRUGO, mips_debugfs_dir, NULL,
debugfs_create_file_unsafe("spin_single", S_IRUGO, mips_debugfs_dir, NULL,
&fops_ss);
debugfs_create_file("spin_multi", S_IRUGO, mips_debugfs_dir, NULL,
debugfs_create_file_unsafe("spin_multi", S_IRUGO, mips_debugfs_dir, NULL,
&fops_multi);
return 0;
}
......
arch/mips/kernel/syscalls/Makefile
View file @ 77d51337
......@@ -8,15 +8,12 @@ _dummy := $(shell [ -d '$(uapi)' ] || mkdir -p '$(uapi)') \
syscalln32 := $(src)/syscall_n32.tbl
syscalln64 := $(src)/syscall_n64.tbl
syscallo32 := $(src)/syscall_o32.tbl
syshdr := $(srctree)/$(src)/syscallhdr.sh
syshdr := $(srctree)/scripts/syscallhdr.sh
sysnr := $(srctree)/$(src)/syscallnr.sh
systbl := $(srctree)/$(src)/syscalltbl.sh
systbl := $(srctree)/scripts/syscalltbl.sh
quiet_cmd_syshdr = SYSHDR $@
cmd_syshdr = $(CONFIG_SHELL) '$(syshdr)' '$<' '$@' \
'$(syshdr_abis_$(basetarget))' \
'$(syshdr_pfx_$(basetarget))' \
'$(syshdr_offset_$(basetarget))'
cmd_syshdr = $(CONFIG_SHELL) $(syshdr) --offset __NR_Linux $< $@
quiet_cmd_sysnr = SYSNR $@
cmd_sysnr = $(CONFIG_SHELL) '$(sysnr)' '$<' '$@' \
......@@ -25,20 +22,14 @@ quiet_cmd_sysnr = SYSNR $@
'$(sysnr_offset_$(basetarget))'
quiet_cmd_systbl = SYSTBL $@
cmd_systbl = $(CONFIG_SHELL) '$(systbl)' '$<' '$@' \
'$(systbl_abis_$(basetarget))' \
'$(systbl_abi_$(basetarget))' \
'$(systbl_offset_$(basetarget))'
cmd_systbl = $(CONFIG_SHELL) $(systbl) $< $@
syshdr_offset_unistd_n32 := __NR_Linux
$(uapi)/unistd_n32.h: $(syscalln32) $(syshdr) FORCE
$(call if_changed,syshdr)
syshdr_offset_unistd_n64 := __NR_Linux
$(uapi)/unistd_n64.h: $(syscalln64) $(syshdr) FORCE
$(call if_changed,syshdr)
syshdr_offset_unistd_o32 := __NR_Linux
$(uapi)/unistd_o32.h: $(syscallo32) $(syshdr) FORCE
$(call if_changed,syshdr)
......@@ -57,33 +48,21 @@ sysnr_offset_unistd_nr_o32 := 4000
$(kapi)/unistd_nr_o32.h: $(syscallo32) $(sysnr) FORCE
$(call if_changed,sysnr)
systbl_abi_syscall_table_32_o32 := 32_o32
systbl_offset_syscall_table_32_o32 := 4000
$(kapi)/syscall_table_32_o32.h: $(syscallo32) $(systbl) FORCE
$(kapi)/syscall_table_n32.h: $(syscalln32) $(systbl) FORCE
$(call if_changed,systbl)
systbl_abi_syscall_table_64_n32 := 64_n32
systbl_offset_syscall_table_64_n32 := 6000
$(kapi)/syscall_table_64_n32.h: $(syscalln32) $(systbl) FORCE
$(kapi)/syscall_table_n64.h: $(syscalln64) $(systbl) FORCE
$(call if_changed,systbl)
systbl_abi_syscall_table_64_n64 := 64_n64
systbl_offset_syscall_table_64_n64 := 5000
$(kapi)/syscall_table_64_n64.h: $(syscalln64) $(systbl) FORCE
$(call if_changed,systbl)
systbl_abi_syscall_table_64_o32 := 64_o32
systbl_offset_syscall_table_64_o32 := 4000
$(kapi)/syscall_table_64_o32.h: $(syscallo32) $(systbl) FORCE
$(kapi)/syscall_table_o32.h: $(syscallo32) $(systbl) FORCE
$(call if_changed,systbl)
uapisyshdr-y += unistd_n32.h \
unistd_n64.h \
unistd_o32.h
kapisyshdr-y += syscall_table_32_o32.h \
syscall_table_64_n32.h \
syscall_table_64_n64.h \
syscall_table_64_o32.h \
kapisyshdr-y += syscall_table_n32.h \
syscall_table_n64.h \
syscall_table_o32.h \
unistd_nr_n32.h \
unistd_nr_n64.h \
unistd_nr_o32.h
......
arch/mips/kernel/syscalls/syscallhdr.sh deleted 100644 → 0
View file @ 3644286f
#!/bin/sh
# SPDX-License-Identifier: GPL-2.0
in="$1"
out="$2"
my_abis=`echo "($3)" | tr ',' '|'`
prefix="$4"
offset="$5"
fileguard=_UAPI_ASM_MIPS_`basename "$out" | sed \
-e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/' \
-e 's/[^A-Z0-9_]/_/g' -e 's/__/_/g'`
grep -E "^[0-9A-Fa-fXx]+[[:space:]]+${my_abis}" "$in" | sort -n | (
printf "#ifndef %s\n" "${fileguard}"
printf "#define %s\n" "${fileguard}"
printf "\n"
nxt=0
while read nr abi name entry compat ; do
if [ -z "$offset" ]; then
printf "#define __NR_%s%s\t%s\n" \
"${prefix}" "${name}" "${nr}"
else
printf "#define __NR_%s%s\t(%s + %s)\n" \
"${prefix}" "${name}" "${offset}" "${nr}"
fi
nxt=$((nr+1))
done
printf "\n"
printf "#ifdef __KERNEL__\n"
printf "#define __NR_syscalls\t%s\n" "${nxt}"
printf "#endif\n"
printf "\n"
printf "#endif /* %s */\n" "${fileguard}"
) > "$out"
arch/mips/kernel/syscalls/syscalltbl.sh deleted 100644 → 0
View file @ 3644286f
#!/bin/sh
# SPDX-License-Identifier: GPL-2.0
in="$1"
out="$2"
my_abis=`echo "($3)" | tr ',' '|'`
my_abi="$4"
offset="$5"
emit() {
t_nxt="$1"
t_nr="$2"
t_entry="$3"
while [ $t_nxt -lt $t_nr ]; do
printf "__SYSCALL(%s,sys_ni_syscall)\n" "${t_nxt}"
t_nxt=$((t_nxt+1))
done
printf "__SYSCALL(%s,%s)\n" "${t_nxt}" "${t_entry}"
}
grep -E "^[0-9A-Fa-fXx]+[[:space:]]+${my_abis}" "$in" | sort -n | (
nxt=0
if [ -z "$offset" ]; then
offset=0
fi
while read nr abi name entry compat ; do
if [ "$my_abi" = "64_o32" ] && [ ! -z "$compat" ]; then
emit $((nxt+offset)) $((nr+offset)) $compat
else
emit $((nxt+offset)) $((nr+offset)) $entry
fi
nxt=$((nr+1))
done
) > "$out"
arch/mips/kernel/traps.c
View file @ 77d51337
This diff is collapsed.
arch/mips/kernel/unaligned.c
View file @ 77d51337
This diff is collapsed.
arch/mips/kernel/vdso.c
View file @ 77d51337
......@@ -90,7 +90,7 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
{
struct mips_vdso_image *image = current->thread.abi->vdso;
struct mm_struct *mm = current->mm;
unsigned long gic_size, vvar_size, size, base, data_addr, vdso_addr, gic_pfn;
unsigned long gic_size, vvar_size, size, base, data_addr, vdso_addr, gic_pfn, gic_base;
struct vm_area_struct *vma;
int ret;
......@@ -158,7 +158,8 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
/* Map GIC user page. */
if (gic_size) {
gic_pfn = virt_to_phys(mips_gic_base + MIPS_GIC_USER_OFS) >> PAGE_SHIFT;
gic_base = (unsigned long)mips_gic_base + MIPS_GIC_USER_OFS;
gic_pfn = virt_to_phys((void *)gic_base) >> PAGE_SHIFT;
ret = io_remap_pfn_range(vma, base, gic_pfn, gic_size,
pgprot_noncached(vma->vm_page_prot));
......
arch/mips/kvm/Kconfig
View file @ 77d51337
......@@ -30,40 +30,6 @@ config KVM
help
Support for hosting Guest kernels.
choice
prompt "Virtualization mode"
depends on KVM
default KVM_MIPS_TE
config KVM_MIPS_TE
bool "Trap & Emulate"
depends on CPU_MIPS32_R2
help
Use trap and emulate to virtualize 32-bit guests in user mode. This
does not require any special hardware Virtualization support beyond
standard MIPS32 r2 or later, but it does require the guest kernel
to be configured with CONFIG_KVM_GUEST=y so that it resides in the
user address segment.
config KVM_MIPS_VZ
bool "MIPS Virtualization (VZ) ASE"
help
Use the MIPS Virtualization (VZ) ASE to virtualize guests. This
supports running unmodified guest kernels (with CONFIG_KVM_GUEST=n),
but requires hardware support.
endchoice
config KVM_MIPS_DYN_TRANS
bool "KVM/MIPS: Dynamic binary translation to reduce traps"
depends on KVM_MIPS_TE
default y
help
When running in Trap & Emulate mode patch privileged
instructions to reduce the number of traps.
If unsure, say Y.
config KVM_MIPS_DEBUG_COP0_COUNTERS
bool "Maintain counters for COP0 accesses"
depends on KVM
......
arch/mips/kvm/Makefile
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......@@ -9,7 +9,7 @@ EXTRA_CFLAGS += -Ivirt/kvm -Iarch/mips/kvm
common-objs-$(CONFIG_CPU_HAS_MSA) += msa.o
kvm-objs := $(common-objs-y) mips.o emulate.o entry.o \
interrupt.o stats.o commpage.o \
interrupt.o stats.o \
fpu.o
kvm-objs += hypcall.o
kvm-objs += mmu.o
......@@ -17,11 +17,6 @@ ifdef CONFIG_CPU_LOONGSON64
kvm-objs += loongson_ipi.o
endif
ifdef CONFIG_KVM_MIPS_VZ
kvm-objs += vz.o
else
kvm-objs += dyntrans.o
kvm-objs += trap_emul.o
endif
obj-$(CONFIG_KVM) += kvm.o
obj-y += callback.o tlb.o
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/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* commpage, currently used for Virtual COP0 registers.
* Mapped into the guest kernel @ KVM_GUEST_COMMPAGE_ADDR.
*
* Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
* Authors: Sanjay Lal <sanjayl@kymasys.com>
*/
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/vmalloc.h>
#include <linux/fs.h>
#include <linux/memblock.h>
#include <asm/page.h>
#include <asm/cacheflush.h>
#include <asm/mmu_context.h>
#include <linux/kvm_host.h>
#include "commpage.h"
void kvm_mips_commpage_init(struct kvm_vcpu *vcpu)
{
struct kvm_mips_commpage *page = vcpu->arch.kseg0_commpage;
/* Specific init values for fields */
vcpu->arch.cop0 = &page->cop0;
}
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