Commit 78e70dbc authored by Tobias Waldekranz's avatar Tobias Waldekranz Committed by David S. Miller

net: dsa: mv88e6xxx: Correct spelling of define "ADRR" -> "ADDR"

Because ADRR is not a thing.
Signed-off-by: default avatarTobias Waldekranz <tobias@waldekranz.com>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 0e91e9a5
...@@ -1440,7 +1440,7 @@ static int mv88e6xxx_pvt_map(struct mv88e6xxx_chip *chip, int dev, int port) ...@@ -1440,7 +1440,7 @@ static int mv88e6xxx_pvt_map(struct mv88e6xxx_chip *chip, int dev, int port)
* the special "LAG device" in the PVT, using * the special "LAG device" in the PVT, using
* the LAG ID as the port number. * the LAG ID as the port number.
*/ */
dev = MV88E6XXX_G2_PVT_ADRR_DEV_TRUNK; dev = MV88E6XXX_G2_PVT_ADDR_DEV_TRUNK;
port = dsa_lag_id(dst, dp->lag_dev); port = dsa_lag_id(dst, dp->lag_dev);
} }
} }
......
...@@ -109,7 +109,7 @@ ...@@ -109,7 +109,7 @@
#define MV88E6XXX_G2_PVT_ADDR_OP_WRITE_PVLAN 0x3000 #define MV88E6XXX_G2_PVT_ADDR_OP_WRITE_PVLAN 0x3000
#define MV88E6XXX_G2_PVT_ADDR_OP_READ 0x4000 #define MV88E6XXX_G2_PVT_ADDR_OP_READ 0x4000
#define MV88E6XXX_G2_PVT_ADDR_PTR_MASK 0x01ff #define MV88E6XXX_G2_PVT_ADDR_PTR_MASK 0x01ff
#define MV88E6XXX_G2_PVT_ADRR_DEV_TRUNK 0x1f #define MV88E6XXX_G2_PVT_ADDR_DEV_TRUNK 0x1f
/* Offset 0x0C: Cross-chip Port VLAN Data Register */ /* Offset 0x0C: Cross-chip Port VLAN Data Register */
#define MV88E6XXX_G2_PVT_DATA 0x0c #define MV88E6XXX_G2_PVT_DATA 0x0c
......
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