Commit 79015857 authored by Shawn Guo's avatar Shawn Guo Committed by Bjorn Andersson

arm64: dts: qcom: sm8350: fix number of pins in 'gpio-ranges'

The last cell of 'gpio-ranges' should be number of GPIO pins, and in
case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather
than msm_pinctrl_soc_data.ngpio - 1.

This fixes the problem that when the last GPIO pin in the range is
configured with the following call sequence, it always fails with
-EPROBE_DEFER.

    pinctrl_gpio_set_config()
        pinctrl_get_device_gpio_range()
            pinctrl_match_gpio_range()

Fixes: b7e8f433 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC")
Cc: Vinod Koul <vkoul@kernel.org>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210303033106.549-5-shawn.guo@linaro.orgSigned-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent e526cb03
...@@ -641,7 +641,7 @@ tlmm: pinctrl@f100000 { ...@@ -641,7 +641,7 @@ tlmm: pinctrl@f100000 {
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
gpio-ranges = <&tlmm 0 0 203>; gpio-ranges = <&tlmm 0 0 204>;
qup_uart3_default_state: qup-uart3-default-state { qup_uart3_default_state: qup-uart3-default-state {
rx { rx {
......
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