Commit 792a5bf0 authored by Christian König's avatar Christian König Committed by Greg Kroah-Hartman

drm/radeon: only apply the SS fractional workaround to RS[78]80

commit ae5b80d2 upstream.

Looks like some RV6xx have problems with that.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=97099Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 952cbbb0
...@@ -627,7 +627,9 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, ...@@ -627,7 +627,9 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
if (radeon_crtc->ss.refdiv) { if (radeon_crtc->ss.refdiv) {
radeon_crtc->pll_flags |= RADEON_PLL_USE_REF_DIV; radeon_crtc->pll_flags |= RADEON_PLL_USE_REF_DIV;
radeon_crtc->pll_reference_div = radeon_crtc->ss.refdiv; radeon_crtc->pll_reference_div = radeon_crtc->ss.refdiv;
if (rdev->family >= CHIP_RV770) if (ASIC_IS_AVIVO(rdev) &&
rdev->family != CHIP_RS780 &&
rdev->family != CHIP_RS880)
radeon_crtc->pll_flags |= RADEON_PLL_USE_FRAC_FB_DIV; radeon_crtc->pll_flags |= RADEON_PLL_USE_FRAC_FB_DIV;
} }
} }
......
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