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Commit 7b4d189f authored by Roland Vossen's avatar Roland Vossen Committed by Greg Kroah-Hartman
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staging: brcm80211: fix for checkpatch warnings in phy directory 

Most of them being 'line exceeds 80 chars'. Still checkpatch warnings
for the phy dir left, these will be resolved in the subsequent commits.
Reviewed-by: default avatarPieter-Paul Giesberts <pieterpg@broadcom.com>
Reviewed-by: default avatarHenry Ptasinski <henryp@broadcom.com>
Signed-off-by: default avatarArend van Spriel <arend@broadcom.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 85567f52
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Showing with 2897 additions and 2954 deletions
drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c
View file @ 7b4d189f
......@@ -119,7 +119,7 @@ const u8 ofdm_rate_lookup[] = {
BRCM_RATE_9M
};
#define PHY_WREG_LIMIT 24
#define PHY_WREG_LIMIT 24
static void wlc_set_phy_uninitted(struct brcms_phy *pi);
static u32 wlc_phy_get_radio_ver(struct brcms_phy *pi);
......@@ -142,7 +142,7 @@ static void wlc_phy_txpower_reg_limit_calc(struct brcms_phy *pi,
static bool wlc_phy_cal_txpower_recalc_sw(struct brcms_phy *pi);
static s8 wlc_user_txpwr_antport_to_rfport(struct brcms_phy *pi, uint chan,
u32 band, u8 rate);
u32 band, u8 rate);
static void wlc_phy_upd_env_txpwr_rate_limits(struct brcms_phy *pi, u32 band);
static s8 wlc_phy_env_measure_vbat(struct brcms_phy *pi);
static s8 wlc_phy_env_measure_temperature(struct brcms_phy *pi);
......@@ -581,11 +581,11 @@ wlc_phy_attach(struct shared_phy *sh, void *regs, int bandtype,
idcode = wlc_phy_get_radio_ver(pi);
pi->pubpi.radioid =
(idcode & IDCODE_ID_MASK) >> IDCODE_ID_SHIFT;
(idcode & IDCODE_ID_MASK) >> IDCODE_ID_SHIFT;
pi->pubpi.radiorev =
(idcode & IDCODE_REV_MASK) >> IDCODE_REV_SHIFT;
(idcode & IDCODE_REV_MASK) >> IDCODE_REV_SHIFT;
pi->pubpi.radiover =
(idcode & IDCODE_VER_MASK) >> IDCODE_VER_SHIFT;
(idcode & IDCODE_VER_MASK) >> IDCODE_VER_SHIFT;
if (!VALID_RADIO(pi, pi->pubpi.radioid))
goto err;
......@@ -595,7 +595,7 @@ wlc_phy_attach(struct shared_phy *sh, void *regs, int bandtype,
pi->bw = WL_CHANSPEC_BW_20;
pi->radio_chanspec =
BAND_2G(bandtype) ? CH20MHZ_CHSPEC(1) : CH20MHZ_CHSPEC(36);
BAND_2G(bandtype) ? CH20MHZ_CHSPEC(1) : CH20MHZ_CHSPEC(36);
pi->rxiq_samps = PHY_NOISE_SAMPLE_LOG_NUM_NPHY;
pi->rxiq_antsel = ANT_RX_DIV_DEF;
......@@ -617,7 +617,7 @@ wlc_phy_attach(struct shared_phy *sh, void *regs, int bandtype,
pi->phy_txcore_disable_temp = PHY_CHAIN_TX_DISABLE_TEMP;
pi->phy_txcore_enable_temp =
PHY_CHAIN_TX_DISABLE_TEMP - PHY_HYSTERESIS_DELTATEMP;
PHY_CHAIN_TX_DISABLE_TEMP - PHY_HYSTERESIS_DELTATEMP;
pi->phy_tempsense_offset = 0;
pi->phy_txcore_heatedup = false;
......@@ -640,8 +640,8 @@ wlc_phy_attach(struct shared_phy *sh, void *regs, int bandtype,
if (ISNPHY(pi)) {
pi->phycal_timer = wlapi_init_timer(pi->sh->physhim,
wlc_phy_timercb_phycal,
pi, "phycal");
wlc_phy_timercb_phycal,
pi, "phycal");
if (!pi->phycal_timer)
goto err;
......@@ -664,7 +664,7 @@ wlc_phy_attach(struct shared_phy *sh, void *regs, int bandtype,
return &pi->pubpi_ro;
err:
err:
kfree(pi);
return NULL;
}
......@@ -688,7 +688,7 @@ void wlc_phy_detach(struct brcms_phy_pub *pih)
pi->sh->phy_head->next = NULL;
if (pi->pi_fptr.detach)
(pi->pi_fptr.detach) (pi);
(pi->pi_fptr.detach)(pi);
kfree(pi);
}
......@@ -853,7 +853,7 @@ void wlc_phy_hw_state_upd(struct brcms_phy_pub *pih, bool newstate)
void wlc_phy_init(struct brcms_phy_pub *pih, u16 chanspec)
{
u32 mc;
void (*phy_init) (struct brcms_phy *) = NULL;
void (*phy_init)(struct brcms_phy *) = NULL;
struct brcms_phy *pi = (struct brcms_phy *) pih;
if (pi->init_in_progress)
......@@ -889,7 +889,7 @@ void wlc_phy_init(struct brcms_phy_pub *pih, u16 chanspec)
wlc_phy_switch_radio((struct brcms_phy_pub *) pi, ON);
(*phy_init) (pi);
(*phy_init)(pi);
pi->phy_init_por = false;
......@@ -916,7 +916,7 @@ void wlc_phy_cal_init(struct brcms_phy_pub *pih)
if (!pi->initialized) {
cal_init = pi->pi_fptr.calinit;
if (cal_init)
(*cal_init) (pi);
(*cal_init)(pi);
pi->initialized = true;
}
......@@ -1108,7 +1108,7 @@ wlc_phy_init_radio_regs(struct brcms_phy *pi, struct radio_regs *radioregs,
void wlc_phy_do_dummy_tx(struct brcms_phy *pi, bool ofdm, bool pa_on)
{
#define DUMMY_PKT_LEN 20
#define DUMMY_PKT_LEN 20
struct d11regs *regs = pi->regs;
int i, count;
u8 ofdmpkt[DUMMY_PKT_LEN] = {
......@@ -1300,7 +1300,7 @@ void wlc_phy_chanspec_set(struct brcms_phy_pub *ppi, u16 chanspec)
{
struct brcms_phy *pi = (struct brcms_phy *) ppi;
u16 m_cur_channel;
void (*chanspec_set) (struct brcms_phy *, u16) = NULL;
void (*chanspec_set)(struct brcms_phy *, u16) = NULL;
m_cur_channel = CHSPEC_CHANNEL(chanspec);
if (CHSPEC_IS5G(chanspec))
m_cur_channel |= D11_CURCHANNEL_5G;
......@@ -1310,7 +1310,7 @@ void wlc_phy_chanspec_set(struct brcms_phy_pub *ppi, u16 chanspec)
chanspec_set = pi->pi_fptr.chanset;
if (chanspec_set)
(*chanspec_set) (pi, chanspec);
(*chanspec_set)(pi, chanspec);
}
......@@ -1409,9 +1409,8 @@ u16 wlc_phy_chanspec_band_firstch(struct brcms_phy_pub *ppi, uint band)
continue;
channel = UPPER_20_SB(channel);
chspec =
channel | WL_CHANSPEC_BW_40 |
WL_CHANSPEC_CTL_SB_LOWER;
chspec = channel | WL_CHANSPEC_BW_40 |
WL_CHANSPEC_CTL_SB_LOWER;
if (band == BRCM_BAND_2G)
chspec |= WL_CHANSPEC_BAND_2G;
else
......@@ -1508,10 +1507,8 @@ int wlc_phy_txpower_set(struct brcms_phy_pub *ppi, uint qdbm, bool override)
if (!SCAN_INPROG_PHY(pi)) {
bool suspend;
suspend =
(0 ==
(R_REG(&pi->regs->maccontrol) &
MCTL_EN_MAC));
suspend = (0 == (R_REG(&pi->regs->maccontrol) &
MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
......@@ -1588,7 +1585,8 @@ wlc_phy_txpower_sromlimit_max_get(struct brcms_phy_pub *ppi, uint chan,
pactrl = 0;
max_num_rate = ISNPHY(pi) ? TXP_NUM_RATES :
ISLCNPHY(pi) ? (TXP_LAST_SISO_MCS_20 + 1) : (TXP_LAST_OFDM + 1);
ISLCNPHY(pi) ? (TXP_LAST_SISO_MCS_20 +
1) : (TXP_LAST_OFDM + 1);
for (rate = 0; rate < max_num_rate; rate++) {
......@@ -1658,8 +1656,8 @@ void wlc_phy_txpower_recalc_target(struct brcms_phy *pi)
for (i = TXP_FIRST_SISO_MCS_20;
i <= TXP_LAST_SISO_MCS_20; i++) {
pi->tx_srom_max_rate_2g[i - 8] =
pi->tx_srom_max_2g -
((offset_mcs & 0xf) * 2);
pi->tx_srom_max_2g -
((offset_mcs & 0xf) * 2);
offset_mcs >>= 4;
}
} else {
......@@ -1667,8 +1665,8 @@ void wlc_phy_txpower_recalc_target(struct brcms_phy *pi)
for (i = TXP_FIRST_SISO_MCS_20;
i <= TXP_LAST_SISO_MCS_20; i++) {
pi->tx_srom_max_rate_2g[i - 8] =
pi->tx_srom_max_2g -
((offset_mcs & 0xf) * 2);
pi->tx_srom_max_2g -
((offset_mcs & 0xf) * 2);
offset_mcs >>= 4;
}
}
......@@ -1689,8 +1687,10 @@ void wlc_phy_txpower_recalc_target(struct brcms_phy *pi)
if (pi->user_txpwr_at_rfport)
tx_pwr_target[rate] +=
wlc_user_txpwr_antport_to_rfport(pi, target_chan,
band, rate);
wlc_user_txpwr_antport_to_rfport(pi,
target_chan,
band,
rate);
{
......@@ -1701,7 +1701,7 @@ void wlc_phy_txpower_recalc_target(struct brcms_phy *pi)
maxtxpwr = min(maxtxpwr, pi->txpwr_limit[rate]);
maxtxpwr =
(maxtxpwr > pactrl) ? (maxtxpwr - pactrl) : 0;
(maxtxpwr > pactrl) ? (maxtxpwr - pactrl) : 0;
maxtxpwr = (maxtxpwr > 6) ? (maxtxpwr - 6) : 0;
......@@ -1714,7 +1714,7 @@ void wlc_phy_txpower_recalc_target(struct brcms_phy *pi)
}
tx_pwr_target[rate] =
min(tx_pwr_target[rate], pi->txpwr_env_limit[rate]);
min(tx_pwr_target[rate], pi->txpwr_env_limit[rate]);
if (tx_pwr_target[rate] > tx_pwr_max)
tx_pwr_max_rate_ind = rate;
......@@ -1733,15 +1733,15 @@ void wlc_phy_txpower_recalc_target(struct brcms_phy *pi)
if (!pi->hwpwrctrl || ISNPHY(pi))
pi->tx_power_offset[rate] =
pi->tx_power_max - pi->tx_power_target[rate];
pi->tx_power_max - pi->tx_power_target[rate];
else
pi->tx_power_offset[rate] =
pi->tx_power_target[rate] - pi->tx_power_min;
pi->tx_power_target[rate] - pi->tx_power_min;
}
txpwr_recalc_fn = pi->pi_fptr.txpwrrecalc;
if (txpwr_recalc_fn)
(*txpwr_recalc_fn) (pi);
(*txpwr_recalc_fn)(pi);
}
void
......@@ -1781,7 +1781,7 @@ wlc_phy_txpower_reg_limit_calc(struct brcms_phy *pi, struct txpwr_limits *txpwr,
txpwr_ptr1 = txpwr->mcs_40_siso;
txpwr_ptr2 = txpwr->ofdm_40_siso;
rate_start_index =
WL_TX_POWER_OFDM40_SISO_FIRST;
WL_TX_POWER_OFDM40_SISO_FIRST;
break;
case 3:
......@@ -1791,18 +1791,21 @@ wlc_phy_txpower_reg_limit_calc(struct brcms_phy *pi, struct txpwr_limits *txpwr,
break;
}
for (rate2 = 0; rate2 < BRCMS_NUM_RATES_OFDM; rate2++) {
for (rate2 = 0; rate2 < BRCMS_NUM_RATES_OFDM;
rate2++) {
tmp_txpwr_limit[rate2] = 0;
tmp_txpwr_limit[BRCMS_NUM_RATES_OFDM + rate2] =
txpwr_ptr1[rate2];
txpwr_ptr1[rate2];
}
wlc_phy_mcs_to_ofdm_powers_nphy(tmp_txpwr_limit, 0,
BRCMS_NUM_RATES_OFDM - 1, BRCMS_NUM_RATES_OFDM);
wlc_phy_mcs_to_ofdm_powers_nphy(
tmp_txpwr_limit, 0,
BRCMS_NUM_RATES_OFDM -
1, BRCMS_NUM_RATES_OFDM);
for (rate1 = rate_start_index, rate2 = 0;
rate2 < BRCMS_NUM_RATES_OFDM; rate1++, rate2++)
pi->txpwr_limit[rate1] =
min(txpwr_ptr2[rate2],
tmp_txpwr_limit[rate2]);
min(txpwr_ptr2[rate2],
tmp_txpwr_limit[rate2]);
}
for (k = 0; k < 4; k++) {
......@@ -1832,19 +1835,22 @@ wlc_phy_txpower_reg_limit_calc(struct brcms_phy *pi, struct txpwr_limits *txpwr,
rate_start_index = WL_TX_POWER_MCS40_CDD_FIRST;
break;
}
for (rate2 = 0; rate2 < BRCMS_NUM_RATES_OFDM; rate2++) {
for (rate2 = 0; rate2 < BRCMS_NUM_RATES_OFDM;
rate2++) {
tmp_txpwr_limit[rate2] = 0;
tmp_txpwr_limit[BRCMS_NUM_RATES_OFDM + rate2] =
txpwr_ptr1[rate2];
txpwr_ptr1[rate2];
}
wlc_phy_ofdm_to_mcs_powers_nphy(tmp_txpwr_limit, 0,
BRCMS_NUM_RATES_OFDM - 1, BRCMS_NUM_RATES_OFDM);
wlc_phy_ofdm_to_mcs_powers_nphy(
tmp_txpwr_limit, 0,
BRCMS_NUM_RATES_OFDM -
1, BRCMS_NUM_RATES_OFDM);
for (rate1 = rate_start_index, rate2 = 0;
rate2 < BRCMS_NUM_RATES_MCS_1_STREAM;
rate1++, rate2++)
pi->txpwr_limit[rate1] =
min(txpwr_ptr2[rate2],
tmp_txpwr_limit[rate2]);
min(txpwr_ptr2[rate2],
tmp_txpwr_limit[rate2]);
}
for (k = 0; k < 2; k++) {
......@@ -1888,10 +1894,10 @@ wlc_phy_txpower_reg_limit_calc(struct brcms_phy *pi, struct txpwr_limits *txpwr,
pi->txpwr_limit[WL_TX_POWER_MCS_32] = txpwr->mcs32;
pi->txpwr_limit[WL_TX_POWER_MCS40_CDD_FIRST] =
min(pi->txpwr_limit[WL_TX_POWER_MCS40_CDD_FIRST],
pi->txpwr_limit[WL_TX_POWER_MCS_32]);
min(pi->txpwr_limit[WL_TX_POWER_MCS40_CDD_FIRST],
pi->txpwr_limit[WL_TX_POWER_MCS_32]);
pi->txpwr_limit[WL_TX_POWER_MCS_32] =
pi->txpwr_limit[WL_TX_POWER_MCS40_CDD_FIRST];
pi->txpwr_limit[WL_TX_POWER_MCS40_CDD_FIRST];
}
}
......@@ -2005,9 +2011,9 @@ void wlc_phy_txpower_update_shm(struct brcms_phy *pi)
const u8 ucode_ofdm_rates[] = {
0x0c, 0x12, 0x18, 0x24, 0x30, 0x48, 0x60, 0x6c
};
offset = wlapi_bmac_rate_shm_offset(pi->sh->physhim,
ucode_ofdm_rates[j -
TXP_FIRST_OFDM]);
offset = wlapi_bmac_rate_shm_offset(
pi->sh->physhim,
ucode_ofdm_rates[j - TXP_FIRST_OFDM]);
wlapi_bmac_write_shm(pi->sh->physhim, offset + 6,
pi->tx_power_offset[j]);
wlapi_bmac_write_shm(pi->sh->physhim, offset + 14,
......@@ -2021,11 +2027,11 @@ void wlc_phy_txpower_update_shm(struct brcms_phy *pi)
for (i = TXP_FIRST_OFDM; i <= TXP_LAST_OFDM; i++)
pi->tx_power_offset[i] =
(u8) roundup(pi->tx_power_offset[i], 8);
(u8) roundup(pi->tx_power_offset[i], 8);
wlapi_bmac_write_shm(pi->sh->physhim, M_OFDM_OFFSET,
(u16) ((pi->
tx_power_offset[TXP_FIRST_OFDM]
+ 7) >> 3));
(u16)
((pi->tx_power_offset[TXP_FIRST_OFDM]
+ 7) >> 3));
}
}
......@@ -2052,9 +2058,7 @@ void wlc_phy_txpower_hw_ctrl_set(struct brcms_phy_pub *ppi, bool hwpwrctrl)
pi->txpwrctrl = hwpwrctrl;
if (ISNPHY(pi)) {
suspend =
(0 ==
(R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
suspend = (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
......@@ -2092,38 +2096,31 @@ static u32 wlc_phy_txpower_est_power_nphy(struct brcms_phy *pi)
estPower1 = read_phy_reg(pi, 0x118);
estPower2 = read_phy_reg(pi, 0x119);
if ((estPower1 & (0x1 << 8))
== (0x1 << 8))
pwr0 = (u8) (estPower1 & (0xff << 0))
>> 0;
if ((estPower1 & (0x1 << 8)) == (0x1 << 8))
pwr0 = (u8) (estPower1 & (0xff << 0)) >> 0;
else
pwr0 = 0x80;
if ((estPower2 & (0x1 << 8))
== (0x1 << 8))
pwr1 = (u8) (estPower2 & (0xff << 0))
>> 0;
if ((estPower2 & (0x1 << 8)) == (0x1 << 8))
pwr1 = (u8) (estPower2 & (0xff << 0)) >> 0;
else
pwr1 = 0x80;
tx0_status = read_phy_reg(pi, 0x1ed);
tx1_status = read_phy_reg(pi, 0x1ee);
if ((tx0_status & (0x1 << 15))
== (0x1 << 15))
adj_pwr0 = (u8) (tx0_status & (0xff << 0))
>> 0;
if ((tx0_status & (0x1 << 15)) == (0x1 << 15))
adj_pwr0 = (u8) (tx0_status & (0xff << 0)) >> 0;
else
adj_pwr0 = 0x80;
if ((tx1_status & (0x1 << 15))
== (0x1 << 15))
adj_pwr1 = (u8) (tx1_status & (0xff << 0))
>> 0;
if ((tx1_status & (0x1 << 15)) == (0x1 << 15))
adj_pwr1 = (u8) (tx1_status & (0xff << 0)) >> 0;
else
adj_pwr1 = 0x80;
est_pwr =
(u32) ((pwr0 << 24) | (pwr1 << 16) | (adj_pwr0 << 8) | adj_pwr1);
est_pwr = (u32) ((pwr0 << 24) | (pwr1 << 16) | (adj_pwr0 << 8) |
adj_pwr1);
return est_pwr;
}
......@@ -2144,7 +2141,7 @@ wlc_phy_txpower_get_current(struct brcms_phy_pub *ppi, struct tx_power *power,
power->flags |= (WL_TX_POWER_F_MIMO);
if (pi->nphy_txpwrctrl == PHY_TPC_HW_ON)
power->flags |=
(WL_TX_POWER_F_ENABLED | WL_TX_POWER_F_HW);
(WL_TX_POWER_F_ENABLED | WL_TX_POWER_F_HW);
} else if (ISLCNPHY(pi)) {
power->rf_cores = 1;
power->flags |= (WL_TX_POWER_F_SISO);
......@@ -2207,16 +2204,18 @@ wlc_phy_txpower_get_current(struct brcms_phy_pub *ppi, struct tx_power *power,
power->tx_power_max[1] = pi->tx_power_max;
power->tx_power_max_rate_ind[0] =
pi->tx_power_max_rate_ind;
pi->tx_power_max_rate_ind;
power->tx_power_max_rate_ind[1] =
pi->tx_power_max_rate_ind;
pi->tx_power_max_rate_ind;
if (wlc_phy_tpc_isenabled_lcnphy(pi))
power->flags |=
(WL_TX_POWER_F_HW | WL_TX_POWER_F_ENABLED);
(WL_TX_POWER_F_HW |
WL_TX_POWER_F_ENABLED);
else
power->flags &=
~(WL_TX_POWER_F_HW | WL_TX_POWER_F_ENABLED);
~(WL_TX_POWER_F_HW |
WL_TX_POWER_F_ENABLED);
wlc_lcnphy_get_tssi(pi, (s8 *) &power->est_Pout[0],
(s8 *) &power->est_Pout_cck);
......@@ -2261,8 +2260,7 @@ void wlc_phy_ant_rxdiv_set(struct brcms_phy_pub *ppi, u8 val)
if (!pi->sh->clk)
return;
suspend =
(0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
suspend = (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
......@@ -2306,7 +2304,7 @@ wlc_phy_noise_calc_phy(struct brcms_phy *pi, u32 *cmplx_pwr, s8 *pwr_ant)
pwr_ant[i] = cmplx_pwr_dbm[i];
}
pi->nphy_noise_index =
MODINC_POW2(pi->nphy_noise_index, PHY_NOISE_WINDOW_SZ);
MODINC_POW2(pi->nphy_noise_index, PHY_NOISE_WINDOW_SZ);
return true;
}
......@@ -2343,12 +2341,11 @@ wlc_phy_noise_sample_request(struct brcms_phy_pub *pih, u8 reason, u8 ch)
if (pi->phy_fixed_noise) {
if (ISNPHY(pi)) {
pi->nphy_noise_win[WL_ANT_IDX_1][pi->nphy_noise_index] =
PHY_NOISE_FIXED_VAL_NPHY;
PHY_NOISE_FIXED_VAL_NPHY;
pi->nphy_noise_win[WL_ANT_IDX_2][pi->nphy_noise_index] =
PHY_NOISE_FIXED_VAL_NPHY;
PHY_NOISE_FIXED_VAL_NPHY;
pi->nphy_noise_index = MODINC_POW2(pi->nphy_noise_index,
PHY_NOISE_WINDOW_SZ);
noise_dbm = PHY_NOISE_FIXED_VAL_NPHY;
} else {
noise_dbm = PHY_NOISE_FIXED_VAL;
......@@ -2413,15 +2410,14 @@ wlc_phy_noise_sample_request(struct brcms_phy_pub *pih, u8 reason, u8 ch)
wlapi_enable_mac(pi->sh->physhim);
for (i = 0; i < pi->pubpi.phy_corenum; i++)
cmplx_pwr[i] =
(est[i].i_pwr +
est[i].q_pwr) >> log_num_samps;
cmplx_pwr[i] = (est[i].i_pwr + est[i].q_pwr) >>
log_num_samps;
wlc_phy_noise_calc_phy(pi, cmplx_pwr, noise_dbm_ant);
for (i = 0; i < pi->pubpi.phy_corenum; i++) {
pi->nphy_noise_win[i][pi->nphy_noise_index] =
noise_dbm_ant[i];
noise_dbm_ant[i];
if (noise_dbm_ant[i] > noise_dbm)
noise_dbm = noise_dbm_ant[i];
......@@ -2433,7 +2429,7 @@ wlc_phy_noise_sample_request(struct brcms_phy_pub *pih, u8 reason, u8 ch)
}
}
done:
done:
if (!wait_for_intr)
wlc_phy_noise_cb(pi, ch, noise_dbm);
......@@ -2457,9 +2453,9 @@ static void wlc_phy_noise_cb(struct brcms_phy *pi, u8 channel, s8 noise_dbm)
if (pi->phynoise_state & PHY_NOISE_STATE_MON) {
if (pi->phynoise_chan_watchdog == channel) {
pi->sh->phy_noise_window[pi->sh->phy_noise_index] =
noise_dbm;
noise_dbm;
pi->sh->phy_noise_index =
MODINC(pi->sh->phy_noise_index, MA_WINDOW_SZ);
MODINC(pi->sh->phy_noise_index, MA_WINDOW_SZ);
}
pi->phynoise_state &= ~PHY_NOISE_STATE_MON;
}
......@@ -2481,7 +2477,8 @@ static s8 wlc_phy_noise_read_shmem(struct brcms_phy *pi)
memset((u8 *) cmplx_pwr, 0, sizeof(cmplx_pwr));
memset((u8 *) noise_dbm_ant, 0, sizeof(noise_dbm_ant));
for (idx = 0, core = 0; core < pi->pubpi.phy_corenum; idx += 2, core++) {
for (idx = 0, core = 0; core < pi->pubpi.phy_corenum; idx += 2,
core++) {
lo = wlapi_bmac_read_shm(pi->sh->physhim, M_PWRIND_MAP(idx));
hi = wlapi_bmac_read_shm(pi->sh->physhim,
M_PWRIND_MAP(idx + 1));
......@@ -2498,13 +2495,13 @@ static s8 wlc_phy_noise_read_shmem(struct brcms_phy *pi)
for (core = 0; core < pi->pubpi.phy_corenum; core++) {
pi->nphy_noise_win[core][pi->nphy_noise_index] =
noise_dbm_ant[core];
noise_dbm_ant[core];
if (noise_dbm_ant[core] > noise_dbm)
noise_dbm = noise_dbm_ant[core];
}
pi->nphy_noise_index =
MODINC_POW2(pi->nphy_noise_index, PHY_NOISE_WINDOW_SZ);
MODINC_POW2(pi->nphy_noise_index, PHY_NOISE_WINDOW_SZ);
return noise_dbm;
......@@ -2665,7 +2662,7 @@ void wlc_phy_rssi_compute(struct brcms_phy_pub *pih, void *ctx)
rssi = wlc_phy_rssi_compute_nphy(pi, wlc_rxhdr);
}
end:
end:
wlc_rxhdr->rssi = (s8) rssi;
}
......@@ -2739,8 +2736,9 @@ void wlc_phy_watchdog(struct brcms_phy_pub *pih)
((pi->sh->now - pi->phy_lastcal) >=
pi->sh->glacial_timer)) {
if (!(SCAN_RM_IN_PROGRESS(pi) || ASSOC_INPROG_PHY(pi)))
wlc_lcnphy_calib_modes(pi,
LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL);
wlc_lcnphy_calib_modes(
pi,
LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL);
if (!
(SCAN_RM_IN_PROGRESS(pi) || PLT_INPROG_PHY(pi)
|| ASSOC_INPROG_PHY(pi)
......@@ -2763,7 +2761,7 @@ void wlc_phy_BSSinit(struct brcms_phy_pub *pih, bool bonlyap, int rssi)
if (ISLCNPHY(pi)) {
for (i = 0; i < MA_WINDOW_SZ; i++)
pi->sh->phy_noise_window[i] =
PHY_NOISE_FIXED_VAL_LCNPHY;
PHY_NOISE_FIXED_VAL_LCNPHY;
}
pi->sh->phy_noise_index = 0;
......@@ -2819,9 +2817,8 @@ void wlc_phy_cordic(s32 theta, struct cs32 *val)
angle = 0;
signtheta = (theta < 0) ? -1 : 1;
theta =
((theta + FIXED(180) * signtheta) % FIXED(360)) -
FIXED(180) * signtheta;
theta = ((theta + FIXED(180) * signtheta) % FIXED(360)) -
FIXED(180) * signtheta;
if (FLOAT(theta) > 90) {
theta -= FIXED(180);
......@@ -2895,8 +2892,9 @@ void wlc_phy_cal_perical(struct brcms_phy_pub *pih, u8 reason)
if (PHY_PERICAL_MPHASE_PENDING(pi))
wlc_phy_cal_perical_mphase_reset(pi);
wlc_phy_cal_perical_mphase_schedule(pi,
PHY_PERICAL_INIT_DELAY);
wlc_phy_cal_perical_mphase_schedule(
pi,
PHY_PERICAL_INIT_DELAY);
}
break;
......@@ -2921,9 +2919,9 @@ void wlc_phy_cal_perical(struct brcms_phy_pub *pih, u8 reason)
if (pi->phycal_tempdelta) {
nphy_currtemp = wlc_phy_tempsense_nphy(pi);
delta_temp =
(nphy_currtemp > pi->nphy_lastcal_temp) ?
nphy_currtemp - pi->nphy_lastcal_temp :
pi->nphy_lastcal_temp - nphy_currtemp;
(nphy_currtemp > pi->nphy_lastcal_temp) ?
nphy_currtemp - pi->nphy_lastcal_temp :
pi->nphy_lastcal_temp - nphy_currtemp;
if ((delta_temp < (s16) pi->phycal_tempdelta) &&
(pi->nphy_txiqlocal_chanspec ==
......@@ -2936,8 +2934,9 @@ void wlc_phy_cal_perical(struct brcms_phy_pub *pih, u8 reason)
if (do_periodic_cal) {
if (pi->nphy_perical == PHY_PERICAL_MPHASE) {
if (!PHY_PERICAL_MPHASE_PENDING(pi))
wlc_phy_cal_perical_mphase_schedule(pi,
PHY_PERICAL_WDOG_DELAY);
wlc_phy_cal_perical_mphase_schedule(
pi,
PHY_PERICAL_WDOG_DELAY);
} else if (pi->nphy_perical == PHY_PERICAL_SPHASE)
wlc_phy_cal_perical_nphy_run(pi,
PHY_PERICAL_AUTO);
......@@ -3035,11 +3034,11 @@ s8 wlc_phy_stf_ssmode_get(struct brcms_phy_pub *pih, u16 chanspec)
u8 siso_mcs_id, cdd_mcs_id;
siso_mcs_id =
(CHSPEC_IS40(chanspec)) ? TXP_FIRST_MCS_40_SISO :
TXP_FIRST_MCS_20_SISO;
(CHSPEC_IS40(chanspec)) ? TXP_FIRST_MCS_40_SISO :
TXP_FIRST_MCS_20_SISO;
cdd_mcs_id =
(CHSPEC_IS40(chanspec)) ? TXP_FIRST_MCS_40_CDD :
TXP_FIRST_MCS_20_CDD;
(CHSPEC_IS40(chanspec)) ? TXP_FIRST_MCS_40_CDD :
TXP_FIRST_MCS_20_CDD;
if (pi->tx_power_target[siso_mcs_id] >
(pi->tx_power_target[cdd_mcs_id] + 12))
......
drivers/staging/brcm80211/brcmsmac/phy/phy_hal.h
View file @ 7b4d189f
......@@ -126,28 +126,32 @@ struct txpwr_limits {
struct tx_power {
u32 flags;
u16 chanspec; /* txpwr report for this channel */
u16 local_chanspec; /* channel on which we are associated */
u8 local_max; /* local max according to the AP */
u8 local_constraint; /* local constraint according to the AP */
s8 antgain[2]; /* Ant gain for each band - from SROM */
u8 rf_cores; /* count of RF Cores being reported */
u8 est_Pout[4]; /* Latest tx power out estimate per RF chain */
u8 est_Pout_act[4]; /* Latest tx power out estimate per RF chain
* without adjustment
*/
u8 est_Pout_cck; /* Latest CCK tx power out estimate */
u8 tx_power_max[4]; /* Maximum target power among all rates */
u8 tx_power_max_rate_ind[4]; /* Index of the rate with the max target power */
u8 user_limit[WL_TX_POWER_RATES]; /* User limit */
u8 reg_limit[WL_TX_POWER_RATES]; /* Regulatory power limit */
u8 board_limit[WL_TX_POWER_RATES]; /* Max power board can support (SROM) */
u8 target[WL_TX_POWER_RATES]; /* Latest target power */
u16 chanspec; /* txpwr report for this channel */
u16 local_chanspec; /* channel on which we are associated */
u8 local_max; /* local max according to the AP */
u8 local_constraint; /* local constraint according to the AP */
s8 antgain[2]; /* Ant gain for each band - from SROM */
u8 rf_cores; /* count of RF Cores being reported */
u8 est_Pout[4]; /* Latest tx power out estimate per RF chain */
u8 est_Pout_act[4]; /* Latest tx power out estimate per RF chain
* without adjustment */
u8 est_Pout_cck; /* Latest CCK tx power out estimate */
u8 tx_power_max[4]; /* Maximum target power among all rates */
/* Index of the rate with the max target power */
u8 tx_power_max_rate_ind[4];
/* User limit */
u8 user_limit[WL_TX_POWER_RATES];
/* Regulatory power limit */
u8 reg_limit[WL_TX_POWER_RATES];
/* Max power board can support (SROM) */
u8 board_limit[WL_TX_POWER_RATES];
/* Latest target power */
u8 target[WL_TX_POWER_RATES];
};
struct tx_inst_power {
u8 txpwr_est_Pout[2]; /* Latest estimate for 2.4 and 5 Ghz */
u8 txpwr_est_Pout_gofdm; /* Pwr estimate for 2.4 OFDM */
u8 txpwr_est_Pout[2]; /* Latest estimate for 2.4 and 5 Ghz */
u8 txpwr_est_Pout_gofdm; /* Pwr estimate for 2.4 OFDM */
};
struct brcms_chanvec {
......@@ -178,7 +182,8 @@ struct shared_phy_params {
extern struct shared_phy *wlc_phy_shared_attach(struct shared_phy_params *shp);
extern struct brcms_phy_pub *wlc_phy_attach(struct shared_phy *sh, void *regs,
int bandtype, char *vars, struct wiphy *wiphy);
int bandtype, char *vars,
struct wiphy *wiphy);
extern void wlc_phy_detach(struct brcms_phy_pub *ppi);
extern bool wlc_phy_get_phyversion(struct brcms_phy_pub *pih, u16 *phytype,
......@@ -222,7 +227,7 @@ extern void wlc_phy_chanspec_ch14_widefilter_set(struct brcms_phy_pub *ppi,
extern void wlc_phy_chanspec_band_validch(struct brcms_phy_pub *ppi, uint band,
struct brcms_chanvec *channels);
extern u16 wlc_phy_chanspec_band_firstch(struct brcms_phy_pub *ppi,
uint band);
uint band);
extern void wlc_phy_txpower_sromlimit(struct brcms_phy_pub *ppi, uint chan,
u8 *_min_, u8 *_max_, int rate);
......@@ -289,6 +294,6 @@ extern void wlc_phy_freqtrack_end(struct brcms_phy_pub *ppi);
extern const u8 *wlc_phy_get_ofdm_rate_lookup(void);
extern s8 wlc_phy_get_tx_power_offset_by_mcs(struct brcms_phy_pub *ppi,
u8 mcs_offset);
u8 mcs_offset);
extern s8 wlc_phy_get_tx_power_offset(struct brcms_phy_pub *ppi, u8 tbl_offset);
#endif /* _BRCM_PHY_HAL_H_ */
#endif /* _BRCM_PHY_HAL_H_ */
drivers/staging/brcm80211/brcmsmac/phy/phy_int.h
View file @ 7b4d189f
......@@ -42,11 +42,16 @@ extern u32 phyhal_msg_level;
#define LCNXN_BASEREV 16
struct brcms_phy_srom_fem {
u8 tssipos; /* TSSI positive slope, 1: positive, 0: negative */
u8 extpagain; /* Ext PA gain-type: full-gain: 0, pa-lite: 1, no_pa: 2 */
u8 pdetrange; /* support 32 combinations of different Pdet dynamic ranges */
u8 triso; /* TR switch isolation */
u8 antswctrllut; /* antswctrl lookup table configuration: 32 possible choices */
/* TSSI positive slope, 1: positive, 0: negative */
u8 tssipos;
/* Ext PA gain-type: full-gain: 0, pa-lite: 1, no_pa: 2 */
u8 extpagain;
/* support 32 combinations of different Pdet dynamic ranges */
u8 pdetrange;
/* TR switch isolation */
u8 triso;
/* antswctrl lookup table configuration: 32 possible choices */
u8 antswctrllut;
};
#undef ISNPHY
......@@ -192,7 +197,9 @@ struct brcms_phy_srom_fem {
#define PHY_PERICAL_WDOG_DELAY 5
#define MPHASE_TXCAL_NUMCMDS 2
#define PHY_PERICAL_MPHASE_PENDING(pi) (pi->mphase_cal_phase_id > MPHASE_CAL_STATE_IDLE)
#define PHY_PERICAL_MPHASE_PENDING(pi) \
(pi->mphase_cal_phase_id > MPHASE_CAL_STATE_IDLE)
enum {
MPHASE_CAL_STATE_IDLE = 0,
......@@ -237,7 +244,9 @@ enum phy_cal_mode {
#define CORDIC_AG 39797
#define CORDIC_NI 18
#define FIXED(X) ((s32)((X) << 16))
#define FLOAT(X) (((X) >= 0) ? ((((X) >> 15) + 1) >> 1) : -((((-(X)) >> 15) + 1) >> 1))
#define FLOAT(X) \
(((X) >= 0) ? ((((X) >> 15) + 1) >> 1) : -((((-(X)) >> 15) + 1) >> 1))
#define PHY_CHAIN_TX_DISABLE_TEMP 115
#define PHY_HYSTERESIS_DELTATEMP 5
......@@ -245,30 +254,46 @@ enum phy_cal_mode {
#define PHY_BITSCNT(x) brcmu_bitcount((u8 *)&(x), sizeof(u8))
#define MOD_PHY_REG(pi, phy_type, reg_name, field, value) \
mod_phy_reg(pi, phy_type##_##reg_name, phy_type##_##reg_name##_##field##_MASK, \
(value) << phy_type##_##reg_name##_##field##_##SHIFT)
mod_phy_reg(pi, phy_type##_##reg_name, \
phy_type##_##reg_name##_##field##_MASK, \
(value) << phy_type##_##reg_name##_##field##_##SHIFT)
#define READ_PHY_REG(pi, phy_type, reg_name, field) \
((read_phy_reg(pi, phy_type##_##reg_name) & phy_type##_##reg_name##_##field##_##MASK)\
>> phy_type##_##reg_name##_##field##_##SHIFT)
((read_phy_reg(pi, phy_type##_##reg_name) & \
phy_type##_##reg_name##_##field##_##MASK) \
>> phy_type##_##reg_name##_##field##_##SHIFT)
#define VALID_PHYTYPE(phytype) (((uint)phytype == PHY_TYPE_N) || \
((uint)phytype == PHY_TYPE_LCN))
#define VALID_N_RADIO(radioid) ((radioid == BCM2055_ID) || (radioid == BCM2056_ID) || \
(radioid == BCM2057_ID))
#define VALID_N_RADIO(radioid) ((radioid == BCM2055_ID) || \
(radioid == BCM2056_ID) || \
(radioid == BCM2057_ID))
#define VALID_LCN_RADIO(radioid) (radioid == BCM2064_ID)
#define VALID_RADIO(pi, radioid) (\
(ISNPHY(pi) ? VALID_N_RADIO(radioid) : false) || \
(ISLCNPHY(pi) ? VALID_LCN_RADIO(radioid) : false))
#define VALID_RADIO(pi, radioid) ( \
(ISNPHY(pi) ? VALID_N_RADIO(radioid) : false) || \
(ISLCNPHY(pi) ? VALID_LCN_RADIO(radioid) : false))
#define SCAN_INPROG_PHY(pi) \
(mboolisset(pi->measure_hold, PHY_HOLD_FOR_SCAN))
#define RM_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_RM))
#define PLT_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_PLT))
#define ASSOC_INPROG_PHY(pi) \
(mboolisset(pi->measure_hold, PHY_HOLD_FOR_ASSOC))
#define SCAN_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_SCAN))
#define RM_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_RM))
#define PLT_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_PLT))
#define ASSOC_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_ASSOC))
#define SCAN_RM_IN_PROGRESS(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_SCAN | PHY_HOLD_FOR_RM))
#define PHY_MUTED(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_MUTE))
#define PUB_NOT_ASSOC(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_NOT_ASSOC))
#define SCAN_RM_IN_PROGRESS(pi) \
(mboolisset(pi->measure_hold, PHY_HOLD_FOR_SCAN | PHY_HOLD_FOR_RM))
#define PHY_MUTED(pi) \
(mboolisset(pi->measure_hold, PHY_HOLD_FOR_MUTE))
#define PUB_NOT_ASSOC(pi) \
(mboolisset(pi->measure_hold, PHY_HOLD_FOR_NOT_ASSOC))
#if defined(EXT_CBALL)
#define NORADIO_ENAB(pub) ((pub).radioid == NORADIO_ID)
......@@ -568,18 +593,18 @@ struct brcms_phy_pub {
};
struct phy_func_ptr {
void (*init) (struct brcms_phy *);
void (*calinit) (struct brcms_phy *);
void (*chanset) (struct brcms_phy *, u16 chanspec);
void (*txpwrrecalc) (struct brcms_phy *);
int (*longtrn) (struct brcms_phy *, int);
void (*txiqccget) (struct brcms_phy *, u16 *, u16 *);
void (*txiqccset) (struct brcms_phy *, u16, u16);
u16(*txloccget) (struct brcms_phy *);
void (*radioloftget) (struct brcms_phy *, u8 *, u8 *, u8 *, u8 *);
void (*carrsuppr) (struct brcms_phy *);
s32(*rxsigpwr) (struct brcms_phy *, s32);
void (*detach) (struct brcms_phy *);
void (*init)(struct brcms_phy *);
void (*calinit)(struct brcms_phy *);
void (*chanset)(struct brcms_phy *, u16 chanspec);
void (*txpwrrecalc)(struct brcms_phy *);
int (*longtrn)(struct brcms_phy *, int);
void (*txiqccget)(struct brcms_phy *, u16 *, u16 *);
void (*txiqccset)(struct brcms_phy *, u16, u16);
u16 (*txloccget)(struct brcms_phy *);
void (*radioloftget)(struct brcms_phy *, u8 *, u8 *, u8 *, u8 *);
void (*carrsuppr)(struct brcms_phy *);
s32 (*rxsigpwr)(struct brcms_phy *, s32);
void (*detach)(struct brcms_phy *);
};
struct brcms_phy {
......@@ -712,7 +737,7 @@ struct brcms_phy {
u16 mintxbias;
u16 mintxmag;
struct lo_complex_abgphy_info gphy_locomp_iq
[STATIC_NUM_RF][STATIC_NUM_BB];
[STATIC_NUM_RF][STATIC_NUM_BB];
s8 stats_11b_txpower[STATIC_NUM_RF][STATIC_NUM_BB];
u16 gain_table[TX_GAIN_TABLE_LENGTH];
bool loopback_gain;
......@@ -955,26 +980,29 @@ struct lcnphy_radio_regs {
extern struct lcnphy_radio_regs lcnphy_radio_regs_2064[];
extern struct lcnphy_radio_regs lcnphy_radio_regs_2066[];
extern struct radio_regs regs_2055[], regs_SYN_2056[], regs_TX_2056[],
regs_RX_2056[];
regs_RX_2056[];
extern struct radio_regs regs_SYN_2056_A1[], regs_TX_2056_A1[],
regs_RX_2056_A1[];
regs_RX_2056_A1[];
extern struct radio_regs regs_SYN_2056_rev5[], regs_TX_2056_rev5[],
regs_RX_2056_rev5[];
regs_RX_2056_rev5[];
extern struct radio_regs regs_SYN_2056_rev6[], regs_TX_2056_rev6[],
regs_RX_2056_rev6[];
regs_RX_2056_rev6[];
extern struct radio_regs regs_SYN_2056_rev7[], regs_TX_2056_rev7[],
regs_RX_2056_rev7[];
regs_RX_2056_rev7[];
extern struct radio_regs regs_SYN_2056_rev8[], regs_TX_2056_rev8[],
regs_RX_2056_rev8[];
regs_RX_2056_rev8[];
extern struct radio_20xx_regs regs_2057_rev4[], regs_2057_rev5[],
regs_2057_rev5v1[];
regs_2057_rev5v1[];
extern struct radio_20xx_regs regs_2057_rev7[], regs_2057_rev8[];
extern char *phy_getvar(struct brcms_phy *pi, const char *name);
extern int phy_getintvar(struct brcms_phy *pi, const char *name);
#define PHY_GETVAR(pi, name) phy_getvar(pi, name)
#define PHY_GETINTVAR(pi, name) phy_getintvar(pi, name)
#define PHY_GETVAR(pi, name) phy_getvar(pi, name)
#define PHY_GETINTVAR(pi, name) phy_getintvar(pi, name)
extern u16 read_phy_reg(struct brcms_phy *pi, u16 addr);
extern void write_phy_reg(struct brcms_phy *pi, u16 addr, u16 val);
......@@ -1131,13 +1159,17 @@ extern void wlc_phy_stay_in_carriersearch_nphy(struct brcms_phy *pi,
bool enable);
extern void wlc_nphy_deaf_mode(struct brcms_phy *pi, bool mode);
#define wlc_phy_write_table_nphy(pi, pti) wlc_phy_write_table(pi, pti, 0x72, \
0x74, 0x73)
#define wlc_phy_read_table_nphy(pi, pti) wlc_phy_read_table(pi, pti, 0x72, \
0x74, 0x73)
#define wlc_nphy_table_addr(pi, id, off) wlc_phy_table_addr((pi), (id), (off), \
0x72, 0x74, 0x73)
#define wlc_nphy_table_data_write(pi, w, v) wlc_phy_table_data_write((pi), (w), (v))
#define wlc_phy_write_table_nphy(pi, pti) \
wlc_phy_write_table(pi, pti, 0x72, 0x74, 0x73)
#define wlc_phy_read_table_nphy(pi, pti) \
wlc_phy_read_table(pi, pti, 0x72, 0x74, 0x73)
#define wlc_nphy_table_addr(pi, id, off) \
wlc_phy_table_addr((pi), (id), (off), 0x72, 0x74, 0x73)
#define wlc_nphy_table_data_write(pi, w, v) \
wlc_phy_table_data_write((pi), (w), (v))
extern void wlc_phy_table_read_nphy(struct brcms_phy *pi, u32, u32 l, u32 o,
u32 w, void *d);
......@@ -1218,7 +1250,7 @@ extern void wlc_phy_nphy_tkip_rifs_war(struct brcms_phy *pi, u8 rifs);
void wlc_phy_get_pwrdet_offsets(struct brcms_phy *pi, s8 *cckoffset,
s8 *ofdmoffset);
extern s8 wlc_phy_upd_rssi_offset(struct brcms_phy *pi, s8 rssi,
u16 chanspec);
u16 chanspec);
extern bool wlc_phy_n_txpower_ipa_ison(struct brcms_phy *pih);
#endif /* _BRCM_PHY_INT_H_ */
drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.c
View file @ 7b4d189f
......@@ -79,15 +79,15 @@
#define wlc_lcnphy_enable_tx_gain_override(pi) \
wlc_lcnphy_set_tx_gain_override(pi, true)
#define wlc_lcnphy_disable_tx_gain_override(pi) \
#define wlc_lcnphy_disable_tx_gain_override(pi) \
wlc_lcnphy_set_tx_gain_override(pi, false)
#define wlc_lcnphy_iqcal_active(pi) \
(read_phy_reg((pi), 0x451) & \
((0x1 << 15) | (0x1 << 14)))
((0x1 << 15) | (0x1 << 14)))
#define txpwrctrl_off(pi) (0x7 != ((read_phy_reg(pi, 0x4a4) & 0xE000) >> 13))
#define wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) \
#define wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) \
(pi->temppwrctrl_capable)
#define wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) \
(pi->hwpwrctrl_capable)
......@@ -132,12 +132,12 @@
#define LCNPHY_ACI_DETECT_TIMEOUT 2
#define LCNPHY_ACI_START_DELAY 0
#define wlc_lcnphy_tx_gain_override_enabled(pi) \
#define wlc_lcnphy_tx_gain_override_enabled(pi) \
(0 != (read_phy_reg((pi), 0x43b) & (0x1 << 6)))
#define wlc_lcnphy_total_tx_frames(pi) \
wlapi_bmac_read_shm((pi)->sh->physhim, \
M_UCODE_MACSTAT + offsetof(struct macstat, txallfrm))
wlapi_bmac_read_shm((pi)->sh->physhim, M_UCODE_MACSTAT + \
offsetof(struct macstat, txallfrm))
struct lcnphy_txgains {
u16 gm_gain;
......@@ -198,7 +198,7 @@ static const iqcal_gain_params_lcnphy *tbl_iqcal_gainparams_lcnphy[1] = {
static const u16 iqcal_gainparams_numgains_lcnphy[1] = {
sizeof(tbl_iqcal_gainparams_lcnphy_2G) /
sizeof(*tbl_iqcal_gainparams_lcnphy_2G),
sizeof(*tbl_iqcal_gainparams_lcnphy_2G),
};
static const struct lcnphy_sfo_cfg lcnphy_sfo_cfg[] = {
......@@ -920,47 +920,52 @@ u16 LCNPHY_txdigfiltcoeffs_ofdm[LCNPHY_NUM_TX_DIG_FILTERS_OFDM]
#define wlc_lcnphy_set_start_tx_pwr_idx(pi, idx) \
mod_phy_reg(pi, 0x4a4, \
(0x1ff << 0), \
(u16)(idx) << 0)
(0x1ff << 0), \
(u16)(idx) << 0)
#define wlc_lcnphy_set_tx_pwr_npt(pi, npt) \
mod_phy_reg(pi, 0x4a5, \
(0x7 << 8), \
(u16)(npt) << 8)
(0x7 << 8), \
(u16)(npt) << 8)
#define wlc_lcnphy_get_tx_pwr_ctrl(pi) \
(read_phy_reg((pi), 0x4a4) & \
((0x1 << 15) | \
(0x1 << 14) | \
(0x1 << 13)))
((0x1 << 15) | \
(0x1 << 14) | \
(0x1 << 13)))
#define wlc_lcnphy_get_tx_pwr_npt(pi) \
((read_phy_reg(pi, 0x4a5) & \
(0x7 << 8)) >> \
8)
(0x7 << 8)) >> \
8)
#define wlc_lcnphy_get_current_tx_pwr_idx_if_pwrctrl_on(pi) \
(read_phy_reg(pi, 0x473) & 0x1ff)
#define wlc_lcnphy_get_target_tx_pwr(pi) \
((read_phy_reg(pi, 0x4a7) & \
(0xff << 0)) >> \
0)
(0xff << 0)) >> \
0)
#define wlc_lcnphy_set_target_tx_pwr(pi, target) \
mod_phy_reg(pi, 0x4a7, \
(0xff << 0), \
(u16)(target) << 0)
(0xff << 0), \
(u16)(target) << 0)
#define wlc_radio_2064_rcal_done(pi) (0 != (read_radio_reg(pi, RADIO_2064_REG05C) & 0x20))
#define tempsense_done(pi) (0x8000 == (read_phy_reg(pi, 0x476) & 0x8000))
#define wlc_radio_2064_rcal_done(pi) \
(0 != (read_radio_reg(pi, RADIO_2064_REG05C) & 0x20))
#define tempsense_done(pi) \
(0x8000 == (read_phy_reg(pi, 0x476) & 0x8000))
#define LCNPHY_IQLOCC_READ(val) \
((u8)(-(s8)(((val) & 0xf0) >> 4) + (s8)((val) & 0x0f)))
#define LCNPHY_IQLOCC_READ(val) ((u8)(-(s8)(((val) & 0xf0) >> 4) + (s8)((val) & 0x0f)))
#define FIXED_TXPWR 78
#define LCNPHY_TEMPSENSE(val) ((s16)((val > 255) ? (val - 512) : val))
static u32 wlc_lcnphy_qdiv_roundup(u32 divident, u32 divisor,
u8 precision);
u8 precision);
static void wlc_lcnphy_set_rx_gain_by_distribution(struct brcms_phy *pi,
u16 ext_lna, u16 trsw,
u16 biq2, u16 biq1,
......@@ -989,8 +994,10 @@ static void wlc_lcnphy_tx_pwr_ctrl_init(struct brcms_phy_pub *ppi);
static void wlc_lcnphy_radio_2064_channel_tune_4313(struct brcms_phy *pi,
u8 channel);
static void wlc_lcnphy_load_tx_gain_table(struct brcms_phy *pi,
const struct lcnphy_tx_gain_tbl_entry *g);
static void wlc_lcnphy_load_tx_gain_table(
struct brcms_phy *pi,
const struct lcnphy_tx_gain_tbl_entry
*g);
static void wlc_lcnphy_samp_cap(struct brcms_phy *pi, int clip_detect_algo,
u16 thresh, s16 *ptr, int mode);
......@@ -1115,9 +1122,8 @@ s8 wlc_lcnphy_get_current_tx_pwr_idx(struct brcms_phy *pi)
if (txpwrctrl_off(pi))
index = pi_lcn->lcnphy_current_index;
else if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi))
index =
(s8) (wlc_lcnphy_get_current_tx_pwr_idx_if_pwrctrl_on(pi)
/ 2);
index = (s8) (wlc_lcnphy_get_current_tx_pwr_idx_if_pwrctrl_on(
pi) / 2);
else
index = pi_lcn->lcnphy_current_index;
return index;
......@@ -1265,7 +1271,7 @@ static u16 wlc_lcnphy_get_pa_gain(struct brcms_phy *pi)
pa_gain = (read_phy_reg(pi, 0x4fb) &
LCNPHY_txgainctrlovrval1_pagain_ovr_val1_MASK) >>
LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT;
LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT;
return pa_gain;
}
......@@ -1275,18 +1281,22 @@ static void wlc_lcnphy_set_tx_gain(struct brcms_phy *pi,
{
u16 pa_gain = wlc_lcnphy_get_pa_gain(pi);
mod_phy_reg(pi, 0x4b5,
(0xffff << 0),
((target_gains->gm_gain) | (target_gains->pga_gain << 8)) <<
0);
mod_phy_reg(
pi, 0x4b5,
(0xffff << 0),
((target_gains->gm_gain) |
(target_gains->pga_gain << 8)) <<
0);
mod_phy_reg(pi, 0x4fb,
(0x7fff << 0),
((target_gains->pad_gain) | (pa_gain << 8)) << 0);
mod_phy_reg(pi, 0x4fc,
(0xffff << 0),
((target_gains->gm_gain) | (target_gains->pga_gain << 8)) <<
0);
mod_phy_reg(
pi, 0x4fc,
(0xffff << 0),
((target_gains->gm_gain) |
(target_gains->pga_gain << 8)) <<
0);
mod_phy_reg(pi, 0x4fd,
(0x7fff << 0),
((target_gains->pad_gain) | (pa_gain << 8)) << 0);
......@@ -1404,8 +1414,8 @@ static void wlc_lcnphy_pwrctrl_rssiparams(struct brcms_phy *pi)
u16 auxpga_vmid, auxpga_vmid_temp, auxpga_gain_temp;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
auxpga_vmid =
(2 << 8) | (pi_lcn->lcnphy_rssi_vc << 4) | pi_lcn->lcnphy_rssi_vf;
auxpga_vmid = (2 << 8) |
(pi_lcn->lcnphy_rssi_vc << 4) | pi_lcn->lcnphy_rssi_vf;
auxpga_vmid_temp = (2 << 8) | (8 << 4) | 4;
auxpga_gain_temp = 2;
......@@ -1600,7 +1610,7 @@ void wlc_lcnphy_txpower_recalc_target(struct brcms_phy *pi)
{
struct phytbl_info tab;
u32 rate_table[BRCMS_NUM_RATES_CCK + BRCMS_NUM_RATES_OFDM +
BRCMS_NUM_RATES_MCS_1_STREAM];
BRCMS_NUM_RATES_MCS_1_STREAM];
uint i, j;
if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
return;
......@@ -1715,9 +1725,9 @@ static s8 wlc_lcnphy_tempcompensated_txpwrctrl(struct brcms_phy *pi)
}
delta_temp = (s8) wlc_lcnphy_qdiv_roundup((u32) (temp_diff * 192),
(u32) (pi_lcn->
lcnphy_tempsense_slope
* 10), 0);
(u32) (pi_lcn->
lcnphy_tempsense_slope
* 10), 0);
if (neg)
delta_temp = -delta_temp;
......@@ -1731,7 +1741,7 @@ static s8 wlc_lcnphy_tempcompensated_txpwrctrl(struct brcms_phy *pi)
if (LCNREV_IS(pi->pubpi.phy_rev, 1))
tempcorrx = 4;
new_index =
index + delta_brd + delta_temp - pi_lcn->lcnphy_bandedge_corr;
index + delta_brd + delta_temp - pi_lcn->lcnphy_bandedge_corr;
new_index += tempcorrx;
if (LCNREV_IS(pi->pubpi.phy_rev, 1))
......@@ -1789,7 +1799,7 @@ void wlc_lcnphy_set_tx_pwr_ctrl(struct brcms_phy *pi, u16 mode)
mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 0);
pi_lcn->lcnphy_tssi_tx_cnt =
wlc_lcnphy_total_tx_frames(pi);
wlc_lcnphy_total_tx_frames(pi);
wlc_lcnphy_disable_tx_gain_override(pi);
pi_lcn->lcnphy_tx_power_idx_override = -1;
......@@ -1802,7 +1812,9 @@ void wlc_lcnphy_set_tx_pwr_ctrl(struct brcms_phy *pi, u16 mode)
index = wlc_lcnphy_tempcompensated_txpwrctrl(pi);
wlc_lcnphy_set_tx_pwr_soft_ctrl(pi, index);
pi_lcn->lcnphy_current_index = (s8)
((read_phy_reg(pi, 0x4a9) & 0xFF) / 2);
((read_phy_reg(pi,
0x4a9) &
0xFF) / 2);
}
}
}
......@@ -1834,20 +1846,23 @@ wlc_lcnphy_tx_iqlo_cal(struct brcms_phy *pi,
int j;
u16 ncorr_override[5];
u16 syst_coeffs[] = { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000
};
0x0000, 0x0000, 0x0000, 0x0000, 0x0000};
u16 commands_fullcal[] = {
0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234 };
0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234
};
u16 commands_recal[] = {
0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234 };
0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234
};
u16 command_nums_fullcal[] = {
0x7a97, 0x7a97, 0x7a97, 0x7a87, 0x7a87, 0x7b97 };
0x7a97, 0x7a97, 0x7a97, 0x7a87, 0x7a87, 0x7b97
};
u16 command_nums_recal[] = {
0x7a97, 0x7a97, 0x7a97, 0x7a87, 0x7a87, 0x7b97 };
0x7a97, 0x7a97, 0x7a97, 0x7a87, 0x7a87, 0x7b97
};
u16 *command_nums = command_nums_fullcal;
u16 *start_coeffs = NULL, *cal_cmds = NULL, cal_type, diq_start;
......@@ -1923,7 +1938,7 @@ wlc_lcnphy_tx_iqlo_cal(struct brcms_phy *pi,
}
hash = (target_gains->gm_gain << 8) |
(target_gains->pga_gain << 4) | (target_gains->pad_gain);
(target_gains->pga_gain << 4) | (target_gains->pad_gain);
band_idx = (CHSPEC_IS5G(pi->radio_chanspec) ? 1 : 0);
......@@ -1932,11 +1947,11 @@ wlc_lcnphy_tx_iqlo_cal(struct brcms_phy *pi,
for (j = 0; j < iqcal_gainparams_numgains_lcnphy[band_idx]; j++) {
if (hash == tbl_iqcal_gainparams_lcnphy[band_idx][j][0]) {
cal_gains.gm_gain =
tbl_iqcal_gainparams_lcnphy[band_idx][j][1];
tbl_iqcal_gainparams_lcnphy[band_idx][j][1];
cal_gains.pga_gain =
tbl_iqcal_gainparams_lcnphy[band_idx][j][2];
tbl_iqcal_gainparams_lcnphy[band_idx][j][2];
cal_gains.pad_gain =
tbl_iqcal_gainparams_lcnphy[band_idx][j][3];
tbl_iqcal_gainparams_lcnphy[band_idx][j][3];
memcpy(ncorr_override,
&tbl_iqcal_gainparams_lcnphy[band_idx][j][3],
sizeof(ncorr_override));
......@@ -1957,7 +1972,8 @@ wlc_lcnphy_tx_iqlo_cal(struct brcms_phy *pi,
wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
(const void *)lcnphy_iqcal_ir_gainladder,
ARRAY_SIZE(lcnphy_iqcal_ir_gainladder), 16,
ARRAY_SIZE(
lcnphy_iqcal_ir_gainladder), 16,
32);
if (pi->phy_tx_tone_freq) {
......@@ -1981,8 +1997,8 @@ wlc_lcnphy_tx_iqlo_cal(struct brcms_phy *pi,
command_num = command_nums[i];
if (ncorr_override[cal_type])
command_num =
ncorr_override[cal_type] << 8 | (command_num &
0xff);
ncorr_override[cal_type] << 8 | (command_num &
0xff);
write_phy_reg(pi, 0x452, command_num);
......@@ -2013,8 +2029,8 @@ wlc_lcnphy_tx_iqlo_cal(struct brcms_phy *pi,
pi_lcn->lcnphy_cal_results.
txiqlocal_bestcoeffs,
ARRAY_SIZE(pi_lcn->
lcnphy_cal_results.
txiqlocal_bestcoeffs),
lcnphy_cal_results.
txiqlocal_bestcoeffs),
16, 96);
}
......@@ -2022,7 +2038,7 @@ wlc_lcnphy_tx_iqlo_cal(struct brcms_phy *pi,
pi_lcn->lcnphy_cal_results.
txiqlocal_bestcoeffs,
ARRAY_SIZE(pi_lcn->lcnphy_cal_results.
txiqlocal_bestcoeffs), 16, 96);
txiqlocal_bestcoeffs), 16, 96);
pi_lcn->lcnphy_cal_results.txiqlocal_bestcoeffs_valid = true;
wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
......@@ -2033,7 +2049,7 @@ wlc_lcnphy_tx_iqlo_cal(struct brcms_phy *pi,
&pi_lcn->lcnphy_cal_results.
txiqlocal_bestcoeffs[5], 2, 16, 85);
cleanup:
cleanup:
wlc_lcnphy_tx_iqlo_loopback_cleanup(pi, values_to_save);
kfree(values_to_save);
......@@ -2063,14 +2079,14 @@ static void wlc_lcnphy_idle_tssi_est(struct brcms_phy_pub *ppi)
u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
u16 SAVE_lpfgain = read_radio_reg(pi, RADIO_2064_REG112);
u16 SAVE_jtag_bb_afe_switch =
read_radio_reg(pi, RADIO_2064_REG007) & 1;
read_radio_reg(pi, RADIO_2064_REG007) & 1;
u16 SAVE_jtag_auxpga = read_radio_reg(pi, RADIO_2064_REG0FF) & 0x10;
u16 SAVE_iqadc_aux_en = read_radio_reg(pi, RADIO_2064_REG11F) & 4;
idleTssi = read_phy_reg(pi, 0x4ab);
suspend =
(0 ==
(R_REG(&((struct brcms_phy *) pi)->regs->maccontrol) &
MCTL_EN_MAC));
(0 ==
(R_REG(&((struct brcms_phy *) pi)->regs->maccontrol) &
MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
......@@ -2128,7 +2144,7 @@ static void wlc_lcnphy_vbat_temp_sense_setup(struct brcms_phy *pi, u8 mode)
struct phytbl_info tab;
u32 val;
u8 save_reg007, save_reg0FF, save_reg11F, save_reg005, save_reg025,
save_reg112;
save_reg112;
u16 values_to_save[14];
s8 index;
int i;
......@@ -2144,8 +2160,7 @@ static void wlc_lcnphy_vbat_temp_sense_setup(struct brcms_phy *pi, u8 mode)
for (i = 0; i < 14; i++)
values_to_save[i] = read_phy_reg(pi, tempsense_phy_regs[i]);
suspend =
(0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
suspend = (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
save_txpwrCtrlEn = read_radio_reg(pi, 0x4a4);
......@@ -2228,7 +2243,7 @@ static void wlc_lcnphy_vbat_temp_sense_setup(struct brcms_phy *pi, u8 mode)
auxpga_gain = 2;
}
auxpga_vmid =
(u16) ((2 << 8) | (auxpga_vmidcourse << 4) | auxpga_vmidfine);
(u16) ((2 << 8) | (auxpga_vmidcourse << 4) | auxpga_vmidfine);
mod_phy_reg(pi, 0x4d8, (0x1 << 0), (1) << 0);
mod_phy_reg(pi, 0x4d8, (0x3ff << 2), (auxpga_vmid) << 2);
......@@ -2272,7 +2287,7 @@ static void wlc_lcnphy_tx_pwr_ctrl_init(struct brcms_phy_pub *ppi)
struct brcms_phy *pi = (struct brcms_phy *) ppi;
suspend =
(0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
(0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
......@@ -2522,9 +2537,10 @@ wlc_lcnphy_set_rx_gain_by_distribution(struct brcms_phy *pi,
gain16_19 = biq2 & 0xf;
gain0_15 = ((biq1 & 0xf) << 12) |
((tia & 0xf) << 8) |
((lna2 & 0x3) << 6) |
((lna2 & 0x3) << 4) | ((lna1 & 0x3) << 2) | ((lna1 & 0x3) << 0);
((tia & 0xf) << 8) |
((lna2 & 0x3) << 6) |
((lna2 &
0x3) << 4) | ((lna1 & 0x3) << 2) | ((lna1 & 0x3) << 0);
mod_phy_reg(pi, 0x4b6, (0xffff << 0), gain0_15 << 0);
mod_phy_reg(pi, 0x4b7, (0xf << 0), gain16_19 << 0);
......@@ -2581,9 +2597,9 @@ void wlc_lcnphy_tx_pu(struct brcms_phy *pi, bool bEnable)
and_phy_reg(pi, 0x44c,
~(u16) ((0x1 << 3) |
(0x1 << 5) |
(0x1 << 12) |
(0x1 << 0) | (0x1 << 1) | (0x1 << 2)));
(0x1 << 5) |
(0x1 << 12) |
(0x1 << 0) | (0x1 << 1) | (0x1 << 2)));
and_phy_reg(pi, 0x44d,
~(u16) ((0x1 << 3) | (0x1 << 5) | (0x1 << 14)));
......@@ -2693,7 +2709,8 @@ void wlc_lcnphy_deaf_mode(struct brcms_phy *pi, bool mode)
mod_phy_reg((pi), 0x410,
(0x1 << 6) |
(0x1 << 5),
((CHSPEC_IS2G(pi->radio_chanspec)) ? (!mode) : 0) <<
((CHSPEC_IS2G(
pi->radio_chanspec)) ? (!mode) : 0) <<
6 | (!mode) << 5);
mod_phy_reg(pi, 0x410, (0x1 << 7), (mode) << 7);
}
......@@ -2916,7 +2933,7 @@ static void wlc_lcnphy_txpwrtbl_iqlo_cal(struct brcms_phy *pi)
wlc_lcnphy_read_table(pi, &tab);
val = (val & 0xfff00000) |
((u32) (a & 0x3FF) << 10) | (b & 0x3ff);
((u32) (a & 0x3FF) << 10) | (b & 0x3ff);
wlc_lcnphy_write_table(pi, &tab);
val = didq;
......@@ -2953,8 +2970,8 @@ s16 wlc_lcnphy_tempsense_new(struct brcms_phy *pi, bool mode)
if (mode == 1) {
suspend =
(0 ==
(R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
(0 ==
(R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE);
......@@ -3000,8 +3017,8 @@ u16 wlc_lcnphy_tempsense(struct brcms_phy *pi, bool mode)
if (mode == 1) {
suspend =
(0 ==
(R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
(0 ==
(R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE);
......@@ -3052,8 +3069,9 @@ s8 wlc_lcnphy_tempsense_degree(struct brcms_phy *pi, bool mode)
{
s32 degree = wlc_lcnphy_tempsense_new(pi, mode);
degree =
((degree << 10) + LCN_TEMPSENSE_OFFSET + (LCN_TEMPSENSE_DEN >> 1))
/ LCN_TEMPSENSE_DEN;
((degree <<
10) + LCN_TEMPSENSE_OFFSET + (LCN_TEMPSENSE_DEN >> 1))
/ LCN_TEMPSENSE_DEN;
return (s8) degree;
}
......@@ -3068,8 +3086,8 @@ s8 wlc_lcnphy_vbatsense(struct brcms_phy *pi, bool mode)
if (mode == 1) {
suspend =
(0 ==
(R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
(0 ==
(R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
wlc_lcnphy_vbat_temp_sense_setup(pi, VBATSENSE);
......@@ -3082,9 +3100,8 @@ s8 wlc_lcnphy_vbatsense(struct brcms_phy *pi, bool mode)
else
avg = (s32) vbatsenseval;
avg =
(avg * LCN_VBAT_SCALE_NOM +
(LCN_VBAT_SCALE_DEN >> 1)) / LCN_VBAT_SCALE_DEN;
avg = (avg * LCN_VBAT_SCALE_NOM +
(LCN_VBAT_SCALE_DEN >> 1)) / LCN_VBAT_SCALE_DEN;
if (mode == 1) {
if (!suspend)
......@@ -3140,13 +3157,13 @@ wlc_lcnphy_rx_iq_est(struct brcms_phy *pi,
}
iq_est->iq_prod = ((u32) read_phy_reg(pi, 0x483) << 16) |
(u32) read_phy_reg(pi, 0x484);
(u32) read_phy_reg(pi, 0x484);
iq_est->i_pwr = ((u32) read_phy_reg(pi, 0x485) << 16) |
(u32) read_phy_reg(pi, 0x486);
(u32) read_phy_reg(pi, 0x486);
iq_est->q_pwr = ((u32) read_phy_reg(pi, 0x487) << 16) |
(u32) read_phy_reg(pi, 0x488);
(u32) read_phy_reg(pi, 0x488);
cleanup:
cleanup:
mod_phy_reg(pi, 0x410, (0x1 << 3), (1) << 3);
mod_phy_reg(pi, 0x6da, (0x1 << 5), (0) << 5);
......@@ -3221,7 +3238,7 @@ static bool wlc_lcnphy_calc_rx_iq_comp(struct brcms_phy *pi, u16 num_samps)
b -= (1 << 10);
a0_new = (u16) (a & 0x3ff);
b0_new = (u16) (b & 0x3ff);
cleanup:
cleanup:
wlc_lcnphy_set_rx_iq_comp(pi, a0_new, b0_new);
......@@ -3282,7 +3299,7 @@ wlc_lcnphy_rx_iq_cal(struct brcms_phy *pi,
for (i = 0; i < 11; i++)
values_to_save[i] =
read_radio_reg(pi, rxiq_cal_rf_reg[i]);
read_radio_reg(pi, rxiq_cal_rf_reg[i]);
Core1TxControl_old = read_phy_reg(pi, 0x631);
or_phy_reg(pi, 0x631, 0x0015);
......@@ -3356,7 +3373,7 @@ wlc_lcnphy_rx_iq_cal(struct brcms_phy *pi,
udelay(500);
received_power =
wlc_lcnphy_measure_digital_power(pi, 2000);
wlc_lcnphy_measure_digital_power(pi, 2000);
if (received_power < rx_pwr_threshold)
break;
}
......@@ -3396,7 +3413,7 @@ wlc_lcnphy_rx_iq_cal(struct brcms_phy *pi,
wlc_lcnphy_rx_gain_override_enable(pi, false);
}
cal_done:
cal_done:
kfree(ptr);
return result;
}
......@@ -3414,7 +3431,7 @@ static void wlc_lcnphy_glacial_timer_based_cal(struct brcms_phy *pi)
u16 SAVE_pwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
suspend =
(0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
(0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim);
wlc_lcnphy_deaf_mode(pi, true);
......@@ -3450,13 +3467,13 @@ static void wlc_lcnphy_periodic_cal(struct brcms_phy *pi)
pi->phy_lastcal = pi->sh->now;
pi->phy_forcecal = false;
full_cal =
(pi_lcn->lcnphy_full_cal_channel !=
CHSPEC_CHANNEL(pi->radio_chanspec));
(pi_lcn->lcnphy_full_cal_channel !=
CHSPEC_CHANNEL(pi->radio_chanspec));
pi_lcn->lcnphy_full_cal_channel = CHSPEC_CHANNEL(pi->radio_chanspec);
index = pi_lcn->lcnphy_current_index;
suspend =
(0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
(0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend) {
wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 10000);
wlapi_suspend_mac_and_wait(pi->sh->physhim);
......@@ -3538,7 +3555,7 @@ void wlc_lcnphy_calib_modes(struct brcms_phy *pi, uint mode)
case LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL:
if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
wlc_lcnphy_tx_power_adjustment(
(struct brcms_phy_pub *) pi);
(struct brcms_phy_pub *) pi);
break;
}
}
......@@ -3551,7 +3568,7 @@ void wlc_lcnphy_get_tssi(struct brcms_phy *pi, s8 *ofdm_pwr, s8 *cck_pwr)
if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) &&
(status & (0x1 << 15))) {
*ofdm_pwr = (s8) (((read_phy_reg(pi, 0x4ab) & (0x1ff << 0))
>> 0) >> 1);
>> 0) >> 1);
if (wlc_phy_tpc_isenabled_lcnphy(pi))
cck_offset = pi->tx_power_offset[TXP_FIRST_CCK];
......@@ -3629,13 +3646,14 @@ void wlc_lcnphy_tx_power_adjustment(struct brcms_phy_pub *ppi)
struct brcms_phy *pi = (struct brcms_phy *) ppi;
struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;
u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) && SAVE_txpwrctrl) {
if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) &&
SAVE_txpwrctrl) {
index = wlc_lcnphy_tempcompensated_txpwrctrl(pi);
index2 = (u16) (index * 2);
mod_phy_reg(pi, 0x4a9, (0x1ff << 0), (index2) << 0);
pi_lcn->lcnphy_current_index = (s8)
((read_phy_reg(pi, 0x4a9) & 0xFF) / 2);
pi_lcn->lcnphy_current_index =
(s8)((read_phy_reg(pi, 0x4a9) & 0xFF) / 2);
}
}
......@@ -3711,7 +3729,7 @@ wlc_lcnphy_tx_iqlo_loopback(struct brcms_phy *pi, u16 *values_to_save)
int i;
for (i = 0; i < 20; i++)
values_to_save[i] =
read_radio_reg(pi, iqlo_loopback_rf_regs[i]);
read_radio_reg(pi, iqlo_loopback_rf_regs[i]);
mod_phy_reg(pi, 0x44c, (0x1 << 12), 1 << 12);
mod_phy_reg(pi, 0x44d, (0x1 << 14), 1 << 14);
......@@ -4140,8 +4158,8 @@ wlc_lcnphy_a1(struct brcms_phy *pi, int cal_type, int num_levels,
phy_c18 = phy_c18 >> 10;
phy_c19 = phy_c19 >> 10;
phy_c20 =
((phy_c18 * phy_c18) + (phy_c19 * phy_c19));
phy_c20 = ((phy_c18 * phy_c18) +
(phy_c19 * phy_c19));
if (phy_c23 || phy_c20 < phy_c21) {
phy_c21 = phy_c20;
......@@ -4159,7 +4177,7 @@ wlc_lcnphy_a1(struct brcms_phy *pi, int cal_type, int num_levels,
udelay(20);
}
goto cleanup;
cleanup:
cleanup:
wlc_lcnphy_tx_iqlo_loopback_cleanup(pi, phy_c32);
wlc_lcnphy_stop_tx_tone(pi);
write_phy_reg(pi, 0x6da, phy_c26);
......@@ -4189,7 +4207,8 @@ wlc_lcnphy_tx_iqlo_loopback_cleanup(struct brcms_phy *pi, u16 *values_to_save)
static void
wlc_lcnphy_load_tx_gain_table(struct brcms_phy *pi,
const struct lcnphy_tx_gain_tbl_entry *gain_table) {
const struct lcnphy_tx_gain_tbl_entry *gain_table)
{
u32 j;
struct phytbl_info tab;
u32 val;
......@@ -4313,11 +4332,13 @@ static void wlc_lcnphy_tbl_init(struct brcms_phy *pi)
if (CHSPEC_IS2G(pi->radio_chanspec)) {
if (pi->sh->boardflags & BFL_FEM)
wlc_lcnphy_load_tx_gain_table(pi,
dot11lcnphy_2GHz_extPA_gaintable_rev0);
wlc_lcnphy_load_tx_gain_table(
pi,
dot11lcnphy_2GHz_extPA_gaintable_rev0);
else
wlc_lcnphy_load_tx_gain_table(pi,
dot11lcnphy_2GHz_gaintable_rev0);
wlc_lcnphy_load_tx_gain_table(
pi,
dot11lcnphy_2GHz_gaintable_rev0);
}
if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
......@@ -4326,25 +4347,33 @@ static void wlc_lcnphy_tbl_init(struct brcms_phy *pi)
idx < dot11lcnphytbl_rx_gain_info_2G_rev2_sz;
idx++)
if (pi->sh->boardflags & BFL_EXTLNA)
wlc_lcnphy_write_table(pi,
&dot11lcnphytbl_rx_gain_info_extlna_2G_rev2
[idx]);
wlc_lcnphy_write_table(
pi,
&
dot11lcnphytbl_rx_gain_info_extlna_2G_rev2
[idx]);
else
wlc_lcnphy_write_table(pi,
&dot11lcnphytbl_rx_gain_info_2G_rev2
[idx]);
wlc_lcnphy_write_table(
pi,
&
dot11lcnphytbl_rx_gain_info_2G_rev2
[idx]);
} else {
for (idx = 0;
idx < dot11lcnphytbl_rx_gain_info_5G_rev2_sz;
idx++)
if (pi->sh->boardflags & BFL_EXTLNA_5GHz)
wlc_lcnphy_write_table(pi,
&dot11lcnphytbl_rx_gain_info_extlna_5G_rev2
[idx]);
wlc_lcnphy_write_table(
pi,
&
dot11lcnphytbl_rx_gain_info_extlna_5G_rev2
[idx]);
else
wlc_lcnphy_write_table(pi,
&dot11lcnphytbl_rx_gain_info_5G_rev2
[idx]);
wlc_lcnphy_write_table(
pi,
&
dot11lcnphytbl_rx_gain_info_5G_rev2
[idx]);
}
}
......@@ -4353,11 +4382,13 @@ static void wlc_lcnphy_tbl_init(struct brcms_phy *pi)
wlc_lcnphy_write_table(pi, &dot11lcn_sw_ctrl_tbl_info_4313_epa);
else if (pi->sh->boardflags & BFL_FEM_BT) {
if (pi->sh->boardrev < 0x1250)
wlc_lcnphy_write_table(pi,
&dot11lcn_sw_ctrl_tbl_info_4313_bt_epa);
wlc_lcnphy_write_table(
pi,
&dot11lcn_sw_ctrl_tbl_info_4313_bt_epa);
else
wlc_lcnphy_write_table(pi,
&dot11lcn_sw_ctrl_tbl_info_4313_bt_epa_p250);
wlc_lcnphy_write_table(
pi,
&dot11lcn_sw_ctrl_tbl_info_4313_bt_epa_p250);
} else
wlc_lcnphy_write_table(pi, &dot11lcn_sw_ctrl_tbl_info_4313);
......@@ -4394,9 +4425,8 @@ static void wlc_lcnphy_rev0_baseband_init(struct brcms_phy *pi)
if (0) {
afectrl1 = 0;
afectrl1 = (u16) ((pi_lcn->lcnphy_rssi_vf) |
(pi_lcn->lcnphy_rssi_vc << 4) | (pi_lcn->
lcnphy_rssi_gs
<< 10));
(pi_lcn->lcnphy_rssi_vc << 4) |
(pi_lcn->lcnphy_rssi_gs << 10));
write_phy_reg(pi, 0x43e, afectrl1);
}
......@@ -4457,18 +4487,15 @@ static void wlc_lcnphy_agc_temp_init(struct brcms_phy *pi)
tableBuffer[1] -= 128;
pi_lcn->lcnphy_tr_T_gain_val = tableBuffer[1];
temp = (s16) (read_phy_reg(pi, 0x434)
& (0xff << 0));
temp = (s16) (read_phy_reg(pi, 0x434) & (0xff << 0));
if (temp > 127)
temp -= 256;
pi_lcn->lcnphy_input_pwr_offset_db = (s8) temp;
pi_lcn->lcnphy_Med_Low_Gain_db = (read_phy_reg(pi, 0x424)
& (0xff << 8))
>> 8;
pi_lcn->lcnphy_Very_Low_Gain_db = (read_phy_reg(pi, 0x425)
& (0xff << 0))
>> 0;
pi_lcn->lcnphy_Med_Low_Gain_db =
(read_phy_reg(pi, 0x424) & (0xff << 8)) >> 8;
pi_lcn->lcnphy_Very_Low_Gain_db =
(read_phy_reg(pi, 0x425) & (0xff << 0)) >> 0;
tab.tbl_ptr = tableBuffer;
tab.tbl_len = 2;
......@@ -4659,8 +4686,8 @@ static void wlc_lcnphy_rc_cal(struct brcms_phy *pi)
if (LCNREV_IS(pi->pubpi.phy_rev, 1))
dflt_rc_cal_val = 11;
flt_val =
(dflt_rc_cal_val << 10) | (dflt_rc_cal_val << 5) |
(dflt_rc_cal_val);
(dflt_rc_cal_val << 10) | (dflt_rc_cal_val << 5) |
(dflt_rc_cal_val);
write_phy_reg(pi, 0x933, flt_val);
write_phy_reg(pi, 0x934, flt_val);
write_phy_reg(pi, 0x935, flt_val);
......@@ -4681,10 +4708,10 @@ static bool wlc_phy_txpwr_srom_read_lcnphy(struct brcms_phy *pi)
u32 offset_ofdm, offset_mcs;
pi_lcn->lcnphy_tr_isolation_mid =
(u8) PHY_GETINTVAR(pi, "triso2g");
(u8) PHY_GETINTVAR(pi, "triso2g");
pi_lcn->lcnphy_rx_power_offset =
(u8) PHY_GETINTVAR(pi, "rxpo2g");
(u8) PHY_GETINTVAR(pi, "rxpo2g");
pi->txpa_2g[0] = (s16) PHY_GETINTVAR(pi, "pa0b0");
pi->txpa_2g[1] = (s16) PHY_GETINTVAR(pi, "pa0b1");
......@@ -4700,11 +4727,11 @@ static bool wlc_phy_txpwr_srom_read_lcnphy(struct brcms_phy *pi)
pi_lcn->lcnphy_rssi_gs_lowtemp = pi_lcn->lcnphy_rssi_gs;
pi_lcn->lcnphy_rssi_vf_hightemp =
pi_lcn->lcnphy_rssi_vf;
pi_lcn->lcnphy_rssi_vf;
pi_lcn->lcnphy_rssi_vc_hightemp =
pi_lcn->lcnphy_rssi_vc;
pi_lcn->lcnphy_rssi_vc;
pi_lcn->lcnphy_rssi_gs_hightemp =
pi_lcn->lcnphy_rssi_gs;
pi_lcn->lcnphy_rssi_gs;
}
txpwr = (s8) PHY_GETINTVAR(pi, "maxp2ga0");
......@@ -4720,15 +4747,16 @@ static bool wlc_phy_txpwr_srom_read_lcnphy(struct brcms_phy *pi)
uint max_pwr_chan = txpwr;
for (i = TXP_FIRST_CCK; i <= TXP_LAST_CCK; i++) {
pi->tx_srom_max_rate_2g[i] = max_pwr_chan -
((cckpo & 0xf) * 2);
pi->tx_srom_max_rate_2g[i] =
max_pwr_chan - ((cckpo & 0xf) * 2);
cckpo >>= 4;
}
offset_ofdm = (u32) PHY_GETINTVAR(pi, "ofdm2gpo");
for (i = TXP_FIRST_OFDM; i <= TXP_LAST_OFDM; i++) {
pi->tx_srom_max_rate_2g[i] = max_pwr_chan -
((offset_ofdm & 0xf) * 2);
pi->tx_srom_max_rate_2g[i] =
max_pwr_chan -
((offset_ofdm & 0xf) * 2);
offset_ofdm >>= 4;
}
} else {
......@@ -4743,41 +4771,41 @@ static bool wlc_phy_txpwr_srom_read_lcnphy(struct brcms_phy *pi)
for (i = TXP_FIRST_OFDM; i <= TXP_LAST_OFDM; i++) {
pi->tx_srom_max_rate_2g[i] = txpwr -
((offset_ofdm & 0xf) * 2);
((offset_ofdm & 0xf) * 2);
offset_ofdm >>= 4;
}
offset_mcs =
((u16) PHY_GETINTVAR(pi, "mcs2gpo1") << 16) |
(u16) PHY_GETINTVAR(pi, "mcs2gpo0");
((u16) PHY_GETINTVAR(pi, "mcs2gpo1") << 16) |
(u16) PHY_GETINTVAR(pi, "mcs2gpo0");
pi_lcn->lcnphy_mcs20_po = offset_mcs;
for (i = TXP_FIRST_SISO_MCS_20;
i <= TXP_LAST_SISO_MCS_20; i++) {
pi->tx_srom_max_rate_2g[i] =
txpwr - ((offset_mcs & 0xf) * 2);
txpwr - ((offset_mcs & 0xf) * 2);
offset_mcs >>= 4;
}
}
pi_lcn->lcnphy_rawtempsense =
(u16) PHY_GETINTVAR(pi, "rawtempsense");
(u16) PHY_GETINTVAR(pi, "rawtempsense");
pi_lcn->lcnphy_measPower =
(u8) PHY_GETINTVAR(pi, "measpower");
(u8) PHY_GETINTVAR(pi, "measpower");
pi_lcn->lcnphy_tempsense_slope =
(u8) PHY_GETINTVAR(pi, "tempsense_slope");
(u8) PHY_GETINTVAR(pi, "tempsense_slope");
pi_lcn->lcnphy_hw_iqcal_en =
(bool) PHY_GETINTVAR(pi, "hw_iqcal_en");
(bool) PHY_GETINTVAR(pi, "hw_iqcal_en");
pi_lcn->lcnphy_iqcal_swp_dis =
(bool) PHY_GETINTVAR(pi, "iqcal_swp_dis");
(bool) PHY_GETINTVAR(pi, "iqcal_swp_dis");
pi_lcn->lcnphy_tempcorrx =
(u8) PHY_GETINTVAR(pi, "tempcorrx");
(u8) PHY_GETINTVAR(pi, "tempcorrx");
pi_lcn->lcnphy_tempsense_option =
(u8) PHY_GETINTVAR(pi, "tempsense_option");
(u8) PHY_GETINTVAR(pi, "tempsense_option");
pi_lcn->lcnphy_freqoffset_corr =
(u8) PHY_GETINTVAR(pi, "freqoffset_corr");
(u8) PHY_GETINTVAR(pi, "freqoffset_corr");
if ((u8) getintvar(pi->vars, "aa2g") > 1)
wlc_phy_ant_rxdiv_set((struct brcms_phy_pub *) pi,
(u8) getintvar(pi->vars,
"aa2g"));
"aa2g"));
}
pi_lcn->lcnphy_cck_dig_filt_type = -1;
if (PHY_GETVAR(pi, "cckdigfilttype")) {
......@@ -4942,7 +4970,7 @@ wlc_lcnphy_radio_2064_channel_tune_4313(struct brcms_phy *pi, u8 channel)
d28 = (((PLL_2064_HIGH_END_KVCO - PLL_2064_LOW_END_KVCO) *
(fvco3 / 2 - PLL_2064_LOW_END_VCO)) /
(PLL_2064_HIGH_END_VCO - PLL_2064_LOW_END_VCO))
+ PLL_2064_LOW_END_KVCO;
+ PLL_2064_LOW_END_KVCO;
h28_ten = (d28 * 10) / c28;
c30 = 2640;
e30 = (d30 - 680) / 490;
......@@ -5007,7 +5035,8 @@ bool wlc_phy_attach_lcnphy(struct brcms_phy *pi)
pi_lcn = pi->u.pi_lcnphy;
if ((0 == (pi->sh->boardflags & BFL_NOPA)) && !NORADIO_ENAB(pi->pubpi)) {
if ((0 == (pi->sh->boardflags & BFL_NOPA)) &&
!NORADIO_ENAB(pi->pubpi)) {
pi->hwpwrctrl = true;
pi->hwpwrctrl_capable = true;
}
......@@ -5028,7 +5057,8 @@ bool wlc_phy_attach_lcnphy(struct brcms_phy *pi)
if (!wlc_phy_txpwr_srom_read_lcnphy(pi))
return false;
if ((pi->sh->boardflags & BFL_FEM) && (LCNREV_IS(pi->pubpi.phy_rev, 1))) {
if ((pi->sh->boardflags & BFL_FEM) &&
(LCNREV_IS(pi->pubpi.phy_rev, 1))) {
if (pi_lcn->lcnphy_tempsense_option == 3) {
pi->hwpwrctrl = true;
pi->hwpwrctrl_capable = true;
......@@ -5056,8 +5086,8 @@ static void wlc_lcnphy_set_rx_gain(struct brcms_phy *pi, u32 gain)
biq1 = (u16) (gain >> 16) & 0xf;
gain0_15 = (u16) ((lna1 & 0x3) | ((lna1 & 0x3) << 2) |
((lna2 & 0x3) << 4) | ((lna2 & 0x3) << 6) |
((tia & 0xf) << 8) | ((biq0 & 0xf) << 12));
((lna2 & 0x3) << 4) | ((lna2 & 0x3) << 6) |
((tia & 0xf) << 8) | ((biq0 & 0xf) << 12));
gain16_19 = biq1;
mod_phy_reg(pi, 0x44d, (0x1 << 0), trsw << 0);
......@@ -5092,18 +5122,19 @@ static u32 wlc_lcnphy_get_receive_power(struct brcms_phy *pi, s32 *gain_index)
lcnphy_23bitgaincode_table
[*gain_index]);
received_power =
wlc_lcnphy_measure_digital_power(pi,
pi_lcn->
lcnphy_noise_samples);
wlc_lcnphy_measure_digital_power(
pi,
pi_lcn->
lcnphy_noise_samples);
(*gain_index)++;
}
(*gain_index)--;
} else {
wlc_lcnphy_set_rx_gain(pi, gain_code);
received_power =
wlc_lcnphy_measure_digital_power(pi,
pi_lcn->
lcnphy_noise_samples);
wlc_lcnphy_measure_digital_power(pi,
pi_lcn->
lcnphy_noise_samples);
}
return received_power;
......@@ -5154,7 +5185,7 @@ s32 wlc_lcnphy_rx_signal_power(struct brcms_phy *pi, s32 gain_index)
input_power_db = input_power_offset_db - desired_gain;
input_power_db =
input_power_db + lcnphy_gain_index_offset_for_rssi[gain_index];
input_power_db + lcnphy_gain_index_offset_for_rssi[gain_index];
freq = wlc_phy_channel2freq(CHSPEC_CHANNEL(pi->radio_chanspec));
if ((freq > 2427) && (freq <= 2467))
......@@ -5164,15 +5195,17 @@ s32 wlc_lcnphy_rx_signal_power(struct brcms_phy *pi, s32 gain_index)
if ((temperature - 15) < -30)
input_power_db =
input_power_db + (((temperature - 10 - 25) * 286) >> 12) -
7;
input_power_db +
(((temperature - 10 - 25) * 286) >> 12) -
7;
else if ((temperature - 15) < 4)
input_power_db =
input_power_db + (((temperature - 10 - 25) * 286) >> 12) -
3;
input_power_db +
(((temperature - 10 - 25) * 286) >> 12) -
3;
else
input_power_db =
input_power_db + (((temperature - 10 - 25) * 286) >> 12);
input_power_db = input_power_db +
(((temperature - 10 - 25) * 286) >> 12);
wlc_lcnphy_rx_gain_override_enable(pi, 0);
......
drivers/staging/brcm80211/brcmsmac/phy/phy_n.c
View file @ 7b4d189f
This source diff could not be displayed because it is too large. You can view the blob instead.
drivers/staging/brcm80211/brcmsmac/phy/phy_qmath.c
View file @ 7b4d189f
......@@ -17,21 +17,23 @@
#include "phy_qmath.h"
/*
Description: This function make 16 bit unsigned multiplication. To fit the output into
16 bits the 32 bit multiplication result is right shifted by 16 bits.
*/
* Description: This function make 16 bit unsigned multiplication.
* To fit the output into 16 bits the 32 bit multiplication result is right
* shifted by 16 bits.
*/
u16 qm_mulu16(u16 op1, u16 op2)
{
return (u16) (((u32) op1 * (u32) op2) >> 16);
}
/*
Description: This function make 16 bit multiplication and return the result in 16 bits.
To fit the multiplication result into 16 bits the multiplication result is right shifted by
15 bits. Right shifting 15 bits instead of 16 bits is done to remove the extra sign bit formed
due to the multiplication.
When both the 16bit inputs are 0x8000 then the output is saturated to 0x7fffffff.
*/
* Description: This function make 16 bit multiplication and return the result
* in 16 bits. To fit the multiplication result into 16 bits the multiplication
* result is right shifted by 15 bits. Right shifting 15 bits instead of 16 bits
* is done to remove the extra sign bit formed due to the multiplication.
* When both the 16bit inputs are 0x8000 then the output is saturated to
* 0x7fffffff.
*/
s16 qm_muls16(s16 op1, s16 op2)
{
s32 result;
......@@ -44,9 +46,10 @@ s16 qm_muls16(s16 op1, s16 op2)
}
/*
Description: This function add two 32 bit numbers and return the 32bit result.
If the result overflow 32 bits, the output will be saturated to 32bits.
*/
* Description: This function add two 32 bit numbers and return the 32bit
* result. If the result overflow 32 bits, the output will be saturated to
* 32bits.
*/
s32 qm_add32(s32 op1, s32 op2)
{
s32 result;
......@@ -60,9 +63,10 @@ s32 qm_add32(s32 op1, s32 op2)
}
/*
Description: This function add two 16 bit numbers and return the 16bit result.
If the result overflow 16 bits, the output will be saturated to 16bits.
*/
* Description: This function add two 16 bit numbers and return the 16bit
* result. If the result overflow 16 bits, the output will be saturated to
* 16bits.
*/
s16 qm_add16(s16 op1, s16 op2)
{
s16 result;
......@@ -78,9 +82,10 @@ s16 qm_add16(s16 op1, s16 op2)
}
/*
Description: This function make 16 bit subtraction and return the 16bit result.
If the result overflow 16 bits, the output will be saturated to 16bits.
*/
* Description: This function make 16 bit subtraction and return the 16bit
* result. If the result overflow 16 bits, the output will be saturated to
* 16bits.
*/
s16 qm_sub16(s16 op1, s16 op2)
{
s16 result;
......@@ -96,10 +101,11 @@ s16 qm_sub16(s16 op1, s16 op2)
}
/*
Description: This function make a 32 bit saturated left shift when the specified shift
is +ve. This function will make a 32 bit right shift when the specified shift is -ve.
This function return the result after shifting operation.
*/
* Description: This function make a 32 bit saturated left shift when the
* specified shift is +ve. This function will make a 32 bit right shift when
* the specified shift is -ve. This function return the result after shifting
* operation.
*/
s32 qm_shl32(s32 op, int shift)
{
int i;
......@@ -120,10 +126,11 @@ s32 qm_shl32(s32 op, int shift)
}
/*
Description: This function make a 16 bit saturated left shift when the specified shift
is +ve. This function will make a 16 bit right shift when the specified shift is -ve.
This function return the result after shifting operation.
*/
* Description: This function make a 16 bit saturated left shift when the
* specified shift is +ve. This function will make a 16 bit right shift when
* the specified shift is -ve. This function return the result after shifting
* operation.
*/
s16 qm_shl16(s16 op, int shift)
{
int i;
......@@ -144,19 +151,19 @@ s16 qm_shl16(s16 op, int shift)
}
/*
Description: This function make a 16 bit right shift when shift is +ve.
This function make a 16 bit saturated left shift when shift is -ve. This function
return the result of the shift operation.
*/
* Description: This function make a 16 bit right shift when shift is +ve.
* This function make a 16 bit saturated left shift when shift is -ve. This
* function return the result of the shift operation.
*/
s16 qm_shr16(s16 op, int shift)
{
return qm_shl16(op, -shift);
}
/*
Description: This function return the number of redundant sign bits in a 32 bit number.
Example: qm_norm32(0x00000080) = 23
*/
* Description: This function return the number of redundant sign bits in a
* 32 bit number. Example: qm_norm32(0x00000080) = 23
*/
s16 qm_norm32(s32 op)
{
u16 u16extraSignBits;
......@@ -208,28 +215,30 @@ static const s16 log_table[] = {
32024
};
#define LOG_TABLE_SIZE 32 /* log_table size */
#define LOG2_LOG_TABLE_SIZE 5 /* log2(log_table size) */
#define Q_LOG_TABLE 15 /* qformat of log_table */
#define LOG10_2 19728 /* log10(2) in q.16 */
#define LOG_TABLE_SIZE 32 /* log_table size */
#define LOG2_LOG_TABLE_SIZE 5 /* log2(log_table size) */
#define Q_LOG_TABLE 15 /* qformat of log_table */
#define LOG10_2 19728 /* log10(2) in q.16 */
/*
Description:
This routine takes the input number N and its q format qN and compute
the log10(N). This routine first normalizes the input no N. Then N is in mag*(2^x) format.
mag is any number in the range 2^30-(2^31 - 1). Then log2(mag * 2^x) = log2(mag) + x is computed.
From that log10(mag * 2^x) = log2(mag * 2^x) * log10(2) is computed.
This routine looks the log2 value in the table considering LOG2_LOG_TABLE_SIZE+1 MSBs.
As the MSB is always 1, only next LOG2_OF_LOG_TABLE_SIZE MSBs are used for table lookup.
Next 16 MSBs are used for interpolation.
Inputs:
N - number to which log10 has to be found.
qN - q format of N
log10N - address where log10(N) will be written.
qLog10N - address where log10N qformat will be written.
Note/Problem:
For accurate results input should be in normalized or near normalized form.
*/
* Description:
* This routine takes the input number N and its q format qN and compute
* the log10(N). This routine first normalizes the input no N. Then N is in
* mag*(2^x) format. mag is any number in the range 2^30-(2^31 - 1).
* Then log2(mag * 2^x) = log2(mag) + x is computed. From that
* log10(mag * 2^x) = log2(mag * 2^x) * log10(2) is computed.
* This routine looks the log2 value in the table considering
* LOG2_LOG_TABLE_SIZE+1 MSBs. As the MSB is always 1, only next
* LOG2_OF_LOG_TABLE_SIZE MSBs are used for table lookup. Next 16 MSBs are used
* for interpolation.
* Inputs:
* N - number to which log10 has to be found.
* qN - q format of N
* log10N - address where log10(N) will be written.
* qLog10N - address where log10N qformat will be written.
* Note/Problem:
* For accurate results input should be in normalized or near normalized form.
*/
void qm_log10(s32 N, s16 qN, s16 *log10N, s16 *qLog10N)
{
s16 s16norm, s16tableIndex, s16errorApproximation;
......@@ -248,12 +257,13 @@ void qm_log10(s32 N, s16 qN, s16 *log10N, s16 *qLog10N)
*/
qN = qN + s16norm - 30;
/* take the table index as the LOG2_OF_LOG_TABLE_SIZE bits right of the MSB */
/* take the table index as the LOG2_OF_LOG_TABLE_SIZE bits right of the
* MSB */
s16tableIndex = (s16) (N >> (32 - (2 + LOG2_LOG_TABLE_SIZE)));
/* remove the MSB. the MSB is always 1 after normalization. */
s16tableIndex =
s16tableIndex & (s16) ((1 << LOG2_LOG_TABLE_SIZE) - 1);
s16tableIndex & (s16) ((1 << LOG2_LOG_TABLE_SIZE) - 1);
/* remove the (1+LOG2_OF_LOG_TABLE_SIZE) MSBs in the N. */
N = N & ((1 << (32 - (2 + LOG2_LOG_TABLE_SIZE))) - 1);
......@@ -263,23 +273,27 @@ void qm_log10(s32 N, s16 qN, s16 *log10N, s16 *qLog10N)
u16offset = (u16) (N >> (32 - (2 + LOG2_LOG_TABLE_SIZE + 16)));
/* look the log value in the table. */
s32log = log_table[s16tableIndex]; /* q.15 format */
s32log = log_table[s16tableIndex]; /* q.15 format */
/* interpolate using the offset. */
s16errorApproximation = (s16) qm_mulu16(u16offset, (u16) (log_table[s16tableIndex + 1] - log_table[s16tableIndex])); /* q.15 */
/* interpolate using the offset. q.15 format. */
s16errorApproximation = (s16) qm_mulu16(u16offset,
(u16) (log_table[s16tableIndex + 1] -
log_table[s16tableIndex]));
s32log = qm_add16((s16) s32log, s16errorApproximation); /* q.15 format */
/* q.15 format */
s32log = qm_add16((s16) s32log, s16errorApproximation);
/* adjust for the qformat of the N as
* log2(mag * 2^x) = log2(mag) + x
*/
s32log = qm_add32(s32log, ((s32) -qN) << 15); /* q.15 format */
s32log = qm_add32(s32log, ((s32) -qN) << 15); /* q.15 format */
/* normalize the result. */
s16norm = qm_norm32(s32log);
/* bring all the important bits into lower 16 bits */
s32log = qm_shl32(s32log, s16norm - 16); /* q.15+s16norm-16 format */
/* q.15+s16norm-16 format */
s32log = qm_shl32(s32log, s16norm - 16);
/* compute the log10(N) by multiplying log2(N) with log10(2).
* as log10(mag * 2^x) = log2(mag * 2^x) * log10(2)
......
drivers/staging/brcm80211/brcmsmac/phy/phytbl_lcn.c
View file @ 7b4d189f
......@@ -2834,26 +2834,26 @@ const struct phytbl_info dot11lcnphytbl_info_rev0[] = {
const struct phytbl_info dot11lcn_sw_ctrl_tbl_info_4313 = {
&dot11lcn_sw_ctrl_tbl_4313_rev0,
sizeof(dot11lcn_sw_ctrl_tbl_4313_rev0) /
sizeof(dot11lcn_sw_ctrl_tbl_4313_rev0[0]), 15, 0, 16
sizeof(dot11lcn_sw_ctrl_tbl_4313_rev0) /
sizeof(dot11lcn_sw_ctrl_tbl_4313_rev0[0]), 15, 0, 16
};
const struct phytbl_info dot11lcn_sw_ctrl_tbl_info_4313_epa = {
&dot11lcn_sw_ctrl_tbl_4313_epa_rev0,
sizeof(dot11lcn_sw_ctrl_tbl_4313_epa_rev0) /
sizeof(dot11lcn_sw_ctrl_tbl_4313_epa_rev0[0]), 15, 0, 16
sizeof(dot11lcn_sw_ctrl_tbl_4313_epa_rev0) /
sizeof(dot11lcn_sw_ctrl_tbl_4313_epa_rev0[0]), 15, 0, 16
};
const struct phytbl_info dot11lcn_sw_ctrl_tbl_info_4313_bt_epa = {
&dot11lcn_sw_ctrl_tbl_4313_epa_rev0_combo,
sizeof(dot11lcn_sw_ctrl_tbl_4313_epa_rev0_combo) /
sizeof(dot11lcn_sw_ctrl_tbl_4313_epa_rev0_combo[0]), 15, 0, 16
sizeof(dot11lcn_sw_ctrl_tbl_4313_epa_rev0_combo) /
sizeof(dot11lcn_sw_ctrl_tbl_4313_epa_rev0_combo[0]), 15, 0, 16
};
const struct phytbl_info dot11lcn_sw_ctrl_tbl_info_4313_bt_epa_p250 = {
&dot11lcn_sw_ctrl_tbl_4313_bt_epa_p250_rev0,
sizeof(dot11lcn_sw_ctrl_tbl_4313_bt_epa_p250_rev0) /
sizeof(dot11lcn_sw_ctrl_tbl_4313_bt_epa_p250_rev0[0]), 15, 0, 16
sizeof(dot11lcn_sw_ctrl_tbl_4313_bt_epa_p250_rev0) /
sizeof(dot11lcn_sw_ctrl_tbl_4313_bt_epa_p250_rev0[0]), 15, 0, 16
};
const u32 dot11lcnphytbl_info_sz_rev0 =
......@@ -2861,778 +2861,394 @@ const u32 dot11lcnphytbl_info_sz_rev0 =
const struct lcnphy_tx_gain_tbl_entry
dot11lcnphy_2GHz_extPA_gaintable_rev0[128] = {
{3, 0, 31, 0, 72,}
,
{3, 0, 31, 0, 70,}
,
{3, 0, 31, 0, 68,}
,
{3, 0, 30, 0, 67,}
,
{3, 0, 29, 0, 68,}
,
{3, 0, 28, 0, 68,}
,
{3, 0, 27, 0, 69,}
,
{3, 0, 26, 0, 70,}
,
{3, 0, 25, 0, 70,}
,
{3, 0, 24, 0, 71,}
,
{3, 0, 23, 0, 72,}
,
{3, 0, 23, 0, 70,}
,
{3, 0, 22, 0, 71,}
,
{3, 0, 21, 0, 72,}
,
{3, 0, 21, 0, 70,}
,
{3, 0, 21, 0, 68,}
,
{3, 0, 21, 0, 66,}
,
{3, 0, 21, 0, 64,}
,
{3, 0, 21, 0, 63,}
,
{3, 0, 20, 0, 64,}
,
{3, 0, 19, 0, 65,}
,
{3, 0, 19, 0, 64,}
,
{3, 0, 18, 0, 65,}
,
{3, 0, 18, 0, 64,}
,
{3, 0, 17, 0, 65,}
,
{3, 0, 17, 0, 64,}
,
{3, 0, 16, 0, 65,}
,
{3, 0, 16, 0, 64,}
,
{3, 0, 16, 0, 62,}
,
{3, 0, 16, 0, 60,}
,
{3, 0, 16, 0, 58,}
,
{3, 0, 15, 0, 61,}
,
{3, 0, 15, 0, 59,}
,
{3, 0, 14, 0, 61,}
,
{3, 0, 14, 0, 60,}
,
{3, 0, 14, 0, 58,}
,
{3, 0, 13, 0, 60,}
,
{3, 0, 13, 0, 59,}
,
{3, 0, 12, 0, 62,}
,
{3, 0, 12, 0, 60,}
,
{3, 0, 12, 0, 58,}
,
{3, 0, 11, 0, 62,}
,
{3, 0, 11, 0, 60,}
,
{3, 0, 11, 0, 59,}
,
{3, 0, 11, 0, 57,}
,
{3, 0, 10, 0, 61,}
,
{3, 0, 10, 0, 59,}
,
{3, 0, 10, 0, 57,}
,
{3, 0, 9, 0, 62,}
,
{3, 0, 9, 0, 60,}
,
{3, 0, 9, 0, 58,}
,
{3, 0, 9, 0, 57,}
,
{3, 0, 8, 0, 62,}
,
{3, 0, 8, 0, 60,}
,
{3, 0, 8, 0, 58,}
,
{3, 0, 8, 0, 57,}
,
{3, 0, 8, 0, 55,}
,
{3, 0, 7, 0, 61,}
,
{3, 0, 7, 0, 60,}
,
{3, 0, 7, 0, 58,}
,
{3, 0, 7, 0, 56,}
,
{3, 0, 7, 0, 55,}
,
{3, 0, 6, 0, 62,}
,
{3, 0, 6, 0, 60,}
,
{3, 0, 6, 0, 58,}
,
{3, 0, 6, 0, 57,}
,
{3, 0, 6, 0, 55,}
,
{3, 0, 6, 0, 54,}
,
{3, 0, 6, 0, 52,}
,
{3, 0, 5, 0, 61,}
,
{3, 0, 5, 0, 59,}
,
{3, 0, 5, 0, 57,}
,
{3, 0, 5, 0, 56,}
,
{3, 0, 5, 0, 54,}
,
{3, 0, 5, 0, 53,}
,
{3, 0, 5, 0, 51,}
,
{3, 0, 4, 0, 62,}
,
{3, 0, 4, 0, 60,}
,
{3, 0, 4, 0, 58,}
,
{3, 0, 4, 0, 57,}
,
{3, 0, 4, 0, 55,}
,
{3, 0, 4, 0, 54,}
,
{3, 0, 4, 0, 52,}
,
{3, 0, 4, 0, 51,}
,
{3, 0, 4, 0, 49,}
,
{3, 0, 4, 0, 48,}
,
{3, 0, 4, 0, 46,}
,
{3, 0, 3, 0, 60,}
,
{3, 0, 3, 0, 58,}
,
{3, 0, 3, 0, 57,}
,
{3, 0, 3, 0, 55,}
,
{3, 0, 3, 0, 54,}
,
{3, 0, 3, 0, 52,}
,
{3, 0, 3, 0, 51,}
,
{3, 0, 3, 0, 49,}
,
{3, 0, 3, 0, 48,}
,
{3, 0, 3, 0, 46,}
,
{3, 0, 3, 0, 45,}
,
{3, 0, 3, 0, 44,}
,
{3, 0, 3, 0, 43,}
,
{3, 0, 3, 0, 41,}
,
{3, 0, 2, 0, 61,}
,
{3, 0, 2, 0, 59,}
,
{3, 0, 2, 0, 57,}
,
{3, 0, 2, 0, 56,}
,
{3, 0, 2, 0, 54,}
,
{3, 0, 2, 0, 53,}
,
{3, 0, 2, 0, 51,}
,
{3, 0, 2, 0, 50,}
,
{3, 0, 2, 0, 48,}
,
{3, 0, 2, 0, 47,}
,
{3, 0, 2, 0, 46,}
,
{3, 0, 2, 0, 44,}
,
{3, 0, 2, 0, 43,}
,
{3, 0, 2, 0, 42,}
,
{3, 0, 2, 0, 41,}
,
{3, 0, 2, 0, 39,}
,
{3, 0, 2, 0, 38,}
,
{3, 0, 2, 0, 37,}
,
{3, 0, 2, 0, 36,}
,
{3, 0, 2, 0, 35,}
,
{3, 0, 2, 0, 34,}
,
{3, 0, 2, 0, 33,}
,
{3, 0, 2, 0, 32,}
,
{3, 0, 1, 0, 63,}
,
{3, 0, 1, 0, 61,}
,
{3, 0, 1, 0, 59,}
,
{3, 0, 1, 0, 57,}
,
{3, 0, 31, 0, 72},
{3, 0, 31, 0, 70},
{3, 0, 31, 0, 68},
{3, 0, 30, 0, 67},
{3, 0, 29, 0, 68},
{3, 0, 28, 0, 68},
{3, 0, 27, 0, 69},
{3, 0, 26, 0, 70},
{3, 0, 25, 0, 70},
{3, 0, 24, 0, 71},
{3, 0, 23, 0, 72},
{3, 0, 23, 0, 70},
{3, 0, 22, 0, 71},
{3, 0, 21, 0, 72},
{3, 0, 21, 0, 70},
{3, 0, 21, 0, 68},
{3, 0, 21, 0, 66},
{3, 0, 21, 0, 64},
{3, 0, 21, 0, 63},
{3, 0, 20, 0, 64},
{3, 0, 19, 0, 65},
{3, 0, 19, 0, 64},
{3, 0, 18, 0, 65},
{3, 0, 18, 0, 64},
{3, 0, 17, 0, 65},
{3, 0, 17, 0, 64},
{3, 0, 16, 0, 65},
{3, 0, 16, 0, 64},
{3, 0, 16, 0, 62},
{3, 0, 16, 0, 60},
{3, 0, 16, 0, 58},
{3, 0, 15, 0, 61},
{3, 0, 15, 0, 59},
{3, 0, 14, 0, 61},
{3, 0, 14, 0, 60},
{3, 0, 14, 0, 58},
{3, 0, 13, 0, 60},
{3, 0, 13, 0, 59},
{3, 0, 12, 0, 62},
{3, 0, 12, 0, 60},
{3, 0, 12, 0, 58},
{3, 0, 11, 0, 62},
{3, 0, 11, 0, 60},
{3, 0, 11, 0, 59},
{3, 0, 11, 0, 57},
{3, 0, 10, 0, 61},
{3, 0, 10, 0, 59},
{3, 0, 10, 0, 57},
{3, 0, 9, 0, 62},
{3, 0, 9, 0, 60},
{3, 0, 9, 0, 58},
{3, 0, 9, 0, 57},
{3, 0, 8, 0, 62},
{3, 0, 8, 0, 60},
{3, 0, 8, 0, 58},
{3, 0, 8, 0, 57},
{3, 0, 8, 0, 55},
{3, 0, 7, 0, 61},
{3, 0, 7, 0, 60},
{3, 0, 7, 0, 58},
{3, 0, 7, 0, 56},
{3, 0, 7, 0, 55},
{3, 0, 6, 0, 62},
{3, 0, 6, 0, 60},
{3, 0, 6, 0, 58},
{3, 0, 6, 0, 57},
{3, 0, 6, 0, 55},
{3, 0, 6, 0, 54},
{3, 0, 6, 0, 52},
{3, 0, 5, 0, 61},
{3, 0, 5, 0, 59},
{3, 0, 5, 0, 57},
{3, 0, 5, 0, 56},
{3, 0, 5, 0, 54},
{3, 0, 5, 0, 53},
{3, 0, 5, 0, 51},
{3, 0, 4, 0, 62},
{3, 0, 4, 0, 60},
{3, 0, 4, 0, 58},
{3, 0, 4, 0, 57},
{3, 0, 4, 0, 55},
{3, 0, 4, 0, 54},
{3, 0, 4, 0, 52},
{3, 0, 4, 0, 51},
{3, 0, 4, 0, 49},
{3, 0, 4, 0, 48},
{3, 0, 4, 0, 46},
{3, 0, 3, 0, 60},
{3, 0, 3, 0, 58},
{3, 0, 3, 0, 57},
{3, 0, 3, 0, 55},
{3, 0, 3, 0, 54},
{3, 0, 3, 0, 52},
{3, 0, 3, 0, 51},
{3, 0, 3, 0, 49},
{3, 0, 3, 0, 48},
{3, 0, 3, 0, 46},
{3, 0, 3, 0, 45},
{3, 0, 3, 0, 44},
{3, 0, 3, 0, 43},
{3, 0, 3, 0, 41},
{3, 0, 2, 0, 61},
{3, 0, 2, 0, 59},
{3, 0, 2, 0, 57},
{3, 0, 2, 0, 56},
{3, 0, 2, 0, 54},
{3, 0, 2, 0, 53},
{3, 0, 2, 0, 51},
{3, 0, 2, 0, 50},
{3, 0, 2, 0, 48},
{3, 0, 2, 0, 47},
{3, 0, 2, 0, 46},
{3, 0, 2, 0, 44},
{3, 0, 2, 0, 43},
{3, 0, 2, 0, 42},
{3, 0, 2, 0, 41},
{3, 0, 2, 0, 39},
{3, 0, 2, 0, 38},
{3, 0, 2, 0, 37},
{3, 0, 2, 0, 36},
{3, 0, 2, 0, 35},
{3, 0, 2, 0, 34},
{3, 0, 2, 0, 33},
{3, 0, 2, 0, 32},
{3, 0, 1, 0, 63},
{3, 0, 1, 0, 61},
{3, 0, 1, 0, 59},
{3, 0, 1, 0, 57},
};
const struct lcnphy_tx_gain_tbl_entry dot11lcnphy_2GHz_gaintable_rev0[128] = {
{7, 0, 31, 0, 72,}
,
{7, 0, 31, 0, 70,}
,
{7, 0, 31, 0, 68,}
,
{7, 0, 30, 0, 67,}
,
{7, 0, 29, 0, 68,}
,
{7, 0, 28, 0, 68,}
,
{7, 0, 27, 0, 69,}
,
{7, 0, 26, 0, 70,}
,
{7, 0, 25, 0, 70,}
,
{7, 0, 24, 0, 71,}
,
{7, 0, 23, 0, 72,}
,
{7, 0, 23, 0, 70,}
,
{7, 0, 22, 0, 71,}
,
{7, 0, 21, 0, 72,}
,
{7, 0, 21, 0, 70,}
,
{7, 0, 21, 0, 68,}
,
{7, 0, 21, 0, 66,}
,
{7, 0, 21, 0, 64,}
,
{7, 0, 21, 0, 63,}
,
{7, 0, 20, 0, 64,}
,
{7, 0, 19, 0, 65,}
,
{7, 0, 19, 0, 64,}
,
{7, 0, 18, 0, 65,}
,
{7, 0, 18, 0, 64,}
,
{7, 0, 17, 0, 65,}
,
{7, 0, 17, 0, 64,}
,
{7, 0, 16, 0, 65,}
,
{7, 0, 16, 0, 64,}
,
{7, 0, 16, 0, 62,}
,
{7, 0, 16, 0, 60,}
,
{7, 0, 16, 0, 58,}
,
{7, 0, 15, 0, 61,}
,
{7, 0, 15, 0, 59,}
,
{7, 0, 14, 0, 61,}
,
{7, 0, 14, 0, 60,}
,
{7, 0, 14, 0, 58,}
,
{7, 0, 13, 0, 60,}
,
{7, 0, 13, 0, 59,}
,
{7, 0, 12, 0, 62,}
,
{7, 0, 12, 0, 60,}
,
{7, 0, 12, 0, 58,}
,
{7, 0, 11, 0, 62,}
,
{7, 0, 11, 0, 60,}
,
{7, 0, 11, 0, 59,}
,
{7, 0, 11, 0, 57,}
,
{7, 0, 10, 0, 61,}
,
{7, 0, 10, 0, 59,}
,
{7, 0, 10, 0, 57,}
,
{7, 0, 9, 0, 62,}
,
{7, 0, 9, 0, 60,}
,
{7, 0, 9, 0, 58,}
,
{7, 0, 9, 0, 57,}
,
{7, 0, 8, 0, 62,}
,
{7, 0, 8, 0, 60,}
,
{7, 0, 8, 0, 58,}
,
{7, 0, 8, 0, 57,}
,
{7, 0, 8, 0, 55,}
,
{7, 0, 7, 0, 61,}
,
{7, 0, 7, 0, 60,}
,
{7, 0, 7, 0, 58,}
,
{7, 0, 7, 0, 56,}
,
{7, 0, 7, 0, 55,}
,
{7, 0, 6, 0, 62,}
,
{7, 0, 6, 0, 60,}
,
{7, 0, 6, 0, 58,}
,
{7, 0, 6, 0, 57,}
,
{7, 0, 6, 0, 55,}
,
{7, 0, 6, 0, 54,}
,
{7, 0, 6, 0, 52,}
,
{7, 0, 5, 0, 61,}
,
{7, 0, 5, 0, 59,}
,
{7, 0, 5, 0, 57,}
,
{7, 0, 5, 0, 56,}
,
{7, 0, 5, 0, 54,}
,
{7, 0, 5, 0, 53,}
,
{7, 0, 5, 0, 51,}
,
{7, 0, 4, 0, 62,}
,
{7, 0, 4, 0, 60,}
,
{7, 0, 4, 0, 58,}
,
{7, 0, 4, 0, 57,}
,
{7, 0, 4, 0, 55,}
,
{7, 0, 4, 0, 54,}
,
{7, 0, 4, 0, 52,}
,
{7, 0, 4, 0, 51,}
,
{7, 0, 4, 0, 49,}
,
{7, 0, 4, 0, 48,}
,
{7, 0, 4, 0, 46,}
,
{7, 0, 3, 0, 60,}
,
{7, 0, 3, 0, 58,}
,
{7, 0, 3, 0, 57,}
,
{7, 0, 3, 0, 55,}
,
{7, 0, 3, 0, 54,}
,
{7, 0, 3, 0, 52,}
,
{7, 0, 3, 0, 51,}
,
{7, 0, 3, 0, 49,}
,
{7, 0, 3, 0, 48,}
,
{7, 0, 3, 0, 46,}
,
{7, 0, 3, 0, 45,}
,
{7, 0, 3, 0, 44,}
,
{7, 0, 3, 0, 43,}
,
{7, 0, 3, 0, 41,}
,
{7, 0, 2, 0, 61,}
,
{7, 0, 2, 0, 59,}
,
{7, 0, 2, 0, 57,}
,
{7, 0, 2, 0, 56,}
,
{7, 0, 2, 0, 54,}
,
{7, 0, 2, 0, 53,}
,
{7, 0, 2, 0, 51,}
,
{7, 0, 2, 0, 50,}
,
{7, 0, 2, 0, 48,}
,
{7, 0, 2, 0, 47,}
,
{7, 0, 2, 0, 46,}
,
{7, 0, 2, 0, 44,}
,
{7, 0, 2, 0, 43,}
,
{7, 0, 2, 0, 42,}
,
{7, 0, 2, 0, 41,}
,
{7, 0, 2, 0, 39,}
,
{7, 0, 2, 0, 38,}
,
{7, 0, 2, 0, 37,}
,
{7, 0, 2, 0, 36,}
,
{7, 0, 2, 0, 35,}
,
{7, 0, 2, 0, 34,}
,
{7, 0, 2, 0, 33,}
,
{7, 0, 2, 0, 32,}
,
{7, 0, 1, 0, 63,}
,
{7, 0, 1, 0, 61,}
,
{7, 0, 1, 0, 59,}
,
{7, 0, 1, 0, 57,}
,
{7, 0, 31, 0, 72},
{7, 0, 31, 0, 70},
{7, 0, 31, 0, 68},
{7, 0, 30, 0, 67},
{7, 0, 29, 0, 68},
{7, 0, 28, 0, 68},
{7, 0, 27, 0, 69},
{7, 0, 26, 0, 70},
{7, 0, 25, 0, 70},
{7, 0, 24, 0, 71},
{7, 0, 23, 0, 72},
{7, 0, 23, 0, 70},
{7, 0, 22, 0, 71},
{7, 0, 21, 0, 72},
{7, 0, 21, 0, 70},
{7, 0, 21, 0, 68},
{7, 0, 21, 0, 66},
{7, 0, 21, 0, 64},
{7, 0, 21, 0, 63},
{7, 0, 20, 0, 64},
{7, 0, 19, 0, 65},
{7, 0, 19, 0, 64},
{7, 0, 18, 0, 65},
{7, 0, 18, 0, 64},
{7, 0, 17, 0, 65},
{7, 0, 17, 0, 64},
{7, 0, 16, 0, 65},
{7, 0, 16, 0, 64},
{7, 0, 16, 0, 62},
{7, 0, 16, 0, 60},
{7, 0, 16, 0, 58},
{7, 0, 15, 0, 61},
{7, 0, 15, 0, 59},
{7, 0, 14, 0, 61},
{7, 0, 14, 0, 60},
{7, 0, 14, 0, 58},
{7, 0, 13, 0, 60},
{7, 0, 13, 0, 59},
{7, 0, 12, 0, 62},
{7, 0, 12, 0, 60},
{7, 0, 12, 0, 58},
{7, 0, 11, 0, 62},
{7, 0, 11, 0, 60},
{7, 0, 11, 0, 59},
{7, 0, 11, 0, 57},
{7, 0, 10, 0, 61},
{7, 0, 10, 0, 59},
{7, 0, 10, 0, 57},
{7, 0, 9, 0, 62},
{7, 0, 9, 0, 60},
{7, 0, 9, 0, 58},
{7, 0, 9, 0, 57},
{7, 0, 8, 0, 62},
{7, 0, 8, 0, 60},
{7, 0, 8, 0, 58},
{7, 0, 8, 0, 57},
{7, 0, 8, 0, 55},
{7, 0, 7, 0, 61},
{7, 0, 7, 0, 60},
{7, 0, 7, 0, 58},
{7, 0, 7, 0, 56},
{7, 0, 7, 0, 55},
{7, 0, 6, 0, 62},
{7, 0, 6, 0, 60},
{7, 0, 6, 0, 58},
{7, 0, 6, 0, 57},
{7, 0, 6, 0, 55},
{7, 0, 6, 0, 54},
{7, 0, 6, 0, 52},
{7, 0, 5, 0, 61},
{7, 0, 5, 0, 59},
{7, 0, 5, 0, 57},
{7, 0, 5, 0, 56},
{7, 0, 5, 0, 54},
{7, 0, 5, 0, 53},
{7, 0, 5, 0, 51},
{7, 0, 4, 0, 62},
{7, 0, 4, 0, 60},
{7, 0, 4, 0, 58},
{7, 0, 4, 0, 57},
{7, 0, 4, 0, 55},
{7, 0, 4, 0, 54},
{7, 0, 4, 0, 52},
{7, 0, 4, 0, 51},
{7, 0, 4, 0, 49},
{7, 0, 4, 0, 48},
{7, 0, 4, 0, 46},
{7, 0, 3, 0, 60},
{7, 0, 3, 0, 58},
{7, 0, 3, 0, 57},
{7, 0, 3, 0, 55},
{7, 0, 3, 0, 54},
{7, 0, 3, 0, 52},
{7, 0, 3, 0, 51},
{7, 0, 3, 0, 49},
{7, 0, 3, 0, 48},
{7, 0, 3, 0, 46},
{7, 0, 3, 0, 45},
{7, 0, 3, 0, 44},
{7, 0, 3, 0, 43},
{7, 0, 3, 0, 41},
{7, 0, 2, 0, 61},
{7, 0, 2, 0, 59},
{7, 0, 2, 0, 57},
{7, 0, 2, 0, 56},
{7, 0, 2, 0, 54},
{7, 0, 2, 0, 53},
{7, 0, 2, 0, 51},
{7, 0, 2, 0, 50},
{7, 0, 2, 0, 48},
{7, 0, 2, 0, 47},
{7, 0, 2, 0, 46},
{7, 0, 2, 0, 44},
{7, 0, 2, 0, 43},
{7, 0, 2, 0, 42},
{7, 0, 2, 0, 41},
{7, 0, 2, 0, 39},
{7, 0, 2, 0, 38},
{7, 0, 2, 0, 37},
{7, 0, 2, 0, 36},
{7, 0, 2, 0, 35},
{7, 0, 2, 0, 34},
{7, 0, 2, 0, 33},
{7, 0, 2, 0, 32},
{7, 0, 1, 0, 63},
{7, 0, 1, 0, 61},
{7, 0, 1, 0, 59},
{7, 0, 1, 0, 57},
};
const struct lcnphy_tx_gain_tbl_entry dot11lcnphy_5GHz_gaintable_rev0[128] = {
{255, 255, 0xf0, 0, 152,}
,
{255, 255, 0xf0, 0, 147,}
,
{255, 255, 0xf0, 0, 143,}
,
{255, 255, 0xf0, 0, 139,}
,
{255, 255, 0xf0, 0, 135,}
,
{255, 255, 0xf0, 0, 131,}
,
{255, 255, 0xf0, 0, 128,}
,
{255, 255, 0xf0, 0, 124,}
,
{255, 255, 0xf0, 0, 121,}
,
{255, 255, 0xf0, 0, 117,}
,
{255, 255, 0xf0, 0, 114,}
,
{255, 255, 0xf0, 0, 111,}
,
{255, 255, 0xf0, 0, 107,}
,
{255, 255, 0xf0, 0, 104,}
,
{255, 255, 0xf0, 0, 101,}
,
{255, 255, 0xf0, 0, 99,}
,
{255, 255, 0xf0, 0, 96,}
,
{255, 255, 0xf0, 0, 93,}
,
{255, 255, 0xf0, 0, 90,}
,
{255, 255, 0xf0, 0, 88,}
,
{255, 255, 0xf0, 0, 85,}
,
{255, 255, 0xf0, 0, 83,}
,
{255, 255, 0xf0, 0, 81,}
,
{255, 255, 0xf0, 0, 78,}
,
{255, 255, 0xf0, 0, 76,}
,
{255, 255, 0xf0, 0, 74,}
,
{255, 255, 0xf0, 0, 72,}
,
{255, 255, 0xf0, 0, 70,}
,
{255, 255, 0xf0, 0, 68,}
,
{255, 255, 0xf0, 0, 66,}
,
{255, 255, 0xf0, 0, 64,}
,
{255, 248, 0xf0, 0, 64,}
,
{255, 241, 0xf0, 0, 64,}
,
{255, 251, 0xe0, 0, 64,}
,
{255, 244, 0xe0, 0, 64,}
,
{255, 254, 0xd0, 0, 64,}
,
{255, 246, 0xd0, 0, 64,}
,
{255, 239, 0xd0, 0, 64,}
,
{255, 249, 0xc0, 0, 64,}
,
{255, 242, 0xc0, 0, 64,}
,
{255, 255, 0xb0, 0, 64,}
,
{255, 248, 0xb0, 0, 64,}
,
{255, 241, 0xb0, 0, 64,}
,
{255, 254, 0xa0, 0, 64,}
,
{255, 246, 0xa0, 0, 64,}
,
{255, 239, 0xa0, 0, 64,}
,
{255, 255, 0x90, 0, 64,}
,
{255, 248, 0x90, 0, 64,}
,
{255, 241, 0x90, 0, 64,}
,
{255, 234, 0x90, 0, 64,}
,
{255, 255, 0x80, 0, 64,}
,
{255, 248, 0x80, 0, 64,}
,
{255, 241, 0x80, 0, 64,}
,
{255, 234, 0x80, 0, 64,}
,
{255, 255, 0x70, 0, 64,}
,
{255, 248, 0x70, 0, 64,}
,
{255, 241, 0x70, 0, 64,}
,
{255, 234, 0x70, 0, 64,}
,
{255, 227, 0x70, 0, 64,}
,
{255, 221, 0x70, 0, 64,}
,
{255, 215, 0x70, 0, 64,}
,
{255, 208, 0x70, 0, 64,}
,
{255, 203, 0x70, 0, 64,}
,
{255, 197, 0x70, 0, 64,}
,
{255, 255, 0x60, 0, 64,}
,
{255, 248, 0x60, 0, 64,}
,
{255, 241, 0x60, 0, 64,}
,
{255, 234, 0x60, 0, 64,}
,
{255, 227, 0x60, 0, 64,}
,
{255, 221, 0x60, 0, 64,}
,
{255, 255, 0x50, 0, 64,}
,
{255, 248, 0x50, 0, 64,}
,
{255, 241, 0x50, 0, 64,}
,
{255, 234, 0x50, 0, 64,}
,
{255, 227, 0x50, 0, 64,}
,
{255, 221, 0x50, 0, 64,}
,
{255, 215, 0x50, 0, 64,}
,
{255, 208, 0x50, 0, 64,}
,
{255, 255, 0x40, 0, 64,}
,
{255, 248, 0x40, 0, 64,}
,
{255, 241, 0x40, 0, 64,}
,
{255, 234, 0x40, 0, 64,}
,
{255, 227, 0x40, 0, 64,}
,
{255, 221, 0x40, 0, 64,}
,
{255, 215, 0x40, 0, 64,}
,
{255, 208, 0x40, 0, 64,}
,
{255, 203, 0x40, 0, 64,}
,
{255, 197, 0x40, 0, 64,}
,
{255, 255, 0x30, 0, 64,}
,
{255, 248, 0x30, 0, 64,}
,
{255, 241, 0x30, 0, 64,}
,
{255, 234, 0x30, 0, 64,}
,
{255, 227, 0x30, 0, 64,}
,
{255, 221, 0x30, 0, 64,}
,
{255, 215, 0x30, 0, 64,}
,
{255, 208, 0x30, 0, 64,}
,
{255, 203, 0x30, 0, 64,}
,
{255, 197, 0x30, 0, 64,}
,
{255, 191, 0x30, 0, 64,}
,
{255, 186, 0x30, 0, 64,}
,
{255, 181, 0x30, 0, 64,}
,
{255, 175, 0x30, 0, 64,}
,
{255, 255, 0x20, 0, 64,}
,
{255, 248, 0x20, 0, 64,}
,
{255, 241, 0x20, 0, 64,}
,
{255, 234, 0x20, 0, 64,}
,
{255, 227, 0x20, 0, 64,}
,
{255, 221, 0x20, 0, 64,}
,
{255, 215, 0x20, 0, 64,}
,
{255, 208, 0x20, 0, 64,}
,
{255, 203, 0x20, 0, 64,}
,
{255, 197, 0x20, 0, 64,}
,
{255, 191, 0x20, 0, 64,}
,
{255, 186, 0x20, 0, 64,}
,
{255, 181, 0x20, 0, 64,}
,
{255, 175, 0x20, 0, 64,}
,
{255, 170, 0x20, 0, 64,}
,
{255, 166, 0x20, 0, 64,}
,
{255, 161, 0x20, 0, 64,}
,
{255, 156, 0x20, 0, 64,}
,
{255, 152, 0x20, 0, 64,}
,
{255, 148, 0x20, 0, 64,}
,
{255, 143, 0x20, 0, 64,}
,
{255, 139, 0x20, 0, 64,}
,
{255, 135, 0x20, 0, 64,}
,
{255, 132, 0x20, 0, 64,}
,
{255, 255, 0x10, 0, 64,}
,
{255, 248, 0x10, 0, 64,}
,
{255, 255, 0xf0, 0, 152},
{255, 255, 0xf0, 0, 147},
{255, 255, 0xf0, 0, 143},
{255, 255, 0xf0, 0, 139},
{255, 255, 0xf0, 0, 135},
{255, 255, 0xf0, 0, 131},
{255, 255, 0xf0, 0, 128},
{255, 255, 0xf0, 0, 124},
{255, 255, 0xf0, 0, 121},
{255, 255, 0xf0, 0, 117},
{255, 255, 0xf0, 0, 114},
{255, 255, 0xf0, 0, 111},
{255, 255, 0xf0, 0, 107},
{255, 255, 0xf0, 0, 104},
{255, 255, 0xf0, 0, 101},
{255, 255, 0xf0, 0, 99},
{255, 255, 0xf0, 0, 96},
{255, 255, 0xf0, 0, 93},
{255, 255, 0xf0, 0, 90},
{255, 255, 0xf0, 0, 88},
{255, 255, 0xf0, 0, 85},
{255, 255, 0xf0, 0, 83},
{255, 255, 0xf0, 0, 81},
{255, 255, 0xf0, 0, 78},
{255, 255, 0xf0, 0, 76},
{255, 255, 0xf0, 0, 74},
{255, 255, 0xf0, 0, 72},
{255, 255, 0xf0, 0, 70},
{255, 255, 0xf0, 0, 68},
{255, 255, 0xf0, 0, 66},
{255, 255, 0xf0, 0, 64},
{255, 248, 0xf0, 0, 64},
{255, 241, 0xf0, 0, 64},
{255, 251, 0xe0, 0, 64},
{255, 244, 0xe0, 0, 64},
{255, 254, 0xd0, 0, 64},
{255, 246, 0xd0, 0, 64},
{255, 239, 0xd0, 0, 64},
{255, 249, 0xc0, 0, 64},
{255, 242, 0xc0, 0, 64},
{255, 255, 0xb0, 0, 64},
{255, 248, 0xb0, 0, 64},
{255, 241, 0xb0, 0, 64},
{255, 254, 0xa0, 0, 64},
{255, 246, 0xa0, 0, 64},
{255, 239, 0xa0, 0, 64},
{255, 255, 0x90, 0, 64},
{255, 248, 0x90, 0, 64},
{255, 241, 0x90, 0, 64},
{255, 234, 0x90, 0, 64},
{255, 255, 0x80, 0, 64},
{255, 248, 0x80, 0, 64},
{255, 241, 0x80, 0, 64},
{255, 234, 0x80, 0, 64},
{255, 255, 0x70, 0, 64},
{255, 248, 0x70, 0, 64},
{255, 241, 0x70, 0, 64},
{255, 234, 0x70, 0, 64},
{255, 227, 0x70, 0, 64},
{255, 221, 0x70, 0, 64},
{255, 215, 0x70, 0, 64},
{255, 208, 0x70, 0, 64},
{255, 203, 0x70, 0, 64},
{255, 197, 0x70, 0, 64},
{255, 255, 0x60, 0, 64},
{255, 248, 0x60, 0, 64},
{255, 241, 0x60, 0, 64},
{255, 234, 0x60, 0, 64},
{255, 227, 0x60, 0, 64},
{255, 221, 0x60, 0, 64},
{255, 255, 0x50, 0, 64},
{255, 248, 0x50, 0, 64},
{255, 241, 0x50, 0, 64},
{255, 234, 0x50, 0, 64},
{255, 227, 0x50, 0, 64},
{255, 221, 0x50, 0, 64},
{255, 215, 0x50, 0, 64},
{255, 208, 0x50, 0, 64},
{255, 255, 0x40, 0, 64},
{255, 248, 0x40, 0, 64},
{255, 241, 0x40, 0, 64},
{255, 234, 0x40, 0, 64},
{255, 227, 0x40, 0, 64},
{255, 221, 0x40, 0, 64},
{255, 215, 0x40, 0, 64},
{255, 208, 0x40, 0, 64},
{255, 203, 0x40, 0, 64},
{255, 197, 0x40, 0, 64},
{255, 255, 0x30, 0, 64},
{255, 248, 0x30, 0, 64},
{255, 241, 0x30, 0, 64},
{255, 234, 0x30, 0, 64},
{255, 227, 0x30, 0, 64},
{255, 221, 0x30, 0, 64},
{255, 215, 0x30, 0, 64},
{255, 208, 0x30, 0, 64},
{255, 203, 0x30, 0, 64},
{255, 197, 0x30, 0, 64},
{255, 191, 0x30, 0, 64},
{255, 186, 0x30, 0, 64},
{255, 181, 0x30, 0, 64},
{255, 175, 0x30, 0, 64},
{255, 255, 0x20, 0, 64},
{255, 248, 0x20, 0, 64},
{255, 241, 0x20, 0, 64},
{255, 234, 0x20, 0, 64},
{255, 227, 0x20, 0, 64},
{255, 221, 0x20, 0, 64},
{255, 215, 0x20, 0, 64},
{255, 208, 0x20, 0, 64},
{255, 203, 0x20, 0, 64},
{255, 197, 0x20, 0, 64},
{255, 191, 0x20, 0, 64},
{255, 186, 0x20, 0, 64},
{255, 181, 0x20, 0, 64},
{255, 175, 0x20, 0, 64},
{255, 170, 0x20, 0, 64},
{255, 166, 0x20, 0, 64},
{255, 161, 0x20, 0, 64},
{255, 156, 0x20, 0, 64},
{255, 152, 0x20, 0, 64},
{255, 148, 0x20, 0, 64},
{255, 143, 0x20, 0, 64},
{255, 139, 0x20, 0, 64},
{255, 135, 0x20, 0, 64},
{255, 132, 0x20, 0, 64},
{255, 255, 0x10, 0, 64},
{255, 248, 0x10, 0, 64},
};
drivers/staging/brcm80211/brcmsmac/phy/phytbl_n.c
View file @ 7b4d189f
......@@ -4522,7 +4522,8 @@ const struct phytbl_info mimophytbl_info_rev0[] = {
{&chanest_tbl_rev0,
sizeof(chanest_tbl_rev0) / sizeof(chanest_tbl_rev0[0]), 22, 0, 32}
,
{&mcs_tbl_rev0, sizeof(mcs_tbl_rev0) / sizeof(mcs_tbl_rev0[0]), 18, 0, 8}
{&mcs_tbl_rev0, sizeof(mcs_tbl_rev0) / sizeof(mcs_tbl_rev0[0]), 18, 0,
8}
,
{&noise_var_tbl0_rev0,
sizeof(noise_var_tbl0_rev0) / sizeof(noise_var_tbl0_rev0[0]), 16, 0,
......
drivers/staging/brcm80211/brcmsmac/phy/phytbl_n.h
View file @ 7b4d189f
......@@ -20,21 +20,31 @@
#include "phy_int.h"
extern const struct phytbl_info mimophytbl_info_rev0[],
mimophytbl_info_rev0_volatile[];
extern const u32 mimophytbl_info_sz_rev0, mimophytbl_info_sz_rev0_volatile;
mimophytbl_info_rev0_volatile[];
extern const u32 mimophytbl_info_sz_rev0,
mimophytbl_info_sz_rev0_volatile;
extern const struct phytbl_info mimophytbl_info_rev3[],
mimophytbl_info_rev3_volatile[], mimophytbl_info_rev3_volatile1[],
mimophytbl_info_rev3_volatile2[], mimophytbl_info_rev3_volatile3[];
extern const u32 mimophytbl_info_sz_rev3, mimophytbl_info_sz_rev3_volatile,
mimophytbl_info_sz_rev3_volatile1, mimophytbl_info_sz_rev3_volatile2,
mimophytbl_info_sz_rev3_volatile3;
mimophytbl_info_rev3_volatile[],
mimophytbl_info_rev3_volatile1[],
mimophytbl_info_rev3_volatile2[],
mimophytbl_info_rev3_volatile3[];
extern const u32 mimophytbl_info_sz_rev3,
mimophytbl_info_sz_rev3_volatile,
mimophytbl_info_sz_rev3_volatile1,
mimophytbl_info_sz_rev3_volatile2,
mimophytbl_info_sz_rev3_volatile3;
extern const u32 noise_var_tbl_rev3[];
extern const struct phytbl_info mimophytbl_info_rev7[];
extern const u32 mimophytbl_info_sz_rev7;
extern const u32 noise_var_tbl_rev7[];
extern const struct phytbl_info mimophytbl_info_rev16[];
extern const u32 mimophytbl_info_sz_rev16;
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