diff --git a/arch/alpha/kernel/pci.c b/arch/alpha/kernel/pci.c index 1e3abbb5ca5d0827427b5da0b893c894dbded106..28c6c9d8b7db967afb8ba7858dc99c706f84c4bd 100644 --- a/arch/alpha/kernel/pci.c +++ b/arch/alpha/kernel/pci.c @@ -67,6 +67,7 @@ quirk_isa_bridge(struct pci_dev *dev) { dev->class = PCI_CLASS_BRIDGE_ISA << 8; } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82378, quirk_isa_bridge); static void __init quirk_cypress(struct pci_dev *dev) @@ -100,6 +101,7 @@ quirk_cypress(struct pci_dev *dev) } } } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, quirk_cypress); /* Called for each device after PCI setup is done. */ static void __init @@ -112,17 +114,10 @@ pcibios_fixup_final(struct pci_dev *dev) isa_bridge = dev; } } +DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_final); -struct pci_fixup pcibios_fixups[] __initdata = { - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82378, - quirk_isa_bridge }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, - quirk_cypress }, - { PCI_FIXUP_FINAL, PCI_ANY_ID, PCI_ANY_ID, - pcibios_fixup_final }, - { 0 } -}; - +/* Just declaring that the power-of-ten prefixes are actually the + power-of-two ones doesn't make it true :) */ #define KB 1024 #define MB (1024*KB) #define GB (1024*MB) diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index 927711c48492dab18867bf502594a6973016e02c..562db89f7baa94fe7aaf7e1e708ae4369182392f 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c @@ -128,12 +128,14 @@ static void __devinit pci_fixup_83c553(struct pci_dev *dev) pci_write_config_word(dev, 0x44, 0xb000); outb(0x08, 0x4d1); } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_83C553, pci_fixup_83c553); static void __devinit pci_fixup_unassign(struct pci_dev *dev) { dev->resource[0].end -= dev->resource[0].start; dev->resource[0].start = 0; } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_89C940F, pci_fixup_unassign); /* * Prevent the PCI layer from seeing the resources allocated to this device @@ -154,6 +156,7 @@ static void __devinit pci_fixup_dec21285(struct pci_dev *dev) } } } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21285, pci_fixup_dec21285); /* * Same as above. The PrPMC800 carrier board for the PrPMC1100 @@ -178,6 +181,7 @@ static void __devinit pci_fixup_prpmc1100(struct pci_dev *dev) } } } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IXP4XX, pci_fixup_prpmc1100); /* * PCI IDE controllers use non-standard I/O port decoding, respect it. @@ -198,6 +202,7 @@ static void __devinit pci_fixup_ide_bases(struct pci_dev *dev) } } } +DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases); /* * Put the DEC21142 to sleep @@ -206,6 +211,7 @@ static void __devinit pci_fixup_dec21142(struct pci_dev *dev) { pci_write_config_dword(dev, 0x40, 0x80000000); } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21142, pci_fixup_dec21142); /* * The CY82C693 needs some rather major fixups to ensure that it does @@ -271,38 +277,7 @@ static void __devinit pci_fixup_cy82c693(struct pci_dev *dev) pci_write_config_byte(dev, 0x45, 0x03); } } - -struct pci_fixup pcibios_fixups[] = { - { - PCI_FIXUP_HEADER, - PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, - pci_fixup_cy82c693 - }, { - PCI_FIXUP_HEADER, - PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21142, - pci_fixup_dec21142 - }, { - PCI_FIXUP_HEADER, - PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21285, - pci_fixup_dec21285 - }, { - PCI_FIXUP_HEADER, - PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_83C553, - pci_fixup_83c553 - }, { - PCI_FIXUP_HEADER, - PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_89C940F, - pci_fixup_unassign - }, { - PCI_FIXUP_HEADER, - PCI_ANY_ID, PCI_ANY_ID, - pci_fixup_ide_bases - }, { - PCI_FIXUP_HEADER, - PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IXP4XX, - pci_fixup_prpmc1100 - }, { 0 } -}; +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, pci_fixup_cy82c693); void __devinit pcibios_update_irq(struct pci_dev *dev, int irq) { diff --git a/arch/i386/pci/fixup.c b/arch/i386/pci/fixup.c index a8b1954aec9e0458cf69969b79efcdc94c28c323..bfcecdc55ee92427dc9277499791cc89eba4c36b 100644 --- a/arch/i386/pci/fixup.c +++ b/arch/i386/pci/fixup.c @@ -29,6 +29,7 @@ static void __devinit pci_fixup_i450nx(struct pci_dev *d) } pcibios_last_bus = -1; } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82451NX, pci_fixup_i450nx); static void __devinit pci_fixup_i450gx(struct pci_dev *d) { @@ -42,6 +43,7 @@ static void __devinit pci_fixup_i450gx(struct pci_dev *d) pci_scan_bus(busno, &pci_root_ops, NULL); pcibios_last_bus = -1; } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454GX, pci_fixup_i450gx); static void __devinit pci_fixup_umc_ide(struct pci_dev *d) { @@ -55,6 +57,7 @@ static void __devinit pci_fixup_umc_ide(struct pci_dev *d) for(i=0; i<4; i++) d->resource[i].flags |= PCI_BASE_ADDRESS_SPACE_IO; } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886BF, pci_fixup_umc_ide); static void __devinit pci_fixup_ncr53c810(struct pci_dev *d) { @@ -67,6 +70,7 @@ static void __devinit pci_fixup_ncr53c810(struct pci_dev *d) d->class = PCI_CLASS_STORAGE_SCSI << 8; } } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, pci_fixup_ncr53c810); static void __devinit pci_fixup_ide_bases(struct pci_dev *d) { @@ -86,6 +90,7 @@ static void __devinit pci_fixup_ide_bases(struct pci_dev *d) } } } +DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases); static void __devinit pci_fixup_ide_trash(struct pci_dev *d) { @@ -108,6 +113,10 @@ static void __devinit pci_fixup_ide_trash(struct pci_dev *d) for(i=0; i<4; i++) d->resource[i].start = d->resource[i].end = d->resource[i].flags = 0; } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5513, pci_fixup_ide_trash); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_10, pci_fixup_ide_trash); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_11, pci_fixup_ide_trash); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_9, pci_fixup_ide_trash); static void __devinit pci_fixup_latency(struct pci_dev *d) { @@ -118,6 +127,8 @@ static void __devinit pci_fixup_latency(struct pci_dev *d) DBG("PCI: Setting max latency to 32\n"); pcibios_max_latency = 32; } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5597, pci_fixup_latency); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5598, pci_fixup_latency); static void __devinit pci_fixup_piix4_acpi(struct pci_dev *d) { @@ -126,6 +137,7 @@ static void __devinit pci_fixup_piix4_acpi(struct pci_dev *d) */ d->irq = 9; } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3, pci_fixup_piix4_acpi); /* * Addresses issues with problems in the memory write queue timer in @@ -179,6 +191,10 @@ static void __devinit pci_fixup_via_northbridge_bug(struct pci_dev *d) pci_write_config_byte(d, where, v); } } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8363_0, pci_fixup_via_northbridge_bug); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8622, pci_fixup_via_northbridge_bug); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8361, pci_fixup_via_northbridge_bug); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8367_0, pci_fixup_via_northbridge_bug); /* * For some reasons Intel decided that certain parts of their @@ -195,6 +211,7 @@ static void __devinit pci_fixup_transparent_bridge(struct pci_dev *dev) (dev->device & 0xff00) == 0x2400) dev->transparent = 1; } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_fixup_transparent_bridge); /* * Fixup for C1 Halt Disconnect problem on nForce2 systems. @@ -236,115 +253,5 @@ static void __init pci_fixup_nforce2(struct pci_dev *dev) pci_write_config_dword(dev, 0x6c, fixed_val); } } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2, pci_fixup_nforce2); -struct pci_fixup pcibios_fixups[] = { - { - .pass = PCI_FIXUP_HEADER, - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_82451NX, - .hook = pci_fixup_i450nx - }, - { - .pass = PCI_FIXUP_HEADER, - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_82454GX, - .hook = pci_fixup_i450gx - }, - { - .pass = PCI_FIXUP_HEADER, - .vendor = PCI_VENDOR_ID_UMC, - .device = PCI_DEVICE_ID_UMC_UM8886BF, - .hook = pci_fixup_umc_ide - }, - { - .pass = PCI_FIXUP_HEADER, - .vendor = PCI_VENDOR_ID_SI, - .device = PCI_DEVICE_ID_SI_5513, - .hook = pci_fixup_ide_trash - }, - { - .pass = PCI_FIXUP_HEADER, - .vendor = PCI_ANY_ID, - .device = PCI_ANY_ID, - .hook = pci_fixup_ide_bases - }, - { - .pass = PCI_FIXUP_HEADER, - .vendor = PCI_VENDOR_ID_SI, - .device = PCI_DEVICE_ID_SI_5597, - .hook = pci_fixup_latency - }, - { - .pass = PCI_FIXUP_HEADER, - .vendor = PCI_VENDOR_ID_SI, - .device = PCI_DEVICE_ID_SI_5598, - .hook = pci_fixup_latency - }, - { - .pass = PCI_FIXUP_HEADER, - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_82371AB_3, - .hook = pci_fixup_piix4_acpi - }, - { - .pass = PCI_FIXUP_HEADER, - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_82801CA_10, - .hook = pci_fixup_ide_trash - }, - { - .pass = PCI_FIXUP_HEADER, - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_82801CA_11, - .hook = pci_fixup_ide_trash - }, - { - .pass = PCI_FIXUP_HEADER, - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_82801DB_9, - .hook = pci_fixup_ide_trash - }, - { - .pass = PCI_FIXUP_HEADER, - .vendor = PCI_VENDOR_ID_VIA, - .device = PCI_DEVICE_ID_VIA_8363_0, - .hook = pci_fixup_via_northbridge_bug - }, - { - .pass = PCI_FIXUP_HEADER, - .vendor = PCI_VENDOR_ID_VIA, - .device = PCI_DEVICE_ID_VIA_8622, - .hook = pci_fixup_via_northbridge_bug - }, - { - .pass = PCI_FIXUP_HEADER, - .vendor = PCI_VENDOR_ID_VIA, - .device = PCI_DEVICE_ID_VIA_8361, - .hook = pci_fixup_via_northbridge_bug - }, - { - .pass = PCI_FIXUP_HEADER, - .vendor = PCI_VENDOR_ID_VIA, - .device = PCI_DEVICE_ID_VIA_8367_0, - .hook = pci_fixup_via_northbridge_bug - }, - { - .pass = PCI_FIXUP_HEADER, - .vendor = PCI_VENDOR_ID_NCR, - .device = PCI_DEVICE_ID_NCR_53C810, - .hook = pci_fixup_ncr53c810 - }, - { - .pass = PCI_FIXUP_HEADER, - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_ANY_ID, - .hook = pci_fixup_transparent_bridge - }, - { - .pass = PCI_FIXUP_HEADER, - .vendor = PCI_VENDOR_ID_NVIDIA, - .device = PCI_DEVICE_ID_NVIDIA_NFORCE2, - .hook = pci_fixup_nforce2 - }, - { .pass = 0 } -}; diff --git a/arch/i386/pci/numa.c b/arch/i386/pci/numa.c index d774500673f3a643df7d51835cafe92edd32f3ac..c8046737bd16103745957319079c7ebe92852842 100644 --- a/arch/i386/pci/numa.c +++ b/arch/i386/pci/numa.c @@ -100,10 +100,7 @@ static void __devinit pci_fixup_i450nx(struct pci_dev *d) } pcibios_last_bus = -1; } - -struct pci_fixup pcibios_fixups[] = { - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82451NX, pci_fixup_i450nx }, -}; +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82451NX, pci_fixup_i450nx); static int __init pci_numa_init(void) { diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c index 82204f1bd7640c79e307cfdeb91f0729c8a7a77f..be8ec0e0db16978d7ebcda54d1ac8cbb67a5d42c 100644 --- a/arch/ia64/pci/pci.c +++ b/arch/ia64/pci/pci.c @@ -46,8 +46,6 @@ #define DBG(x...) #endif -struct pci_fixup pcibios_fixups[1]; - /* * Low-level SAL-based PCI configuration access functions. Note that SAL * calls are already serialized (via sal_lock), so we don't need another diff --git a/arch/m68k/kernel/bios32.c b/arch/m68k/kernel/bios32.c index be2f7e6165bd379b3ea183338b05c757a8cc5be4..738531ca2d382b297cdceb90f3e1ca9538b1b14e 100644 --- a/arch/m68k/kernel/bios32.c +++ b/arch/m68k/kernel/bios32.c @@ -77,11 +77,6 @@ static int disable_pci_burst; /* If set do not allow PCI bursts. */ static unsigned int io_base; static unsigned int mem_base; -struct pci_fixup pcibios_fixups[] = -{ - { 0 } -}; - /* * static void disable_dev(struct pci_dev *dev) * diff --git a/arch/m68knommu/kernel/comempci.c b/arch/m68knommu/kernel/comempci.c index ce5dafa69104bbf653c9db785b9039fef74269e1..8670938f1107a5f9c6a03d2e9bce29ca2d53f19e 100644 --- a/arch/m68knommu/kernel/comempci.c +++ b/arch/m68knommu/kernel/comempci.c @@ -351,8 +351,6 @@ char *pcibios_setup(char *option) } /*****************************************************************************/ -struct pci_fixup pcibios_fixups[] = { { 0 } }; - void pcibios_fixup_bus(struct pci_bus *b) { } diff --git a/arch/mips/pci/fixup-atlas.c b/arch/mips/pci/fixup-atlas.c index 4cbef3431ce093f18e9f0d28895eca5efd6db25d..ae1930e67f9e94125bb9a02c30da7a396c78b42c 100644 --- a/arch/mips/pci/fixup-atlas.c +++ b/arch/mips/pci/fixup-atlas.c @@ -60,13 +60,7 @@ static void atlas_saa9730_base_fixup (struct pci_dev *pdev) printk ("saa9730_base = %x\n", saa9730_base); } -#endif - +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730, + atlas_saa9730_base_fixup); -struct pci_fixup pcibios_fixups[] __initdata = { -#ifdef CONFIG_KGDB - {PCI_FIXUP_HEADER, PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730, - atlas_saa9730_base_fixup}, #endif - { 0 } -}; diff --git a/arch/mips/pci/fixup-au1000.c b/arch/mips/pci/fixup-au1000.c index 7bbe12336e113e86d0334910b9dbae75f64c63c7..2d42f9aa95ac212452a07e175050e0d53582af59 100644 --- a/arch/mips/pci/fixup-au1000.c +++ b/arch/mips/pci/fixup-au1000.c @@ -102,7 +102,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { return irq_tab_alchemy[slot][pin]; } - -struct pci_fixup pcibios_fixups[] __initdata = { -{ 0 } -}; diff --git a/arch/mips/pci/fixup-capcella.c b/arch/mips/pci/fixup-capcella.c index 9a0d68ed69d5b469431efbd34e69800dec399c7e..458270a0261b7fdaae3434692689c7f927dcc701 100644 --- a/arch/mips/pci/fixup-capcella.c +++ b/arch/mips/pci/fixup-capcella.c @@ -42,7 +42,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { return irq_tab_capcella[slot][pin]; } - -struct pci_fixup pcibios_fixups[] __initdata = { - { .pass = 0, }, -}; diff --git a/arch/mips/pci/fixup-cobalt.c b/arch/mips/pci/fixup-cobalt.c index f72022a083f4f1301a361e0fcf174f5547c5771f..84c7e98dedcd003d6c4376f76130bbb3bffa960d 100644 --- a/arch/mips/pci/fixup-cobalt.c +++ b/arch/mips/pci/fixup-cobalt.c @@ -41,6 +41,9 @@ static void qube_raq_via_bmIDE_fixup(struct pci_dev *dev) pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 7); } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, + qube_raq_via_bmIDE_fixup); + static void qube_raq_galileo_fixup(struct pci_dev *dev) { unsigned short galileo_id; @@ -73,13 +76,8 @@ static void qube_raq_galileo_fixup(struct pci_dev *dev) } } -struct pci_fixup pcibios_fixups[] __initdata = { - {PCI_FIXUP_HEADER, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, - qube_raq_via_bmIDE_fixup}, - {PCI_FIXUP_HEADER, PCI_VENDOR_ID_GALILEO, PCI_ANY_ID, - qube_raq_galileo_fixup}, - 0 -}; +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_GALILEO, PCI_ANY_ID, + qube_raq_galileo_fixup); static char irq_tab_cobalt[] __initdata = { [COBALT_PCICONF_CPU] = 0, diff --git a/arch/mips/pci/fixup-ddb5074.c b/arch/mips/pci/fixup-ddb5074.c index 025285f9a80f616b1df01b7c05acee72fa02f43a..785bc03f8df0a9d6840072b85b9b583c572b75af 100644 --- a/arch/mips/pci/fixup-ddb5074.c +++ b/arch/mips/pci/fixup-ddb5074.c @@ -17,8 +17,5 @@ static void ddb5074_fixup(struct pci_dev *dev) pci_write_config_byte(dev, 0x7e, t8); } -struct pci_fixup pcibios_fixups[] __initdata = { - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, - ddb5074_fixup }, - {0} -}; +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, + ddb5074_fixup); diff --git a/arch/mips/pci/fixup-ddb5477.c b/arch/mips/pci/fixup-ddb5477.c index 9854413436e9c85d99e3a1e27f79bdbc358bf5e7..25bf49307c0598855f4defce3920cfa57e94bb74 100644 --- a/arch/mips/pci/fixup-ddb5477.c +++ b/arch/mips/pci/fixup-ddb5477.c @@ -41,6 +41,11 @@ static void ddb5477_fixup(struct pci_dev *dev) pci_write_config_byte(dev, 0x41, old | 0xd0); } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, + ddb5477_fixup); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1535, + ddb5477_fixup); + /* * Fixup baseboard AMD chip so that tx does not underflow. * bcr_18 |= 0x0800 @@ -69,12 +74,5 @@ static void ddb5477_amd_lance_fixup(struct pci_dev *dev) outw(temp, ioaddr + PCNET32_WIO_BDP); } -struct pci_fixup pcibios_fixups[] __initdata = { - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, - ddb5477_fixup }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1535, - ddb5477_fixup }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE, - ddb5477_amd_lance_fixup }, - {0} -}; +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE, + ddb5477_amd_lance_fixup); diff --git a/arch/mips/pci/fixup-ip32.c b/arch/mips/pci/fixup-ip32.c index 90c67c35f054e8be338aa6c83a7d7410ff269309..f64529b7b8bfe1987f8d84056cf2d9a0855276e8 100644 --- a/arch/mips/pci/fixup-ip32.c +++ b/arch/mips/pci/fixup-ip32.c @@ -44,7 +44,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { return irq_tab_mace[slot][pin]; } - -struct pci_fixup pcibios_fixups[] = { - {0} -}; diff --git a/arch/mips/pci/fixup-jaguar.c b/arch/mips/pci/fixup-jaguar.c index fa78b9b1f4357c8468ebbfddae444f674d691884..29b6a461550ff63030511bd4ed2fbc5058783d85 100644 --- a/arch/mips/pci/fixup-jaguar.c +++ b/arch/mips/pci/fixup-jaguar.c @@ -36,7 +36,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) return 0; panic("Whooops in pcibios_map_irq"); } - -struct pci_fixup pcibios_fixups[] = { - {0} -}; diff --git a/arch/mips/pci/fixup-lasat.c b/arch/mips/pci/fixup-lasat.c index 49d33ff5635231dae2dc6f222452b636cb08f3f9..e2ab64ab84dc4ab109770f1ee0cb7b7eac7de81e 100644 --- a/arch/mips/pci/fixup-lasat.c +++ b/arch/mips/pci/fixup-lasat.c @@ -4,7 +4,3 @@ void __init pcibios_fixup_irqs(void) { } - -struct pci_fixup pcibios_fixups[] __initdata = { - { 0 } -}; diff --git a/arch/mips/pci/fixup-malta.c b/arch/mips/pci/fixup-malta.c index 3345e1952ee499794ebc434f43f6625737d36949..bcde09eeab6941d87c6af382d3a55f6c4b939175 100644 --- a/arch/mips/pci/fixup-malta.c +++ b/arch/mips/pci/fixup-malta.c @@ -79,6 +79,8 @@ static void __init malta_piix_func0_fixup(struct pci_dev *pdev) } } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0, + malta_piix_func0_fixup); static void __init malta_piix_func1_fixup(struct pci_dev *pdev) { @@ -96,10 +98,5 @@ static void __init malta_piix_func1_fixup(struct pci_dev *pdev) } } -struct pci_fixup pcibios_fixups[] __initdata = { - {PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0, - malta_piix_func0_fixup}, - {PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB, - malta_piix_func1_fixup}, - { 0 } -}; +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB, + malta_piix_func1_fixup); diff --git a/arch/mips/pci/fixup-mpc30x.c b/arch/mips/pci/fixup-mpc30x.c index 1320c42af57074491c06bb5ec1f8c53c2361f659..8e5db12a4ef4b5398ef4078cc215c9d94faec17e 100644 --- a/arch/mips/pci/fixup-mpc30x.c +++ b/arch/mips/pci/fixup-mpc30x.c @@ -42,7 +42,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) return irq_tab_mpc30x[slot]; } - -struct pci_fixup pcibios_fixups[] __initdata = { - { .pass = 0, }, -}; diff --git a/arch/mips/pci/fixup-ocelot-c.c b/arch/mips/pci/fixup-ocelot-c.c index 0cc86ecebff84db921e0c46f229f2e2426eaee84..9edc05950ae530275a3e50647535ca59df7a5e75 100644 --- a/arch/mips/pci/fixup-ocelot-c.c +++ b/arch/mips/pci/fixup-ocelot-c.c @@ -33,7 +33,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) return 0; panic("Whooops in pcibios_map_irq"); } - -struct pci_fixup pcibios_fixups[] = { - {0} -}; diff --git a/arch/mips/pci/fixup-ocelot-g.c b/arch/mips/pci/fixup-ocelot-g.c index 9a2cc8505db859d8007cff2e9bad54c0ba44aa60..a79fc4a085a315ea1666a6d42d20f0f50232525c 100644 --- a/arch/mips/pci/fixup-ocelot-g.c +++ b/arch/mips/pci/fixup-ocelot-g.c @@ -29,7 +29,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) return -1; } - -struct pci_fixup pcibios_fixups[] = { - {0} -}; diff --git a/arch/mips/pci/fixup-sni.c b/arch/mips/pci/fixup-sni.c index 99067c76bcbf4d4769a3007d5ff5417d2247fb31..563fb2c8922c49c11e5c66fbd05d742c657abb16 100644 --- a/arch/mips/pci/fixup-sni.c +++ b/arch/mips/pci/fixup-sni.c @@ -82,7 +82,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) return irq_tab_rm200[slot][pin]; } - -struct pci_fixup pcibios_fixups[] = { - {0} -}; diff --git a/arch/mips/pci/fixup-tb0219.c b/arch/mips/pci/fixup-tb0219.c index ca4d99fbe123e0b7814e7a423d057fb54819cb1d..4d62bce5bf510bda3d544f4efb0b6dc36fd6bf3a 100644 --- a/arch/mips/pci/fixup-tb0219.c +++ b/arch/mips/pci/fixup-tb0219.c @@ -58,7 +58,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) return irq; } - -struct pci_fixup pcibios_fixups[] __initdata = { - { .pass = 0, }, -}; diff --git a/arch/mips/pci/fixup-tb0226.c b/arch/mips/pci/fixup-tb0226.c index 50e639e04a4a68575d5bfe7fa4c675be561b063e..6643462f78b758145e1574e8ac502589c1280e2c 100644 --- a/arch/mips/pci/fixup-tb0226.c +++ b/arch/mips/pci/fixup-tb0226.c @@ -77,7 +77,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) return irq; } - -struct pci_fixup pcibios_fixups[] __initdata = { - { .pass = 0, }, -}; diff --git a/arch/mips/pci/fixup-yosemite.c b/arch/mips/pci/fixup-yosemite.c index 92e40b0916435170999c61f74ed98d76d8954aa4..e39ba2c54c9b202013d8da1d6f655a27381c14bf 100644 --- a/arch/mips/pci/fixup-yosemite.c +++ b/arch/mips/pci/fixup-yosemite.c @@ -33,7 +33,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) return 3; /* Everything goes to one irq bit */ } - -struct pci_fixup pcibios_fixups[] = { - {0} -}; diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c index 3c4183d45e42c9cc89d05bbab081784d23b082f3..b996766a286af9bfb0184af513b85195ccee24b2 100644 --- a/arch/mips/pci/pci-ip27.c +++ b/arch/mips/pci/pci-ip27.c @@ -329,6 +329,9 @@ static void __init pci_fixup_ioc3(struct pci_dev *d) pci_disable_swapping(d); } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3, + pci_fixup_ioc3); + static void __init pci_fixup_isp1020(struct pci_dev *d) { struct bridge_controller *bc = BRIDGE_CONTROLLER(d->bus); @@ -353,6 +356,9 @@ static void __init pci_fixup_isp1020(struct pci_dev *d) pci_enable_swapping(d); } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP1020, + pci_fixup_isp1020); + static void __init pci_fixup_isp2x00(struct pci_dev *d) { struct bridge_controller *bc = BRIDGE_CONTROLLER(d->bus); @@ -427,14 +433,7 @@ static void __init pci_fixup_isp2x00(struct pci_dev *d) /*d->resource[1].flags |= 1; */ } -struct pci_fixup pcibios_fixups[] = { - {PCI_FIXUP_HEADER, PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3, - pci_fixup_ioc3}, - {PCI_FIXUP_HEADER, PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP1020, - pci_fixup_isp1020}, - {PCI_FIXUP_HEADER, PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100, - pci_fixup_isp2x00}, - {PCI_FIXUP_HEADER, PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200, - pci_fixup_isp2x00}, - {0} -}; +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100, + pci_fixup_isp2x00); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200, + pci_fixup_isp2x00); diff --git a/arch/mips/pci/pci-sb1250.c b/arch/mips/pci/pci-sb1250.c index 18e06ecd41a5caaa3aec67949fd62b6a00d56bb1..8c7c385e4f96f202d678a12064885c92e08685e8 100644 --- a/arch/mips/pci/pci-sb1250.c +++ b/arch/mips/pci/pci-sb1250.c @@ -279,7 +279,3 @@ static int __init sb1250_pcibios_init(void) return 0; } arch_initcall(sb1250_pcibios_init); - -struct pci_fixup pcibios_fixups[] = { - {0} -}; diff --git a/arch/mips/pmc-sierra/yosemite/ht.c b/arch/mips/pmc-sierra/yosemite/ht.c index b9a12e90a5025b36fdb3e9d84870e6ba908a23a7..95bbfd013d2072b8ff181be044b402bd3fce592c 100644 --- a/arch/mips/pmc-sierra/yosemite/ht.c +++ b/arch/mips/pmc-sierra/yosemite/ht.c @@ -414,11 +414,6 @@ struct pci_ops titan_pci_ops = { titan_ht_config_write_dword }; - -struct pci_fixup pcibios_fixups[] = { - {0} -}; - void __init pcibios_fixup_bus(struct pci_bus *c) { titan_ht_pcibios_fixup_bus(c); diff --git a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c index 937ab23ca1a7ea2ed7aa869d028127ca88288e83..3cb08a4a513ab4e4f7e3f8d15e8ea227ad692ef9 100644 --- a/arch/parisc/kernel/pci.c +++ b/arch/parisc/kernel/pci.c @@ -146,15 +146,6 @@ char *pcibios_setup(char *str) return str; } -/* Used in drivers/pci/quirks.c */ -struct pci_fixup pcibios_fixups[] = { -#ifdef CONFIG_SUPERIO - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, superio_fixup_pci }, -#endif - { 0 } -}; - - /* * Called by pci_set_master() - a driver interface. * diff --git a/arch/ppc/kernel/pci.c b/arch/ppc/kernel/pci.c index 4145ff7bfc2ea6ddddeaad3e5e48d7c314c36af8..089be143690e4415a2a3a03ef527a3d900367c22 100644 --- a/arch/ppc/kernel/pci.c +++ b/arch/ppc/kernel/pci.c @@ -45,11 +45,6 @@ static void fixup_broken_pcnet32(struct pci_dev* dev); static int reparent_resources(struct resource *parent, struct resource *res); static void fixup_rev1_53c810(struct pci_dev* dev); static void fixup_cpc710_pci64(struct pci_dev* dev); -#ifdef CONFIG_PPC_PMAC -extern void pmac_pci_fixup_cardbus(struct pci_dev* dev); -extern void pmac_pci_fixup_pciata(struct pci_dev* dev); -extern void pmac_pci_fixup_k2_sata(struct pci_dev* dev); -#endif #ifdef CONFIG_PPC_OF static u8* pci_to_OF_bus_map; #endif @@ -64,20 +59,6 @@ struct pci_controller** hose_tail = &hose_head; static int pci_bus_count; -struct pci_fixup pcibios_fixups[] = { - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID, fixup_broken_pcnet32 }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, fixup_rev1_53c810 }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64}, - { PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources }, -#ifdef CONFIG_PPC_PMAC - /* We should add per-machine fixup support in xxx_setup.c or xxx_pci.c */ - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_TI, PCI_ANY_ID, pmac_pci_fixup_cardbus }, - { PCI_FIXUP_FINAL, PCI_ANY_ID, PCI_ANY_ID, pmac_pci_fixup_pciata }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_SERVERWORKS, 0x0240, pmac_pci_fixup_k2_sata }, -#endif /* CONFIG_PPC_PMAC */ - { 0 } -}; - static void fixup_rev1_53c810(struct pci_dev* dev) { @@ -90,6 +71,7 @@ fixup_rev1_53c810(struct pci_dev* dev) dev->class = PCI_CLASS_STORAGE_SCSI; } } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, fixup_rev1_53c810); static void fixup_broken_pcnet32(struct pci_dev* dev) @@ -100,6 +82,7 @@ fixup_broken_pcnet32(struct pci_dev* dev) pci_name_device(dev); } } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID, fixup_broken_pcnet32); static void fixup_cpc710_pci64(struct pci_dev* dev) @@ -112,6 +95,7 @@ fixup_cpc710_pci64(struct pci_dev* dev) dev->resource[1].start = dev->resource[1].end = 0; dev->resource[1].flags = 0; } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64); static void pcibios_fixup_resources(struct pci_dev *dev) @@ -158,6 +142,7 @@ pcibios_fixup_resources(struct pci_dev *dev) if (ppc_md.pcibios_fixup_resources) ppc_md.pcibios_fixup_resources(dev); } +DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources); void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, diff --git a/arch/ppc/platforms/pmac_pci.c b/arch/ppc/platforms/pmac_pci.c index 9dcc4e2e539958acb4276b290fe12e5dc7364936..f3863f2fb8151cde83d381007f25d949d944a315 100644 --- a/arch/ppc/platforms/pmac_pci.c +++ b/arch/ppc/platforms/pmac_pci.c @@ -1034,6 +1034,8 @@ void pmac_pci_fixup_cardbus(struct pci_dev* dev) } } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_TI, PCI_ANY_ID, pmac_pci_fixup_cardbus); + void pmac_pci_fixup_pciata(struct pci_dev* dev) { u8 progif = 0; @@ -1074,6 +1076,8 @@ void pmac_pci_fixup_pciata(struct pci_dev* dev) printk(KERN_ERR "Rewrite of PROGIF failed !\n"); } } +DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pmac_pci_fixup_pciata); + /* * Disable second function on K2-SATA, it's broken @@ -1104,3 +1108,4 @@ void __pmac pmac_pci_fixup_k2_sata(struct pci_dev* dev) } } } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SERVERWORKS, 0x0240, pmac_pci_fixup_k2_sata); diff --git a/arch/ppc/platforms/sbc82xx.c b/arch/ppc/platforms/sbc82xx.c index 28a77dba3ae4fc69be6b5be716ed0e9ce9a62eff..6d101924a654b1a3134e5b0e960eda514de00e1c 100644 --- a/arch/ppc/platforms/sbc82xx.c +++ b/arch/ppc/platforms/sbc82xx.c @@ -20,6 +20,7 @@ #include <linux/stddef.h> #include <linux/interrupt.h> #include <linux/irq.h> +#include <linux/pci.h> #include <asm/mpc8260.h> #include <asm/machdep.h> @@ -237,6 +238,25 @@ static int sbc82xx_pci_map_irq(struct pci_dev *dev, unsigned char idsel, } +static void __devinit quirk_sbc8260_cardbus(struct pci_dev *pdev) +{ + uint32_t ctrl; + + if (pdev->bus->number != 0 || pdev->devfn != PCI_DEVFN(17, 0)) + return; + + printk(KERN_INFO "Setting up CardBus controller\n"); + + /* Set P2CCLK bit in System Control Register */ + pci_read_config_dword(pdev, 0x80, &ctrl); + ctrl |= (1<<27); + pci_write_config_dword(pdev, 0x80, ctrl); + + /* Set MFUNC up for PCI IRQ routing via INTA and INTB, and LEDs. */ + pci_write_config_dword(pdev, 0x8c, 0x00c01d22); + +} +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, quirk_sbc8260_cardbus); void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5, diff --git a/arch/ppc64/kernel/iSeries_pci.c b/arch/ppc64/kernel/iSeries_pci.c index 3472d188e29a2cd33c7de54e684ff2b53d941078..e6f431ab4b4c2e5abfca0fb90d6f8aa765f09524 100644 --- a/arch/ppc64/kernel/iSeries_pci.c +++ b/arch/ppc64/kernel/iSeries_pci.c @@ -820,7 +820,3 @@ void iSeries_Write_Long(u32 data, void *IoAddress) } while (CheckReturnCode("WWL", DevNode, rc) != 0); } EXPORT_SYMBOL(iSeries_Write_Long); - -void pcibios_name_device(struct pci_dev *dev) -{ -} diff --git a/arch/ppc64/kernel/pSeries_pci.c b/arch/ppc64/kernel/pSeries_pci.c index 92bc868f31d9a6d5834734980e0e5e447d30023e..9a47205b960f529a2ffc4d41c30dbda8a28faad8 100644 --- a/arch/ppc64/kernel/pSeries_pci.c +++ b/arch/ppc64/kernel/pSeries_pci.c @@ -519,9 +519,9 @@ unsigned long __init find_and_init_phbs(void) return 0; } +#if 0 void pcibios_name_device(struct pci_dev *dev) { -#if 0 struct device_node *dn; /* @@ -541,8 +541,9 @@ void pcibios_name_device(struct pci_dev *dev) } } } -#endif } +DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_name_device); +#endif void __devinit pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus) diff --git a/arch/ppc64/kernel/pci.c b/arch/ppc64/kernel/pci.c index 30e50023c94a90eedf7c4903a923092906a14fb0..537435329a49fa15f54412d12823310e1e740800 100644 --- a/arch/ppc64/kernel/pci.c +++ b/arch/ppc64/kernel/pci.c @@ -55,12 +55,6 @@ unsigned int pcibios_assign_all_busses(void) unsigned long isa_io_base; /* NULL if no ISA bus */ unsigned long pci_io_base; -void pcibios_name_device(struct pci_dev* dev); -void pcibios_final_fixup(void); -static void fixup_broken_pcnet32(struct pci_dev* dev); -static void fixup_windbond_82c105(struct pci_dev* dev); -extern void fixup_k2_sata(struct pci_dev* dev); - void iSeries_pcibios_init(void); struct pci_controller *hose_head; @@ -74,20 +68,6 @@ int global_phb_number; /* Global phb counter */ /* Cached ISA bridge dev. */ struct pci_dev *ppc64_isabridge_dev = NULL; -struct pci_fixup pcibios_fixups[] = { - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID, - fixup_broken_pcnet32 }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105, - fixup_windbond_82c105 }, - { PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, - pcibios_name_device }, -#ifdef CONFIG_PPC_PMAC - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_SERVERWORKS, 0x0240, - fixup_k2_sata }, -#endif - { 0 } -}; - static void fixup_broken_pcnet32(struct pci_dev* dev) { if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) { @@ -96,6 +76,7 @@ static void fixup_broken_pcnet32(struct pci_dev* dev) pci_name_device(dev); } } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID, fixup_broken_pcnet32); static void fixup_windbond_82c105(struct pci_dev* dev) { @@ -118,6 +99,7 @@ static void fixup_windbond_82c105(struct pci_dev* dev) dev->resource[i].flags &= ~IORESOURCE_IO; } } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105, fixup_windbond_82c105); void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, diff --git a/arch/ppc64/kernel/pmac_pci.c b/arch/ppc64/kernel/pmac_pci.c index 169195713371fe505faf5657a93b4db5241744bc..e6926c0ea9a816ec141624f994bbae09ed6ba649 100644 --- a/arch/ppc64/kernel/pmac_pci.c +++ b/arch/ppc64/kernel/pmac_pci.c @@ -777,3 +777,4 @@ void fixup_k2_sata(struct pci_dev* dev) } } } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SERVERWORKS, 0x0240, fixup_k2_sata); diff --git a/arch/sh/boards/mpc1211/pci.c b/arch/sh/boards/mpc1211/pci.c index c9bbd72b4288a3f219a0dc0a5ac45f8d02151973..ba3a6543975227fb6a40c3a6f93f18c3989a884c 100644 --- a/arch/sh/boards/mpc1211/pci.c +++ b/arch/sh/boards/mpc1211/pci.c @@ -176,14 +176,7 @@ static void __devinit quirk_ali_ide_ports(struct pci_dev *dev) dev->resource[4].end = 0xf00f; dev->resource[4].flags = IORESOURCE_IO; } - - -/* Add future fixups here... */ -struct pci_fixup pcibios_fixups[] = { - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_AL, - PCI_DEVICE_ID_AL_M5229, quirk_ali_ide_ports }, - { 0 } -}; +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, quirk_ali_ide_ports); char * __devinit pcibios_setup(char *str) { diff --git a/arch/sh/boards/overdrive/galileo.c b/arch/sh/boards/overdrive/galileo.c index 54020ebbbc7937b15491a4c1e412b7a01c8d796b..276fa11ee4ce0c4ad581415c146217a825d68141 100644 --- a/arch/sh/boards/overdrive/galileo.c +++ b/arch/sh/boards/overdrive/galileo.c @@ -455,13 +455,7 @@ static void __init pci_fixup_ide_bases(struct pci_dev *d) } } } - - -/* Add future fixups here... */ -struct pci_fixup pcibios_fixups[] = { - { PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases }, - { 0 } -}; +DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases); void __init pcibios_init(void) { diff --git a/arch/sh/drivers/pci/fixups-dreamcast.c b/arch/sh/drivers/pci/fixups-dreamcast.c index aa5e24a6519d883a382807688d8392c61ee4fa8d..d07572bfcc50cbbeef00abde9a4370acf9871d1b 100644 --- a/arch/sh/drivers/pci/fixups-dreamcast.c +++ b/arch/sh/drivers/pci/fixups-dreamcast.c @@ -47,11 +47,7 @@ static void __init gapspci_fixup_resources(struct pci_dev *dev) } } -struct pci_fixup pcibios_fixups[] = { - { PCI_FIXUP_HEADER, PCI_ANY_ID, - PCI_ANY_ID, gapspci_fixup_resources }, - { 0, } -}; +DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, gapspci_fixup_resources); void __init pcibios_fixup_bus(struct pci_bus *bus) { diff --git a/arch/sh/drivers/pci/pci-sh7751.c b/arch/sh/drivers/pci/pci-sh7751.c index b2bb72972bdb00b67b6550766816dde62831890d..1a5a883ad01c55a80aa08be9b1cafb5ce42e665e 100644 --- a/arch/sh/drivers/pci/pci-sh7751.c +++ b/arch/sh/drivers/pci/pci-sh7751.c @@ -177,16 +177,9 @@ static void __init pci_fixup_ide_bases(struct pci_dev *d) } } } +DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases); #endif -/* Add future fixups here... */ -struct pci_fixup pcibios_fixups[] = { -#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D) - { PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases }, -#endif - { 0 } -}; - /* * Called after each bus is probed, but before its children * are examined. diff --git a/arch/sh/drivers/pci/pci-st40.c b/arch/sh/drivers/pci/pci-st40.c index 29e7bf61927ce581483bde78740bd0ca5ddc7e9b..4be02f62755897e6745b7494075d23bbea4d53a4 100644 --- a/arch/sh/drivers/pci/pci-st40.c +++ b/arch/sh/drivers/pci/pci-st40.c @@ -160,13 +160,7 @@ static void __init pci_fixup_ide_bases(struct pci_dev *d) } } } - - -/* Add future fixups here... */ -struct pci_fixup pcibios_fixups[] = { - { PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases }, - { 0 } -}; +DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases); int __init st40pci_init(unsigned memStart, unsigned memSize) { diff --git a/arch/sh64/kernel/pci_sh5.c b/arch/sh64/kernel/pci_sh5.c index c2b4f00e2246e6baaf9050b455ddc7c439481fc1..842a24373b809ad4f59f7eed3d210f4e9e373e9f 100644 --- a/arch/sh64/kernel/pci_sh5.c +++ b/arch/sh64/kernel/pci_sh5.c @@ -48,12 +48,7 @@ static void __init pci_fixup_ide_bases(struct pci_dev *d) } } } - -/* Add future fixups here... */ -struct pci_fixup pcibios_fixups[] = { - { PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases }, - { 0 } -}; +DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases); char * __init pcibios_setup(char *str) { diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c index bc52cd482b5f0c5502d401fb765ac18ca43e5bbe..c982473d1be04bdf2ec978da7c15712eb8c90959 100644 --- a/arch/sparc/kernel/pcic.c +++ b/arch/sparc/kernel/pcic.c @@ -36,10 +36,6 @@ #include <asm/uaccess.h> -struct pci_fixup pcibios_fixups[] = { - { 0 } -}; - unsigned int pcic_pin_to_irq(unsigned int pin, char *name); /* diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c index 31cc686deb18cfbf930dac9ebadf355fca799bcd..f7b7fafb2479e158ac3e0b979695e6a484170e76 100644 --- a/arch/sparc64/kernel/pci.c +++ b/arch/sparc64/kernel/pci.c @@ -351,10 +351,6 @@ static int __init pcibios_init(void) subsys_initcall(pcibios_init); -struct pci_fixup pcibios_fixups[] = { - { 0 } -}; - void pcibios_fixup_bus(struct pci_bus *pbus) { struct pci_pbm_info *pbm = pbus->sysdata; diff --git a/arch/v850/kernel/rte_mb_a_pci.c b/arch/v850/kernel/rte_mb_a_pci.c index da39beb8e3c8fec1695ccf8635703a54481b18db..551c41ba0d3bd25448af9c477c3b8169659a6e4c 100644 --- a/arch/v850/kernel/rte_mb_a_pci.c +++ b/arch/v850/kernel/rte_mb_a_pci.c @@ -322,8 +322,6 @@ pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, /* Stubs for things we don't use. */ -struct pci_fixup pcibios_fixups[] = { { 0 } }; - /* Called after each bus is probed, but before its children are examined. */ void pcibios_fixup_bus(struct pci_bus *b) { diff --git a/drivers/parisc/superio.c b/drivers/parisc/superio.c index ad7811509b7807e638c34f17e91f31da17810c4d..d8c12fc97894b4e6d596c79d9b81b1f95f3173b1 100644 --- a/drivers/parisc/superio.c +++ b/drivers/parisc/superio.c @@ -480,6 +480,7 @@ void superio_fixup_pci(struct pci_dev *pdev) pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog); printk("PCI: Enabled native mode for NS87415 (pif=0x%x)\n", prog); } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, superio_fixup_pci); /* Because of a defect in Super I/O, all reads of the PCI DMA status * registers, IDE status register and the IDE select register need to be diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 6e7c350133becd05268d1cb6fa6073019c63457b..1feb24a326273c0a568d026f3e1b9aeea2ab9169 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -39,6 +39,7 @@ static void __devinit quirk_passive_release(struct pci_dev *dev) } } } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441, quirk_passive_release ); /* The VIA VP2/VP3/MVP3 seem to have some 'features'. There may be a workaround but VIA don't answer queries. If you happen to have good contacts at VIA @@ -57,6 +58,17 @@ static void __devinit quirk_isa_dma_hangs(struct pci_dev *dev) printk(KERN_INFO "Activating ISA DMA hang workarounds.\n"); } } + /* + * Its not totally clear which chipsets are the problematic ones + * We know 82C586 and 82C596 variants are affected. + */ +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_0, quirk_isa_dma_hangs ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C596, quirk_isa_dma_hangs ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_0, quirk_isa_dma_hangs ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, quirk_isa_dma_hangs ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_CBUS_1, quirk_isa_dma_hangs ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_CBUS_2, quirk_isa_dma_hangs ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_CBUS_3, quirk_isa_dma_hangs ); int pci_pci_problems; @@ -72,6 +84,8 @@ static void __devinit quirk_nopcipci(struct pci_dev *dev) pci_pci_problems|=PCIPCI_FAIL; } } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5597, quirk_nopcipci ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496, quirk_nopcipci ); /* * Triton requires workarounds to be used by the drivers @@ -85,6 +99,10 @@ static void __devinit quirk_triton(struct pci_dev *dev) pci_pci_problems|=PCIPCI_TRITON; } } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437, quirk_triton ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437VX, quirk_triton ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82439, quirk_triton ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82439TX, quirk_triton ); /* * VIA Apollo KT133 needs PCI latency patch @@ -145,6 +163,9 @@ static void __devinit quirk_vialatency(struct pci_dev *dev) pci_write_config_byte(dev, 0x76, busarb); printk(KERN_INFO "Applying VIA southbridge workaround.\n"); } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8363_0, quirk_vialatency ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8371_1, quirk_vialatency ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8361, quirk_vialatency ); /* * VIA Apollo VP3 needs ETBF on BT848/878 @@ -158,6 +179,8 @@ static void __devinit quirk_viaetbf(struct pci_dev *dev) pci_pci_problems|=PCIPCI_VIAETBF; } } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C597_0, quirk_viaetbf ); + static void __devinit quirk_vsfx(struct pci_dev *dev) { if((pci_pci_problems&PCIPCI_VSFX)==0) @@ -166,6 +189,7 @@ static void __devinit quirk_vsfx(struct pci_dev *dev) pci_pci_problems|=PCIPCI_VSFX; } } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C576, quirk_vsfx ); /* * Ali Magik requires workarounds to be used by the drivers @@ -182,6 +206,8 @@ static void __init quirk_alimagik(struct pci_dev *dev) pci_pci_problems|=PCIPCI_ALIMAGIK|PCIPCI_TRITON; } } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1647, quirk_alimagik ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1651, quirk_alimagik ); /* @@ -197,6 +223,12 @@ static void __devinit quirk_natoma(struct pci_dev *dev) pci_pci_problems|=PCIPCI_NATOMA; } } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441, quirk_natoma ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443LX_0, quirk_natoma ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443LX_1, quirk_natoma ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX_0, quirk_natoma ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX_1, quirk_natoma ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX_2, quirk_natoma ); /* * S3 868 and 968 chips report region size equal to 32M, but they decode 64M. @@ -212,6 +244,8 @@ static void __devinit quirk_s3_64M(struct pci_dev *dev) r->end = 0x3ffffff; } } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_868, quirk_s3_64M ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_968, quirk_s3_64M ); static void __devinit quirk_io_region(struct pci_dev *dev, unsigned region, unsigned size, int nr) { @@ -239,6 +273,7 @@ static void __devinit quirk_ati_exploding_mce(struct pci_dev *dev) request_region(0x3b0, 0x0C, "RadeonIGP"); request_region(0x3d3, 0x01, "RadeonIGP"); } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RS100, quirk_ati_exploding_mce ); /* * Let's make the southbridge information explicit instead @@ -260,6 +295,7 @@ static void __devinit quirk_ali7101_acpi(struct pci_dev *dev) pci_read_config_word(dev, 0xE2, ®ion); quirk_io_region(dev, region, 32, PCI_BRIDGE_RESOURCES+1); } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, quirk_ali7101_acpi ); /* * PIIX4 ACPI: Two IO regions pointed to by longwords at @@ -275,6 +311,7 @@ static void __devinit quirk_piix4_acpi(struct pci_dev *dev) pci_read_config_dword(dev, 0x90, ®ion); quirk_io_region(dev, region, 32, PCI_BRIDGE_RESOURCES+1); } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3, quirk_piix4_acpi ); /* * ICH4, ICH4-M, ICH5, ICH5-M ACPI: Three IO regions pointed to by longwords at @@ -291,6 +328,15 @@ static void __devinit quirk_ich4_lpc_acpi(struct pci_dev *dev) pci_read_config_dword(dev, 0x58, ®ion); quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES+1); } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0, quirk_ich4_lpc_acpi ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_0, quirk_ich4_lpc_acpi ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0, quirk_ich4_lpc_acpi ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_10, quirk_ich4_lpc_acpi ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0, quirk_ich4_lpc_acpi ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12, quirk_ich4_lpc_acpi ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0, quirk_ich4_lpc_acpi ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12, quirk_ich4_lpc_acpi ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0, quirk_ich4_lpc_acpi ); /* * VIA ACPI: One IO region pointed to by longword at @@ -308,6 +354,7 @@ static void __devinit quirk_vt82c586_acpi(struct pci_dev *dev) quirk_io_region(dev, region, 256, PCI_BRIDGE_RESOURCES); } } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_vt82c586_acpi ); /* * VIA VT82C686 ACPI: Three IO region pointed to by (long)words at @@ -330,6 +377,7 @@ static void __devinit quirk_vt82c686_acpi(struct pci_dev *dev) smb &= PCI_BASE_ADDRESS_IO_MASK; quirk_io_region(dev, smb, 16, PCI_BRIDGE_RESOURCES + 2); } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4, quirk_vt82c686_acpi ); #ifdef CONFIG_X86_IO_APIC @@ -358,6 +406,7 @@ static void __devinit quirk_via_ioapic(struct pci_dev *dev) /* Offset 0x58: External APIC IRQ output control */ pci_write_config_byte (dev, 0x58, tmp); } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, quirk_via_ioapic ); /* * The AMD io apic can hang the box when an apic irq is masked. @@ -380,12 +429,14 @@ static void __devinit quirk_amd_ioapic(struct pci_dev *dev) printk(KERN_WARNING " : booting with the \"noapic\" option.\n"); } } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410, quirk_amd_ioapic ); static void __init quirk_ioapic_rmw(struct pci_dev *dev) { if (dev->devfn == 0 && dev->bus->number == 0) sis_apic_bug = 1; } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, PCI_ANY_ID, quirk_ioapic_rmw ); #define AMD8131_revA0 0x01 #define AMD8131_revB0 0x11 @@ -407,6 +458,7 @@ static void __init quirk_amd_8131_ioapic(struct pci_dev *dev) pci_write_config_byte( dev, AMD8131_MISC, tmp); } } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_APIC, quirk_amd_8131_ioapic ); #endif /* CONFIG_X86_IO_APIC */ @@ -444,6 +496,8 @@ static void __devinit quirk_via_acpi(struct pci_dev *d) if (irq && (irq != 2)) d->irq = irq; } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_via_acpi ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4, quirk_via_acpi ); static void __devinit quirk_via_irqpic(struct pci_dev *dev) { @@ -459,6 +513,9 @@ static void __devinit quirk_via_irqpic(struct pci_dev *dev) pci_write_config_byte(dev, PCI_INTERRUPT_LINE, new_irq); } } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_2, quirk_via_irqpic ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_5, quirk_via_irqpic ); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_6, quirk_via_irqpic ); /* @@ -480,6 +537,8 @@ static void __devinit quirk_piix3_usb(struct pci_dev *dev) legsup &= 0x50ef; pci_write_config_word(dev, 0xc0, legsup); } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_2, quirk_piix3_usb ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_2, quirk_piix3_usb ); /* * VIA VT82C598 has its device ID settable and many BIOSes @@ -492,6 +551,7 @@ static void __devinit quirk_vt82c598_id(struct pci_dev *dev) pci_write_config_byte(dev, 0xfc, 0); pci_read_config_word(dev, PCI_DEVICE_ID, &dev->device); } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C597_0, quirk_vt82c598_id ); /* * CardBus controllers have a legacy base address that enables them @@ -505,6 +565,7 @@ static void __devinit quirk_cardbus_legacy(struct pci_dev *dev) return; pci_write_config_dword(dev, PCI_CB_LEGACY_MODE_BASE, 0); } +DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, quirk_cardbus_legacy ); /* * Following the PCI ordering rules is optional on the AMD762. I'm not @@ -528,6 +589,7 @@ static void __devinit quirk_amd_ordering(struct pci_dev *dev) pci_write_config_dword(dev, 0x84, pcic); } } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FE_GATE_700C, quirk_amd_ordering ); /* * DreamWorks provided workaround for Dunord I-3000 problem @@ -543,11 +605,21 @@ static void __devinit quirk_dunord ( struct pci_dev * dev ) r -> start = 0; r -> end = 0xffffff; } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DUNORD, PCI_DEVICE_ID_DUNORD_I3000, quirk_dunord ); +/* + * i82380FB mobile docking controller: its PCI-to-PCI bridge + * is subtractive decoding (transparent), and does indicate this + * in the ProgIf. Unfortunately, the ProgIf value is wrong - 0x80 + * instead of 0x01. + */ static void __devinit quirk_transparent_bridge(struct pci_dev *dev) { dev->transparent = 1; } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82380FB, quirk_transparent_bridge ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TOSHIBA, 0x605, quirk_transparent_bridge ); + /* * Common misconfiguration of the MediaGX/Geode PCI master that will @@ -566,6 +638,8 @@ static void __init quirk_mediagx_master(struct pci_dev *dev) pci_write_config_byte(dev, 0x41, reg); } } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_PCI_MASTER, quirk_mediagx_master ); + /* * As per PCI spec, ignore base address registers 0-3 of the IDE controllers @@ -616,6 +690,7 @@ static void __devinit quirk_ide_bases(struct pci_dev *dev) printk(KERN_INFO "PCI: Ignoring BAR%d-%d of IDE controller %s\n", first_bar, last_bar, pci_name(dev)); } +DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, quirk_ide_bases ); /* * Ensure C0 rev restreaming is off. This is normally done by @@ -639,6 +714,7 @@ static void __init quirk_disable_pxb(struct pci_dev *pdev) printk(KERN_INFO "PCI: C0 revision 450NX. Disabling PCI restreaming.\n"); } } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, quirk_disable_pxb ); /* * VIA northbridges care about PCI_INTERRUPT_LINE @@ -651,6 +727,7 @@ static void __devinit quirk_via_bridge(struct pci_dev *pdev) if(pdev->devfn == 0) interrupt_line_quirk = 1; } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_ANY_ID, quirk_via_bridge ); /* * Serverworks CSB5 IDE does not fully support native mode @@ -667,6 +744,7 @@ static void __init quirk_svwks_csb5ide(struct pci_dev *pdev) quirk_ide_bases(pdev); } } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, quirk_svwks_csb5ide ); /* This was originally an Alpha specific thing, but it really fits here. * The i82375 PCI/EISA bridge appears as non-classified. Fix that. @@ -676,6 +754,7 @@ static void __init quirk_eisa_bridge(struct pci_dev *dev) { dev->class = PCI_CLASS_BRIDGE_EISA << 8; } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82375, quirk_eisa_bridge ); /* * On ASUS P4B boards, the SMBus PCI Device within the ICH2/4 southbridge @@ -732,6 +811,12 @@ static void __init asus_hides_smbus_hostbridge(struct pci_dev *dev) } } } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82845_HB, asus_hides_smbus_hostbridge ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82845G_HB, asus_hides_smbus_hostbridge ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82850_HB, asus_hides_smbus_hostbridge ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_7205_0, asus_hides_smbus_hostbridge ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82855PM_HB, asus_hides_smbus_hostbridge ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82855GM_HB, asus_hides_smbus_hostbridge ); static void __init asus_hides_smbus_lpc(struct pci_dev *dev) { @@ -750,6 +835,9 @@ static void __init asus_hides_smbus_lpc(struct pci_dev *dev) printk(KERN_INFO "PCI: Enabled i801 SMBus device\n"); } } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0, asus_hides_smbus_lpc ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0, asus_hides_smbus_lpc ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12, asus_hides_smbus_lpc ); /* * SiS 96x south bridge: BIOS typically hides SMBus device... @@ -803,6 +891,19 @@ static void __init quirk_sis_96x_compatible(struct pci_dev *dev) { sis_96x_compatible = 1; } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_645, quirk_sis_96x_compatible ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_646, quirk_sis_96x_compatible ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_648, quirk_sis_96x_compatible ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_650, quirk_sis_96x_compatible ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_651, quirk_sis_96x_compatible ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_735, quirk_sis_96x_compatible ); + +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503, quirk_sis_503 ); + +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_961, quirk_sis_96x_smbus ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_962, quirk_sis_96x_smbus ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_963, quirk_sis_96x_smbus ); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC, quirk_sis_96x_smbus ); #ifdef CONFIG_X86_IO_APIC static void __init quirk_alder_ioapic(struct pci_dev *pdev) @@ -825,6 +926,7 @@ static void __init quirk_alder_ioapic(struct pci_dev *pdev) } } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EESSC, quirk_alder_ioapic ); #endif #ifdef CONFIG_SCSI_SATA @@ -898,6 +1000,7 @@ static void __init quirk_intel_ide_combined(struct pci_dev *pdev) else request_region(0x170, 8, "libata"); /* port 1 */ } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, quirk_intel_ide_combined ); #endif /* CONFIG_SCSI_SATA */ int pciehp_msi_quirk; @@ -906,6 +1009,7 @@ static void __devinit quirk_pciehp_msi(struct pci_dev *pdev) { pciehp_msi_quirk = 1; } +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SMCH, quirk_pciehp_msi ); /* * The main table of quirks. @@ -914,141 +1018,11 @@ static void __devinit quirk_pciehp_msi(struct pci_dev *pdev) * be declared __init. */ -static struct pci_fixup pci_fixups[] __devinitdata = { - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_DUNORD, PCI_DEVICE_ID_DUNORD_I3000, quirk_dunord }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441, quirk_passive_release }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441, quirk_passive_release }, - /* - * Its not totally clear which chipsets are the problematic ones - * We know 82C586 and 82C596 variants are affected. - */ - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_0, quirk_isa_dma_hangs }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C596, quirk_isa_dma_hangs }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_0, quirk_isa_dma_hangs }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, quirk_isa_dma_hangs }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, quirk_disable_pxb }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_CBUS_1, quirk_isa_dma_hangs }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_CBUS_2, quirk_isa_dma_hangs }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_CBUS_3, quirk_isa_dma_hangs }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_868, quirk_s3_64M }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_968, quirk_s3_64M }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437, quirk_triton }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437VX, quirk_triton }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82439, quirk_triton }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82439TX, quirk_triton }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441, quirk_natoma }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443LX_0, quirk_natoma }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443LX_1, quirk_natoma }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX_0, quirk_natoma }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX_1, quirk_natoma }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX_2, quirk_natoma }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5597, quirk_nopcipci }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496, quirk_nopcipci }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503, quirk_sis_503 }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC, quirk_sis_96x_smbus }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_645, quirk_sis_96x_compatible }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_646, quirk_sis_96x_compatible }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_648, quirk_sis_96x_compatible }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_650, quirk_sis_96x_compatible }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_651, quirk_sis_96x_compatible }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_735, quirk_sis_96x_compatible }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_961, quirk_sis_96x_smbus }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_962, quirk_sis_96x_smbus }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_963, quirk_sis_96x_smbus }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1647, quirk_alimagik }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1651, quirk_alimagik }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8363_0, quirk_vialatency }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8371_1, quirk_vialatency }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8361, quirk_vialatency }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C576, quirk_vsfx }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C597_0, quirk_viaetbf }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C597_0, quirk_vt82c598_id }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_vt82c586_acpi }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4, quirk_vt82c686_acpi }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3, quirk_piix4_acpi }, - - /* Intel LPC interface bridges all have 128 bytes of magic ACPI/TCO regs and 64 bytes of GPIO */ - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0, quirk_ich4_lpc_acpi }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_0, quirk_ich4_lpc_acpi }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0, quirk_ich4_lpc_acpi }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_10, quirk_ich4_lpc_acpi }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0, quirk_ich4_lpc_acpi }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12, quirk_ich4_lpc_acpi }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0, quirk_ich4_lpc_acpi }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12, quirk_ich4_lpc_acpi }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0, quirk_ich4_lpc_acpi }, - - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, quirk_ali7101_acpi }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_2, quirk_piix3_usb }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_2, quirk_piix3_usb }, - { PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, quirk_ide_bases }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_VIA, PCI_ANY_ID, quirk_via_bridge }, - { PCI_FIXUP_FINAL, PCI_ANY_ID, PCI_ANY_ID, quirk_cardbus_legacy }, - -#ifdef CONFIG_X86_IO_APIC - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, quirk_via_ioapic }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410, quirk_amd_ioapic }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_SI, PCI_ANY_ID, quirk_ioapic_rmw }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_APIC, - quirk_amd_8131_ioapic }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EESSC, quirk_alder_ioapic }, -#endif - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_via_acpi }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4, quirk_via_acpi }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_2, quirk_via_irqpic }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_5, quirk_via_irqpic }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_6, quirk_via_irqpic }, - - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FE_GATE_700C, quirk_amd_ordering }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RS100, quirk_ati_exploding_mce }, - /* - * i82380FB mobile docking controller: its PCI-to-PCI bridge - * is subtractive decoding (transparent), and does indicate this - * in the ProgIf. Unfortunately, the ProgIf value is wrong - 0x80 - * instead of 0x01. - */ - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82380FB, quirk_transparent_bridge }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_TOSHIBA, 0x605, quirk_transparent_bridge }, - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_PCI_MASTER, quirk_mediagx_master }, - - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, quirk_svwks_csb5ide }, - - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82375, quirk_eisa_bridge }, - - /* - * on Asus P4B boards, the i801SMBus device is disabled at startup. - * this also goes for boards in HP Compaq nc6000 and nc8000 notebooks. - */ - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82845_HB, asus_hides_smbus_hostbridge }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82845G_HB, asus_hides_smbus_hostbridge }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82850_HB, asus_hides_smbus_hostbridge }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_7205_0, asus_hides_smbus_hostbridge }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82855PM_HB, asus_hides_smbus_hostbridge }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82855GM_HB, asus_hides_smbus_hostbridge }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0, asus_hides_smbus_lpc }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0, asus_hides_smbus_lpc }, - { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12, asus_hides_smbus_lpc }, - -#ifdef CONFIG_SCSI_SATA - /* Fixup BIOSes that configure Parallel ATA (PATA / IDE) and - * Serial ATA (SATA) into the same PCI ID. - */ - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_INTEL, PCI_ANY_ID, - quirk_intel_ide_combined }, -#endif /* CONFIG_SCSI_SATA */ - - { PCI_FIXUP_FINAL, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SMCH, quirk_pciehp_msi }, - - { 0 } -}; - - -static void pci_do_fixups(struct pci_dev *dev, int pass, struct pci_fixup *f) +static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f, struct pci_fixup *end) { - while (f->pass) { - if (f->pass == pass && - (f->vendor == dev->vendor || f->vendor == (u16) PCI_ANY_ID) && + while (f < end) { + if ((f->vendor == dev->vendor || f->vendor == (u16) PCI_ANY_ID) && (f->device == dev->device || f->device == (u16) PCI_ANY_ID)) { #ifdef DEBUG printk(KERN_INFO "PCI: Calling quirk %p for %s\n", f->hook, pci_name(dev)); @@ -1059,10 +1033,27 @@ static void pci_do_fixups(struct pci_dev *dev, int pass, struct pci_fixup *f) } } +extern struct pci_fixup __start_pci_fixups_header[]; +extern struct pci_fixup __end_pci_fixups_header[]; +extern struct pci_fixup __start_pci_fixups_final[]; +extern struct pci_fixup __end_pci_fixups_final[]; + void pci_fixup_device(int pass, struct pci_dev *dev) { - pci_do_fixups(dev, pass, pcibios_fixups); - pci_do_fixups(dev, pass, pci_fixups); + struct pci_fixup *start, *end; + + switch(pass) { + case PCI_FIXUP_HEADER: + start = __start_pci_fixups_header; + end = __end_pci_fixups_header; + break; + + case PCI_FIXUP_FINAL: + start = __start_pci_fixups_final; + end = __end_pci_fixups_final; + break; + } + pci_do_fixups(dev, start, end); } EXPORT_SYMBOL(pciehp_msi_quirk); diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h index 918b02d6cf18ae6e30ac91510c4db60389fa4b44..655cb5d01eda00ee7098f9e5f51b686fb9a56aa4 100644 --- a/include/asm-generic/vmlinux.lds.h +++ b/include/asm-generic/vmlinux.lds.h @@ -16,6 +16,16 @@ *(.rodata1) \ } \ \ + /* PCI quirks */ \ + .pci_fixup : AT(ADDR(.pci_fixup) - LOAD_OFFSET) { \ + VMLINUX_SYMBOL(__start_pci_fixups_header) = .; \ + *(.pci_fixup_header) \ + VMLINUX_SYMBOL(__end_pci_fixups_header) = .; \ + VMLINUX_SYMBOL(__start_pci_fixups_final) = .; \ + *(.pci_fixup_final) \ + VMLINUX_SYMBOL(__end_pci_fixups_final) = .; \ + } \ + \ /* Kernel symbol table: Normal symbols */ \ __ksymtab : AT(ADDR(__ksymtab) - LOAD_OFFSET) { \ VMLINUX_SYMBOL(__start___ksymtab) = .; \ diff --git a/include/linux/pci.h b/include/linux/pci.h index 2ce5f957c072083ccc1a2bcbba2c4ee2dfacf6b6..82433e352616ace6a1adaf15c310fafe0e01ce6a 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1001,16 +1001,25 @@ static inline char *pci_name(struct pci_dev *pdev) */ struct pci_fixup { - int pass; u16 vendor, device; /* You can use PCI_ANY_ID here of course */ void (*hook)(struct pci_dev *dev); }; -extern struct pci_fixup pcibios_fixups[]; - #define PCI_FIXUP_HEADER 1 /* Called immediately after reading configuration header */ #define PCI_FIXUP_FINAL 2 /* Final phase of device fixups */ +/* Anonymous variables would be nice... */ +#define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \ + static struct pci_fixup __pci_fixup_##vendor##device##hook __attribute_used__ \ + __attribute__((__section__(".pci_fixup_header"))) = { \ + vendor, device, hook }; + +#define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \ + static struct pci_fixup __pci_fixup_##vendor##device##hook __attribute_used__ \ + __attribute__((__section__(".pci_fixup_final"))) = { \ + vendor, device, hook }; + + void pci_fixup_device(int pass, struct pci_dev *dev); extern int pci_pci_problems;