Commit 7bf0ba59 authored by Justin T. Gibbs's avatar Justin T. Gibbs

Aic7xxx Driver Update

 o Be more conservative in testing FIFOEMP before calling an
   overrun on a data transfer.
parent b48dadaa
...@@ -40,7 +40,7 @@ ...@@ -40,7 +40,7 @@
* $FreeBSD$ * $FreeBSD$
*/ */
VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#55 $" VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#56 $"
PATCH_ARG_LIST = "struct ahc_softc *ahc" PATCH_ARG_LIST = "struct ahc_softc *ahc"
PREFIX = "ahc_" PREFIX = "ahc_"
...@@ -1044,11 +1044,19 @@ ultra2_fifoflush: ...@@ -1044,11 +1044,19 @@ ultra2_fifoflush:
* LAST_SEG_DONE to come true on a completed transfer * LAST_SEG_DONE to come true on a completed transfer
* and then test to see if the data FIFO is non-empty. * and then test to see if the data FIFO is non-empty.
*/ */
test SCB_RESIDUAL_SGPTR[0], SG_LIST_NULL jz . + 4; test SCB_RESIDUAL_SGPTR[0], SG_LIST_NULL
jz ultra2_wait_fifoemp;
test SG_CACHE_SHADOW, LAST_SEG_DONE jz .; test SG_CACHE_SHADOW, LAST_SEG_DONE jz .;
/*
* FIFOEMP can lag LAST_SEG_DONE. Wait a few
* clocks before calling this an overrun.
*/
test DFSTATUS, FIFOEMP jnz ultra2_fifoempty;
test DFSTATUS, FIFOEMP jnz ultra2_fifoempty;
test DFSTATUS, FIFOEMP jnz ultra2_fifoempty; test DFSTATUS, FIFOEMP jnz ultra2_fifoempty;
/* Overrun */ /* Overrun */
jmp data_phase_loop; jmp data_phase_loop;
ultra2_wait_fifoemp:
test DFSTATUS, FIFOEMP jz .; test DFSTATUS, FIFOEMP jz .;
} }
ultra2_fifoempty: ultra2_fifoempty:
......
...@@ -2,8 +2,8 @@ ...@@ -2,8 +2,8 @@
* DO NOT EDIT - This file is automatically generated * DO NOT EDIT - This file is automatically generated
* from the following source files: * from the following source files:
* *
* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#54 $ * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#56 $
* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#38 $ * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#39 $
*/ */
typedef int (ahc_reg_print_t)(u_int, u_int *, u_int); typedef int (ahc_reg_print_t)(u_int, u_int *, u_int);
typedef struct ahc_reg_parse_entry { typedef struct ahc_reg_parse_entry {
...@@ -432,13 +432,6 @@ ahc_reg_print_t ahc_scsiseq_template_print; ...@@ -432,13 +432,6 @@ ahc_reg_print_t ahc_scsiseq_template_print;
ahc_print_register(NULL, 0, "SCSISEQ_TEMPLATE", 0x54, regvalue, cur_col, wrap) ahc_print_register(NULL, 0, "SCSISEQ_TEMPLATE", 0x54, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_data_count_odd_print;
#else
#define ahc_data_count_odd_print(regvalue, cur_col, wrap) \
ahc_print_register(NULL, 0, "DATA_COUNT_ODD", 0x55, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_ha_274_biosglobal_print; ahc_reg_print_t ahc_ha_274_biosglobal_print;
#else #else
...@@ -1396,8 +1389,6 @@ ahc_reg_print_t ahc_sg_cache_pre_print; ...@@ -1396,8 +1389,6 @@ ahc_reg_print_t ahc_sg_cache_pre_print;
#define ENAUTOATNI 0x04 #define ENAUTOATNI 0x04
#define ENAUTOATNP 0x02 #define ENAUTOATNP 0x02
#define DATA_COUNT_ODD 0x55
#define HA_274_BIOSGLOBAL 0x56 #define HA_274_BIOSGLOBAL 0x56
#define INITIATOR_TAG 0x56 #define INITIATOR_TAG 0x56
#define HA_274_EXTENDED_TRANS 0x01 #define HA_274_EXTENDED_TRANS 0x01
...@@ -1655,7 +1646,8 @@ ahc_reg_print_t ahc_sg_cache_pre_print; ...@@ -1655,7 +1646,8 @@ ahc_reg_print_t ahc_sg_cache_pre_print;
#define TWIN_CHNLB 0x80 #define TWIN_CHNLB 0x80
#define SCB_LUN 0xba #define SCB_LUN 0xba
#define LID 0xff #define LID 0x3f
#define SCB_XFERLEN_ODD 0x80
#define SCB_TAG 0xbb #define SCB_TAG 0xbb
...@@ -1749,7 +1741,6 @@ ahc_reg_print_t ahc_sg_cache_pre_print; ...@@ -1749,7 +1741,6 @@ ahc_reg_print_t ahc_sg_cache_pre_print;
#define SG_CACHE_SHADOW 0xfc #define SG_CACHE_SHADOW 0xfc
#define SG_ADDR_MASK 0xf8 #define SG_ADDR_MASK 0xf8
#define ODD_SEG 0x04
#define LAST_SEG 0x02 #define LAST_SEG 0x02
#define LAST_SEG_DONE 0x01 #define LAST_SEG_DONE 0x01
......
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