Commit 7c1f1eca authored by Mythri P K's avatar Mythri P K Committed by Tomi Valkeinen

OMAP4: DSS2: HDMI: Move the EDID definition from HDMI

Clean up to move the EDID definition from the IP dependent header file to hdmi.c
Signed-off-by: default avatarMythri P K <mythripk@ti.com>
Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
parent 94c52987
...@@ -50,6 +50,16 @@ ...@@ -50,6 +50,16 @@
#define HDMI_PLLCTRL 0x200 #define HDMI_PLLCTRL 0x200
#define HDMI_PHY 0x300 #define HDMI_PHY 0x300
/* HDMI EDID Length move this */
#define HDMI_EDID_MAX_LENGTH 256
#define EDID_TIMING_DESCRIPTOR_SIZE 0x12
#define EDID_DESCRIPTOR_BLOCK0_ADDRESS 0x36
#define EDID_DESCRIPTOR_BLOCK1_ADDRESS 0x80
#define EDID_SIZE_BLOCK0_TIMING_DESCRIPTOR 4
#define EDID_SIZE_BLOCK1_TIMING_DESCRIPTOR 4
#define OMAP_HDMI_TIMINGS_NB 34
static struct { static struct {
struct mutex lock; struct mutex lock;
struct omap_display_platform_data *pdata; struct omap_display_platform_data *pdata;
......
...@@ -182,16 +182,6 @@ struct hdmi_reg { u16 idx; }; ...@@ -182,16 +182,6 @@ struct hdmi_reg { u16 idx; };
#define HDMI_TXPHY_POWER_CTRL HDMI_REG(0x8) #define HDMI_TXPHY_POWER_CTRL HDMI_REG(0x8)
#define HDMI_TXPHY_PAD_CFG_CTRL HDMI_REG(0xC) #define HDMI_TXPHY_PAD_CFG_CTRL HDMI_REG(0xC)
/* HDMI EDID Length */
#define HDMI_EDID_MAX_LENGTH 256
#define EDID_TIMING_DESCRIPTOR_SIZE 0x12
#define EDID_DESCRIPTOR_BLOCK0_ADDRESS 0x36
#define EDID_DESCRIPTOR_BLOCK1_ADDRESS 0x80
#define EDID_SIZE_BLOCK0_TIMING_DESCRIPTOR 4
#define EDID_SIZE_BLOCK1_TIMING_DESCRIPTOR 4
#define OMAP_HDMI_TIMINGS_NB 34
#define REG_FLD_MOD(base, idx, val, start, end) \ #define REG_FLD_MOD(base, idx, val, start, end) \
hdmi_write_reg(base, idx, FLD_MOD(hdmi_read_reg(base, idx),\ hdmi_write_reg(base, idx, FLD_MOD(hdmi_read_reg(base, idx),\
val, start, end)) val, start, end))
......
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