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Commit 7cfa2e75 authored by Bryan O'Donoghue's avatar Bryan O'Donoghue Committed by Bjorn Andersson
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arm64: dts: qcom: sc8280xp: camss: Add CCI definitions 

sc8280xp has four Camera Control Interface (CCI) blocks which pinout to
two I2C master controllers for each CCI.

The CCI I2C pins are not muxed so we define them in the dtsi.
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarBryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20240111-linux-next-24-01-02-sc8280xp-camss-core-dtsi-v4-3-cdd5c57ff1dc@linaro.orgSigned-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 59c84ee8
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arch/arm64/boot/dts/qcom/sc8280xp.dtsi
View file @ 7cfa2e75
......@@ -3451,6 +3451,169 @@ usb_1_role_switch: endpoint {
};
};
cci0: cci@ac4a000 {
compatible = "qcom,sc8280xp-cci", "qcom,msm8996-cci";
reg = <0 0x0ac4a000 0 0x1000>;
interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
clocks = <&camcc CAMCC_CAMNOC_AXI_CLK>,
<&camcc CAMCC_SLOW_AHB_CLK_SRC>,
<&camcc CAMCC_CPAS_AHB_CLK>,
<&camcc CAMCC_CCI_0_CLK>;
clock-names = "camnoc_axi",
"slow_ahb_src",
"cpas_ahb",
"cci";
power-domains = <&camcc TITAN_TOP_GDSC>;
pinctrl-0 = <&cci0_default>;
pinctrl-1 = <&cci0_sleep>;
pinctrl-names = "default", "sleep";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
cci0_i2c0: i2c-bus@0 {
reg = <0>;
clock-frequency = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
};
cci0_i2c1: i2c-bus@1 {
reg = <1>;
clock-frequency = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
};
};
cci1: cci@ac4b000 {
compatible = "qcom,sc8280xp-cci", "qcom,msm8996-cci";
reg = <0 0x0ac4b000 0 0x1000>;
interrupts = <GIC_SPI 271 IRQ_TYPE_EDGE_RISING>;
clocks = <&camcc CAMCC_CAMNOC_AXI_CLK>,
<&camcc CAMCC_SLOW_AHB_CLK_SRC>,
<&camcc CAMCC_CPAS_AHB_CLK>,
<&camcc CAMCC_CCI_1_CLK>;
clock-names = "camnoc_axi",
"slow_ahb_src",
"cpas_ahb",
"cci";
power-domains = <&camcc TITAN_TOP_GDSC>;
pinctrl-0 = <&cci1_default>;
pinctrl-1 = <&cci1_sleep>;
pinctrl-names = "default", "sleep";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
cci1_i2c0: i2c-bus@0 {
reg = <0>;
clock-frequency = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
};
cci1_i2c1: i2c-bus@1 {
reg = <1>;
clock-frequency = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
};
};
cci2: cci@ac4c000 {
compatible = "qcom,sc8280xp-cci", "qcom,msm8996-cci";
reg = <0 0x0ac4c000 0 0x1000>;
interrupts = <GIC_SPI 651 IRQ_TYPE_EDGE_RISING>;
clocks = <&camcc CAMCC_CAMNOC_AXI_CLK>,
<&camcc CAMCC_SLOW_AHB_CLK_SRC>,
<&camcc CAMCC_CPAS_AHB_CLK>,
<&camcc CAMCC_CCI_2_CLK>;
clock-names = "camnoc_axi",
"slow_ahb_src",
"cpas_ahb",
"cci";
power-domains = <&camcc TITAN_TOP_GDSC>;
pinctrl-0 = <&cci2_default>;
pinctrl-1 = <&cci2_sleep>;
pinctrl-names = "default", "sleep";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
cci2_i2c0: i2c-bus@0 {
reg = <0>;
clock-frequency = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
};
cci2_i2c1: i2c-bus@1 {
reg = <1>;
clock-frequency = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
};
};
cci3: cci@ac4d000 {
compatible = "qcom,sc8280xp-cci", "qcom,msm8996-cci";
reg = <0 0x0ac4d000 0 0x1000>;
interrupts = <GIC_SPI 650 IRQ_TYPE_EDGE_RISING>;
clocks = <&camcc CAMCC_CAMNOC_AXI_CLK>,
<&camcc CAMCC_SLOW_AHB_CLK_SRC>,
<&camcc CAMCC_CPAS_AHB_CLK>,
<&camcc CAMCC_CCI_3_CLK>;
clock-names = "camnoc_axi",
"slow_ahb_src",
"cpas_ahb",
"cci";
power-domains = <&camcc TITAN_TOP_GDSC>;
pinctrl-0 = <&cci3_default>;
pinctrl-1 = <&cci3_sleep>;
pinctrl-names = "default", "sleep";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
cci3_i2c0: i2c-bus@0 {
reg = <0>;
clock-frequency = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
};
cci3_i2c1: i2c-bus@1 {
reg = <1>;
clock-frequency = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
};
};
camcc: clock-controller@ad00000 {
compatible = "qcom,sc8280xp-camcc";
reg = <0 0x0ad00000 0 0x20000>;
......@@ -4076,6 +4239,150 @@ tlmm: pinctrl@f100000 {
#interrupt-cells = <2>;
gpio-ranges = <&tlmm 0 0 230>;
wakeup-parent = <&pdc>;
cci0_default: cci0-default-state {
cci0_i2c0_default: cci0-i2c0-default-pins {
/* cci_i2c_sda0, cci_i2c_scl0 */
pins = "gpio113", "gpio114";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-up;
};
cci0_i2c1_default: cci0-i2c1-default-pins {
/* cci_i2c_sda1, cci_i2c_scl1 */
pins = "gpio115", "gpio116";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-up;
};
};
cci0_sleep: cci0-sleep-state {
cci0_i2c0_sleep: cci0-i2c0-sleep-pins {
/* cci_i2c_sda0, cci_i2c_scl0 */
pins = "gpio113", "gpio114";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-down;
};
cci0_i2c1_sleep: cci0-i2c1-sleep-pins {
/* cci_i2c_sda1, cci_i2c_scl1 */
pins = "gpio115", "gpio116";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-down;
};
};
cci1_default: cci1-default-state {
cci1_i2c0_default: cci1-i2c0-default-pins {
/* cci_i2c_sda2, cci_i2c_scl2 */
pins = "gpio10","gpio11";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-up;
};
cci1_i2c1_default: cci1-i2c1-default-pins {
/* cci_i2c_sda3, cci_i2c_scl3 */
pins = "gpio123","gpio124";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-up;
};
};
cci1_sleep: cci1-sleep-state {
cci1_i2c0_sleep: cci1-i2c0-sleep-pins {
/* cci_i2c_sda2, cci_i2c_scl2 */
pins = "gpio10","gpio11";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-down;
};
cci1_i2c1_sleep: cci1-i2c1-sleep-pins {
/* cci_i2c_sda3, cci_i2c_scl3 */
pins = "gpio123","gpio124";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-down;
};
};
cci2_default: cci2-default-state {
cci2_i2c0_default: cci2-i2c0-default-pins {
/* cci_i2c_sda4, cci_i2c_scl4 */
pins = "gpio117","gpio118";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-up;
};
cci2_i2c1_default: cci2-i2c1-default-pins {
/* cci_i2c_sda5, cci_i2c_scl5 */
pins = "gpio12","gpio13";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-up;
};
};
cci2_sleep: cci2-sleep-state {
cci2_i2c0_sleep: cci2-i2c0-sleep-pins {
/* cci_i2c_sda4, cci_i2c_scl4 */
pins = "gpio117","gpio118";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-down;
};
cci2_i2c1_sleep: cci2-i2c1-sleep-pins {
/* cci_i2c_sda5, cci_i2c_scl5 */
pins = "gpio12","gpio13";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-down;
};
};
cci3_default: cci3-default-state {
cci3_i2c0_default: cci3-i2c0-default-pins {
/* cci_i2c_sda6, cci_i2c_scl6 */
pins = "gpio145","gpio146";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-up;
};
cci3_i2c1_default: cci3-i2c1-default-pins {
/* cci_i2c_sda7, cci_i2c_scl7 */
pins = "gpio164","gpio165";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-up;
};
};
cci3_sleep: cci3-sleep-state {
cci3_i2c0_sleep: cci3-i2c0-sleep-pins {
/* cci_i2c_sda6, cci_i2c_scl6 */
pins = "gpio145","gpio146";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-down;
};
cci3_i2c1_sleep: cci3-i2c1-sleep-pins {
/* cci_i2c_sda7, cci_i2c_scl7 */
pins = "gpio164","gpio165";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-down;
};
};
};
apps_smmu: iommu@15000000 {
......
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