Commit 7d3d8f85 authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: Do intel_dpll_readout_hw_state() after encoder readout

The clock readout for DDI encoders needs to moved into the encoders.
To that end intel_dpll_readout_hw_state() needs to happen after
the encoder readout as otherwise it can't correctly populate
the PLL crtc_mask/active_mask bitmasks.

v2: Populate DPLL ref clocks before the encoder->get_config()
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210225161225.30746-1-ville.syrjala@linux.intel.comReviewed-by: default avatarMika Kahola <mika.kahola@intel.com>
parent 356ce0ea
...@@ -12909,6 +12909,7 @@ int intel_modeset_init_nogem(struct drm_i915_private *i915) ...@@ -12909,6 +12909,7 @@ int intel_modeset_init_nogem(struct drm_i915_private *i915)
intel_update_czclk(i915); intel_update_czclk(i915);
intel_modeset_init_hw(i915); intel_modeset_init_hw(i915);
intel_dpll_update_ref_clks(i915);
intel_hdcp_component_init(i915); intel_hdcp_component_init(i915);
...@@ -13445,8 +13446,6 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) ...@@ -13445,8 +13446,6 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
readout_plane_state(dev_priv); readout_plane_state(dev_priv);
intel_dpll_readout_hw_state(dev_priv);
for_each_intel_encoder(dev, encoder) { for_each_intel_encoder(dev, encoder) {
pipe = 0; pipe = 0;
...@@ -13481,6 +13480,8 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) ...@@ -13481,6 +13480,8 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
pipe_name(pipe)); pipe_name(pipe));
} }
intel_dpll_readout_hw_state(dev_priv);
drm_connector_list_iter_begin(dev, &conn_iter); drm_connector_list_iter_begin(dev, &conn_iter);
for_each_intel_connector_iter(connector, &conn_iter) { for_each_intel_connector_iter(connector, &conn_iter) {
if (connector->get_hw_state(connector)) { if (connector->get_hw_state(connector)) {
......
...@@ -4612,12 +4612,15 @@ static void readout_dpll_hw_state(struct drm_i915_private *i915, ...@@ -4612,12 +4612,15 @@ static void readout_dpll_hw_state(struct drm_i915_private *i915,
pll->info->name, pll->state.crtc_mask, pll->on); pll->info->name, pll->state.crtc_mask, pll->on);
} }
void intel_dpll_readout_hw_state(struct drm_i915_private *i915) void intel_dpll_update_ref_clks(struct drm_i915_private *i915)
{ {
int i;
if (i915->dpll.mgr && i915->dpll.mgr->update_ref_clks) if (i915->dpll.mgr && i915->dpll.mgr->update_ref_clks)
i915->dpll.mgr->update_ref_clks(i915); i915->dpll.mgr->update_ref_clks(i915);
}
void intel_dpll_readout_hw_state(struct drm_i915_private *i915)
{
int i;
for (i = 0; i < i915->dpll.num_shared_dpll; i++) for (i = 0; i < i915->dpll.num_shared_dpll; i++)
readout_dpll_hw_state(i915, &i915->dpll.shared_dplls[i]); readout_dpll_hw_state(i915, &i915->dpll.shared_dplls[i]);
......
...@@ -410,6 +410,7 @@ void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state); ...@@ -410,6 +410,7 @@ void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state);
void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state); void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state);
void intel_shared_dpll_swap_state(struct intel_atomic_state *state); void intel_shared_dpll_swap_state(struct intel_atomic_state *state);
void intel_shared_dpll_init(struct drm_device *dev); void intel_shared_dpll_init(struct drm_device *dev);
void intel_dpll_update_ref_clks(struct drm_i915_private *dev_priv);
void intel_dpll_readout_hw_state(struct drm_i915_private *dev_priv); void intel_dpll_readout_hw_state(struct drm_i915_private *dev_priv);
void intel_dpll_sanitize_state(struct drm_i915_private *dev_priv); void intel_dpll_sanitize_state(struct drm_i915_private *dev_priv);
......
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