Commit 7db37701 authored by Andi Kleen's avatar Andi Kleen Committed by Linus Torvalds

[PATCH] x86_64: Fix TLB reporting on K8

On K8 L1 TLB is inclusive, so don't include it in the TLB count.
Signed-off-by: default avatarAndi Kleen <ak@suse.de>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 54465502
...@@ -658,8 +658,8 @@ static void __init display_cacheinfo(struct cpuinfo_x86 *c) ...@@ -658,8 +658,8 @@ static void __init display_cacheinfo(struct cpuinfo_x86 *c)
printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n", printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
edx>>24, edx&0xFF, ecx>>24, ecx&0xFF); edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
c->x86_cache_size=(ecx>>24)+(edx>>24); c->x86_cache_size=(ecx>>24)+(edx>>24);
/* DTLB and ITLB together, but only 4K */ /* On K8 L1 TLB is inclusive, so don't count it */
c->x86_tlbsize = ((ebx>>16)&0xff) + (ebx&0xff); c->x86_tlbsize = 0;
} }
if (n >= 0x80000006) { if (n >= 0x80000006) {
......
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