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Kirill Smelkov
linux
Commits
7e165ac0
Commit
7e165ac0
authored
Feb 15, 2003
by
Roger Luethi
Committed by
Jeff Garzik
Feb 15, 2003
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[netdrvr via-rhine] bump version, use constant instead of magic number
parent
d952e4b0
Changes
1
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1 changed file
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11 additions
and
4 deletions
+11
-4
drivers/net/via-rhine.c
drivers/net/via-rhine.c
+11
-4
No files found.
drivers/net/via-rhine.c
View file @
7e165ac0
...
@@ -101,11 +101,18 @@
...
@@ -101,11 +101,18 @@
LK1.1.15 (jgarzik):
LK1.1.15 (jgarzik):
- Use new MII lib helper generic_mii_ioctl
- Use new MII lib helper generic_mii_ioctl
LK1.1.16 (Roger Luethi)
- Etherleak fix
- Handle Tx buffer underrun
- Fix bugs in full duplex handling
- New reset code uses "force reset" cmd on Rhine-II
- Various clean ups
*/
*/
#define DRV_NAME "via-rhine"
#define DRV_NAME "via-rhine"
#define DRV_VERSION "1.1.1
5
"
#define DRV_VERSION "1.1.1
6
"
#define DRV_RELDATE "
November-22-2002
"
#define DRV_RELDATE "
February-15-2003
"
/* A few user-configurable values.
/* A few user-configurable values.
...
@@ -395,7 +402,7 @@ enum register_offsets {
...
@@ -395,7 +402,7 @@ enum register_offsets {
MIIPhyAddr
=
0x6C
,
MIIStatus
=
0x6D
,
PCIBusConfig
=
0x6E
,
MIIPhyAddr
=
0x6C
,
MIIStatus
=
0x6D
,
PCIBusConfig
=
0x6E
,
MIICmd
=
0x70
,
MIIRegAddr
=
0x71
,
MIIData
=
0x72
,
MACRegEEcsr
=
0x74
,
MIICmd
=
0x70
,
MIIRegAddr
=
0x71
,
MIIData
=
0x72
,
MACRegEEcsr
=
0x74
,
ConfigA
=
0x78
,
ConfigB
=
0x79
,
ConfigC
=
0x7A
,
ConfigD
=
0x7B
,
ConfigA
=
0x78
,
ConfigB
=
0x79
,
ConfigC
=
0x7A
,
ConfigD
=
0x7B
,
RxMissed
=
0x7C
,
RxCRCErrs
=
0x7E
,
RxMissed
=
0x7C
,
RxCRCErrs
=
0x7E
,
MiscCmd
=
0x81
,
StickyHW
=
0x83
,
WOLcrClr
=
0xA4
,
WOLcgClr
=
0xA7
,
PwrcsrClr
=
0xAC
,
StickyHW
=
0x83
,
WOLcrClr
=
0xA4
,
WOLcgClr
=
0xA7
,
PwrcsrClr
=
0xAC
,
};
};
...
@@ -532,7 +539,7 @@ static void wait_for_reset(struct net_device *dev, int chip_id, char *name)
...
@@ -532,7 +539,7 @@ static void wait_for_reset(struct net_device *dev, int chip_id, char *name)
/* Rhine-II needs to be forced sometimes */
/* Rhine-II needs to be forced sometimes */
if
(
chip_id
==
VT6102
)
if
(
chip_id
==
VT6102
)
writeb
(
0x40
,
ioaddr
+
0x81
);
writeb
(
0x40
,
ioaddr
+
MiscCmd
);
/* VT86C100A may need long delay after reset (dlink) */
/* VT86C100A may need long delay after reset (dlink) */
/* Seen on Rhine-II as well (rl) */
/* Seen on Rhine-II as well (rl) */
...
...
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