Commit 7e4dd1ed authored by Tao Ren's avatar Tao Ren Committed by Joel Stanley

ARM: dts: aspeed: cmm: Use common dtsi

Simplify the CMM device tree by using the common dtsi.

In addition this enables the second firmware flash and the emmc device
in slot #0.
Signed-off-by: default avatarTao Ren <taoren@fb.com>
Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
parent 2b7ca63c
...@@ -2,7 +2,7 @@ ...@@ -2,7 +2,7 @@
// Copyright (c) 2018 Facebook Inc. // Copyright (c) 2018 Facebook Inc.
/dts-v1/; /dts-v1/;
#include "aspeed-g5.dtsi" #include "ast2500-facebook-netbmc-common.dtsi"
/ { / {
model = "Facebook Backpack CMM BMC"; model = "Facebook Backpack CMM BMC";
...@@ -53,10 +53,6 @@ chosen { ...@@ -53,10 +53,6 @@ chosen {
bootargs = "console=ttyS1,9600n8 root=/dev/ram rw earlyprintk"; bootargs = "console=ttyS1,9600n8 root=/dev/ram rw earlyprintk";
}; };
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
ast-adc-hwmon { ast-adc-hwmon {
compatible = "iio-hwmon"; compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
...@@ -64,39 +60,7 @@ ast-adc-hwmon { ...@@ -64,39 +60,7 @@ ast-adc-hwmon {
}; };
}; };
&pinctrl {
aspeed,external-nodes = <&gfx &lhc>;
};
/*
* Update reset type to "system" (full chip) to fix warm reboot hang issue
* when reset type is set to default ("soc", gated by reset mask registers).
*/
&wdt1 {
status = "okay";
aspeed,reset-type = "system";
};
/*
* wdt2 is not used by Backpack CMM.
*/
&wdt2 {
status = "disabled";
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
#include "facebook-bmc-flash-layout.dtsi"
};
};
&uart1 { &uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default &pinctrl_rxd1_default
&pinctrl_ncts1_default &pinctrl_ncts1_default
...@@ -107,8 +71,6 @@ &pinctrl_ndtr1_default ...@@ -107,8 +71,6 @@ &pinctrl_ndtr1_default
}; };
&uart3 { &uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default pinctrl-0 = <&pinctrl_txd3_default
&pinctrl_rxd3_default &pinctrl_rxd3_default
&pinctrl_ncts3_default &pinctrl_ncts3_default
...@@ -123,17 +85,6 @@ &uart4 { ...@@ -123,17 +85,6 @@ &uart4 {
&pinctrl_rxd4_default>; &pinctrl_rxd4_default>;
}; };
&uart5 {
status = "okay";
};
&mac1 {
status = "okay";
no-hw-checksum;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
/* /*
* I2C bus reserved for communication with COM-E. * I2C bus reserved for communication with COM-E.
*/ */
...@@ -380,3 +331,18 @@ &ehci0 { ...@@ -380,3 +331,18 @@ &ehci0 {
&ehci1 { &ehci1 {
status = "okay"; status = "okay";
}; };
&vhub {
status = "disabled";
};
&sdhci0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sd1_default>;
};
&sdhci1 {
status = "disabled";
};
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