Commit 7ec75871 authored by Russell King's avatar Russell King Committed by Greg Kroah-Hartman

tty: amba-pl011: add support for ZTE UART (EXPERIMENTAL)

Add (incomplete) support for the ZTE UART to the AMBA PL011 driver.
This is similar to the ARM and ST variants, except it has a different
register address layout, and requires 32-bit accesses to the registers.
Use the newly introduced register tables and access size support to
cope with these differences.
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
Reviewed-by: default avatarPeter Hurley <peter@hurleysoftware.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 84c3e03b
...@@ -171,6 +171,29 @@ static struct vendor_data vendor_st = { ...@@ -171,6 +171,29 @@ static struct vendor_data vendor_st = {
.get_fifosize = get_fifosize_st, .get_fifosize = get_fifosize_st,
}; };
static const u16 pl011_zte_offsets[REG_ARRAY_SIZE] = {
[REG_DR] = ZX_UART011_DR,
[REG_FR] = ZX_UART011_FR,
[REG_LCRH_RX] = ZX_UART011_LCRH,
[REG_LCRH_TX] = ZX_UART011_LCRH,
[REG_IBRD] = ZX_UART011_IBRD,
[REG_FBRD] = ZX_UART011_FBRD,
[REG_CR] = ZX_UART011_CR,
[REG_IFLS] = ZX_UART011_IFLS,
[REG_IMSC] = ZX_UART011_IMSC,
[REG_RIS] = ZX_UART011_RIS,
[REG_MIS] = ZX_UART011_MIS,
[REG_ICR] = ZX_UART011_ICR,
[REG_DMACR] = ZX_UART011_DMACR,
};
static struct vendor_data vendor_zte = {
.reg_offset = pl011_zte_offsets,
.access_32b = true,
.ifls = UART011_IFLS_RX4_8|UART011_IFLS_TX4_8,
.get_fifosize = get_fifosize_arm,
};
/* Deals with DMA transactions */ /* Deals with DMA transactions */
struct pl011_sgbuf { struct pl011_sgbuf {
......
...@@ -65,6 +65,24 @@ ...@@ -65,6 +65,24 @@
#define ST_UART011_ABCR 0x100 /* Autobaud control register. */ #define ST_UART011_ABCR 0x100 /* Autobaud control register. */
#define ST_UART011_ABIMSC 0x15C /* Autobaud interrupt mask/clear register. */ #define ST_UART011_ABIMSC 0x15C /* Autobaud interrupt mask/clear register. */
/*
* ZTE UART register offsets. This UART has a radically different address
* allocation from the ARM and ST variants, so we list all registers here.
* We assume unlisted registers do not exist.
*/
#define ZX_UART011_DR 0x04
#define ZX_UART011_FR 0x14
#define ZX_UART011_IBRD 0x24
#define ZX_UART011_FBRD 0x28
#define ZX_UART011_LCRH 0x30
#define ZX_UART011_CR 0x34
#define ZX_UART011_IFLS 0x38
#define ZX_UART011_IMSC 0x40
#define ZX_UART011_RIS 0x44
#define ZX_UART011_MIS 0x48
#define ZX_UART011_ICR 0x4c
#define ZX_UART011_DMACR 0x50
#define UART011_DR_OE (1 << 11) #define UART011_DR_OE (1 << 11)
#define UART011_DR_BE (1 << 10) #define UART011_DR_BE (1 << 10)
#define UART011_DR_PE (1 << 9) #define UART011_DR_PE (1 << 9)
......
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