dt-bindings: dma: snps,dma-spear1340: Fix data{-,_}width schema

'data-width' and 'data_width' properties are defined as arrays, but the
schema is defined as a matrix. That works currently since everything gets
decoded in to matrices, but that is internal to dtschema and could change.
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240401204354.1691845-1-robh@kernel.orgSigned-off-by: Vinod Koul <vkoul@kernel.org>

Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml

@@ -93,7 +93,7 @@ properties:
   data-width:
     $ref: /schemas/types.yaml#/definitions/uint32-array
     description: Data bus width per each DMA master in bytes.
-    items:
+    minItems: 1
     maxItems: 4
     items:
       enum: [4, 8, 16, 32]
@@ -106,7 +106,7 @@ properties:
       deprecated. It' usage is discouraged in favor of data-width one. Moreover
       the property incorrectly permits to define data-bus width of 8 and 16
       bits, which is impossible in accordance with DW DMAC IP-core data book.
-    items:
+    minItems: 1
     maxItems: 4
     items:
       enum:
@@ -123,7 +123,7 @@ properties:
     description: |
       LLP-based multi-block transfer supported by hardware per
       each DMA channel.
-    items:
+    minItems: 1
     maxItems: 8
     items:
       enum: [0, 1]
@@ -138,7 +138,7 @@ properties:
       will be from 1 to max-burst-len words. It's an array property with one
       cell per channel in the units determined by the value set in the
       CTLx.SRC_TR_WIDTH/CTLx.DST_TR_WIDTH fields (data width).
-    items:
+    minItems: 1
     maxItems: 8
     items:
       enum: [4, 8, 16, 32, 64, 128, 256]