Commit 801f823d authored by Paul Burton's avatar Paul Burton Committed by Ralf Baechle

MIPS: c-r4k: Fix size calc when avoiding IPIs for small icache flushes

Commit f70ddc07 ("MIPS: c-r4k: Avoid small flush_icache_range SMP
calls") adds checks to force use of hit-type cache ops for small icache
flushes where they are globalised & index-type cache ops aren't, in
order to avoid the overhead of IPIs in those cases. However it
calculated the size of the region being flushed incorrectly, subtracting
the end address from the start address rather than the reverse. This
would have led to an overflow with size wrapping round to some large
value, and likely to the special case for avoiding IPIs not actually
being hit.
Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Fixes: f70ddc07 ("MIPS: c-r4k: Avoid small flush_icache_range SMP calls")
Reviewed-by: default avatarJames Hogan <james.hogan@imgtec.com>
Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14211/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 3cbc6fc9
......@@ -800,7 +800,7 @@ static void r4k_flush_icache_range(unsigned long start, unsigned long end)
* If address-based cache ops don't require an SMP call, then
* use them exclusively for small flushes.
*/
size = start - end;
size = end - start;
cache_size = icache_size;
if (!cpu_has_ic_fills_f_dc) {
size *= 2;
......
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