Commit 80fa5d60 authored by Adrien Grassein's avatar Adrien Grassein Committed by Shawn Guo

arm64: dts: imx8mm-nitrogen-r2: add FlexSPI

Add FlexSPI description an pin muxing.
Signed-off-by: default avatarAdrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent b399c13f
...@@ -72,6 +72,12 @@ ethphy0: ethernet-phy@4 { ...@@ -72,6 +72,12 @@ ethphy0: ethernet-phy@4 {
}; };
}; };
&flexspi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexspi>;
status = "okay";
};
&i2c1 { &i2c1 {
clock-frequency = <100000>; clock-frequency = <100000>;
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -354,6 +360,17 @@ MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x159 ...@@ -354,6 +360,17 @@ MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x159
>; >;
}; };
pinctrl_flexspi: flexspigrp {
fsl,pins = <
MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
>;
};
pinctrl_hog: hoggrp { pinctrl_hog: hoggrp {
fsl,pins = < fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x09 MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x09
......
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