Commit 8192d24c authored by Cezary Rojewski's avatar Cezary Rojewski Committed by Mark Brown

ASoC: Intel: avs: Relax DSP core transition timings

To avoid any false positives when checking CPA after setting SPA, do a
short wait. For stall operation, give HW more time to propagate the
change before moving on.
Signed-off-by: default avatarCezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20220707124153.1858249-4-cezary.rojewski@intel.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 5f267aa4
...@@ -13,6 +13,7 @@ ...@@ -13,6 +13,7 @@
#define AVS_ADSPCS_INTERVAL_US 500 #define AVS_ADSPCS_INTERVAL_US 500
#define AVS_ADSPCS_TIMEOUT_US 50000 #define AVS_ADSPCS_TIMEOUT_US 50000
#define AVS_ADSPCS_DELAY_US 1000
int avs_dsp_core_power(struct avs_dev *adev, u32 core_mask, bool power) int avs_dsp_core_power(struct avs_dev *adev, u32 core_mask, bool power)
{ {
...@@ -26,6 +27,8 @@ int avs_dsp_core_power(struct avs_dev *adev, u32 core_mask, bool power) ...@@ -26,6 +27,8 @@ int avs_dsp_core_power(struct avs_dev *adev, u32 core_mask, bool power)
value = power ? mask : 0; value = power ? mask : 0;
snd_hdac_adsp_updatel(adev, AVS_ADSP_REG_ADSPCS, mask, value); snd_hdac_adsp_updatel(adev, AVS_ADSP_REG_ADSPCS, mask, value);
/* Delay the polling to avoid false positives. */
usleep_range(AVS_ADSPCS_DELAY_US, 2 * AVS_ADSPCS_DELAY_US);
mask = AVS_ADSPCS_CPA_MASK(core_mask); mask = AVS_ADSPCS_CPA_MASK(core_mask);
value = power ? mask : 0; value = power ? mask : 0;
...@@ -82,11 +85,15 @@ int avs_dsp_core_stall(struct avs_dev *adev, u32 core_mask, bool stall) ...@@ -82,11 +85,15 @@ int avs_dsp_core_stall(struct avs_dev *adev, u32 core_mask, bool stall)
reg, (reg & mask) == value, reg, (reg & mask) == value,
AVS_ADSPCS_INTERVAL_US, AVS_ADSPCS_INTERVAL_US,
AVS_ADSPCS_TIMEOUT_US); AVS_ADSPCS_TIMEOUT_US);
if (ret) if (ret) {
dev_err(adev->dev, "core_mask %d %sstall failed: %d\n", dev_err(adev->dev, "core_mask %d %sstall failed: %d\n",
core_mask, stall ? "" : "un", ret); core_mask, stall ? "" : "un", ret);
return ret; return ret;
}
/* Give HW time to propagate the change. */
usleep_range(AVS_ADSPCS_DELAY_US, 2 * AVS_ADSPCS_DELAY_US);
return 0;
} }
int avs_dsp_core_enable(struct avs_dev *adev, u32 core_mask) int avs_dsp_core_enable(struct avs_dev *adev, u32 core_mask)
......
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