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Commit 81bd644f authored by Shuming Fan's avatar Shuming Fan Committed by Mark Brown
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ASoC: rt1011: set tx/rx slots from tx/rx_mask in TDM case 

The TX/RX slot configuration use tx/rx_mask which requested
by the machine driver.
Signed-off-by: default avatarShuming Fan <shumingf@realtek.com>
Link: https://lore.kernel.org/r/20191016085754.11614-1-shumingf@realtek.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent a35716a9
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Showing with 160 additions and 5 deletions
sound/soc/codecs/rt1011.c
View file @ 81bd644f
......@@ -1805,8 +1805,8 @@ static int rt1011_set_tdm_slot(struct snd_soc_dai *dai,
struct snd_soc_component *component = dai->component;
struct snd_soc_dapm_context *dapm =
snd_soc_component_get_dapm(component);
unsigned int val = 0, tdm_en = 0;
int ret = 0;
unsigned int val = 0, tdm_en = 0, rx_slotnum, tx_slotnum;
int ret = 0, first_bit, last_bit;
snd_soc_dapm_mutex_lock(dapm);
if (rx_mask || tx_mask)
......@@ -1829,6 +1829,7 @@ static int rt1011_set_tdm_slot(struct snd_soc_dai *dai,
break;
default:
ret = -EINVAL;
goto _set_tdm_err_;
}
switch (slot_width) {
......@@ -1848,6 +1849,135 @@ static int rt1011_set_tdm_slot(struct snd_soc_dai *dai,
break;
default:
ret = -EINVAL;
goto _set_tdm_err_;
}
/* Rx slot configuration */
rx_slotnum = hweight_long(rx_mask);
first_bit = find_next_bit((unsigned long *)&rx_mask, 32, 0);
if (rx_slotnum > 1 || rx_slotnum == 0) {
ret = -EINVAL;
dev_dbg(component->dev, "too many rx slots or zero slot\n");
goto _set_tdm_err_;
}
switch (first_bit) {
case 0:
case 2:
case 4:
case 6:
snd_soc_component_update_bits(component,
RT1011_CROSS_BQ_SET_1, RT1011_MONO_LR_SEL_MASK,
RT1011_MONO_L_CHANNEL);
snd_soc_component_update_bits(component,
RT1011_TDM1_SET_4,
RT1011_TDM_I2S_TX_L_DAC1_1_MASK |
RT1011_TDM_I2S_TX_R_DAC1_1_MASK,
(first_bit << RT1011_TDM_I2S_TX_L_DAC1_1_SFT) |
((first_bit+1) << RT1011_TDM_I2S_TX_R_DAC1_1_SFT));
break;
case 1:
case 3:
case 5:
case 7:
snd_soc_component_update_bits(component,
RT1011_CROSS_BQ_SET_1, RT1011_MONO_LR_SEL_MASK,
RT1011_MONO_R_CHANNEL);
snd_soc_component_update_bits(component,
RT1011_TDM1_SET_4,
RT1011_TDM_I2S_TX_L_DAC1_1_MASK |
RT1011_TDM_I2S_TX_R_DAC1_1_MASK,
((first_bit-1) << RT1011_TDM_I2S_TX_L_DAC1_1_SFT) |
(first_bit << RT1011_TDM_I2S_TX_R_DAC1_1_SFT));
break;
default:
ret = -EINVAL;
goto _set_tdm_err_;
}
/* Tx slot configuration */
tx_slotnum = hweight_long(tx_mask);
first_bit = find_next_bit((unsigned long *)&tx_mask, 32, 0);
last_bit = find_last_bit((unsigned long *)&tx_mask, 32);
if (tx_slotnum > 2 || (last_bit-first_bit) > 1) {
ret = -EINVAL;
dev_dbg(component->dev, "too many tx slots or tx slot location error\n");
goto _set_tdm_err_;
}
if (tx_slotnum == 1) {
snd_soc_component_update_bits(component, RT1011_TDM1_SET_2,
RT1011_TDM_I2S_DOCK_ADCDAT_LEN_1_MASK |
RT1011_TDM_ADCDAT1_DATA_LOCATION, first_bit);
switch (first_bit) {
case 1:
snd_soc_component_update_bits(component,
RT1011_TDM1_SET_3,
RT1011_TDM_I2S_RX_ADC1_1_MASK,
RT1011_TDM_I2S_RX_ADC1_1_LL);
break;
case 3:
snd_soc_component_update_bits(component,
RT1011_TDM1_SET_3,
RT1011_TDM_I2S_RX_ADC2_1_MASK,
RT1011_TDM_I2S_RX_ADC2_1_LL);
break;
case 5:
snd_soc_component_update_bits(component,
RT1011_TDM1_SET_3,
RT1011_TDM_I2S_RX_ADC3_1_MASK,
RT1011_TDM_I2S_RX_ADC3_1_LL);
break;
case 7:
snd_soc_component_update_bits(component,
RT1011_TDM1_SET_3,
RT1011_TDM_I2S_RX_ADC4_1_MASK,
RT1011_TDM_I2S_RX_ADC4_1_LL);
break;
case 0:
snd_soc_component_update_bits(component,
RT1011_TDM1_SET_3,
RT1011_TDM_I2S_RX_ADC1_1_MASK, 0);
break;
case 2:
snd_soc_component_update_bits(component,
RT1011_TDM1_SET_3,
RT1011_TDM_I2S_RX_ADC2_1_MASK, 0);
break;
case 4:
snd_soc_component_update_bits(component,
RT1011_TDM1_SET_3,
RT1011_TDM_I2S_RX_ADC3_1_MASK, 0);
break;
case 6:
snd_soc_component_update_bits(component,
RT1011_TDM1_SET_3,
RT1011_TDM_I2S_RX_ADC4_1_MASK, 0);
break;
default:
ret = -EINVAL;
dev_dbg(component->dev,
"tx slot location error\n");
goto _set_tdm_err_;
}
} else if (tx_slotnum == 2) {
switch (first_bit) {
case 0:
case 2:
case 4:
case 6:
snd_soc_component_update_bits(component,
RT1011_TDM1_SET_2,
RT1011_TDM_I2S_DOCK_ADCDAT_LEN_1_MASK |
RT1011_TDM_ADCDAT1_DATA_LOCATION,
RT1011_TDM_I2S_DOCK_ADCDAT_2CH | first_bit);
break;
default:
ret = -EINVAL;
dev_dbg(component->dev,
"tx slot location should be paired and start from slot0/2/4/6\n");
goto _set_tdm_err_;
}
}
snd_soc_component_update_bits(component, RT1011_TDM1_SET_1,
......@@ -1860,10 +1990,12 @@ static int rt1011_set_tdm_slot(struct snd_soc_dai *dai,
RT1011_TDM_I2S_DOCK_EN_1_MASK, tdm_en);
snd_soc_component_update_bits(component, RT1011_TDM2_SET_2,
RT1011_TDM_I2S_DOCK_EN_2_MASK, tdm_en);
if (tx_slotnum)
snd_soc_component_update_bits(component, RT1011_TDM_TOTAL_SET,
RT1011_ADCDAT1_PIN_CONFIG | RT1011_ADCDAT2_PIN_CONFIG,
RT1011_ADCDAT1_OUTPUT | RT1011_ADCDAT2_OUTPUT);
_set_tdm_err_:
snd_soc_dapm_mutex_unlock(dapm);
return ret;
}
......
sound/soc/codecs/rt1011.h
View file @ 81bd644f
......@@ -460,6 +460,23 @@
#define RT1011_TDM_I2S_DOCK_EN_1_MASK (0x1 << 3)
#define RT1011_TDM_I2S_DOCK_EN_1_SFT 3
#define RT1011_TDM_I2S_DOCK_EN_1 (0x1 << 3)
#define RT1011_TDM_ADCDAT1_DATA_LOCATION (0x7 << 0)
/* TDM1 Setting-3 (0x0118) */
#define RT1011_TDM_I2S_RX_ADC1_1_MASK (0x3 << 6)
#define RT1011_TDM_I2S_RX_ADC2_1_MASK (0x3 << 4)
#define RT1011_TDM_I2S_RX_ADC3_1_MASK (0x3 << 2)
#define RT1011_TDM_I2S_RX_ADC4_1_MASK (0x3 << 0)
#define RT1011_TDM_I2S_RX_ADC1_1_LL (0x2 << 6)
#define RT1011_TDM_I2S_RX_ADC2_1_LL (0x2 << 4)
#define RT1011_TDM_I2S_RX_ADC3_1_LL (0x2 << 2)
#define RT1011_TDM_I2S_RX_ADC4_1_LL (0x2 << 0)
/* TDM1 Setting-4 (0x011a) */
#define RT1011_TDM_I2S_TX_L_DAC1_1_MASK (0x7 << 12)
#define RT1011_TDM_I2S_TX_R_DAC1_1_MASK (0x7 << 8)
#define RT1011_TDM_I2S_TX_L_DAC1_1_SFT 12
#define RT1011_TDM_I2S_TX_R_DAC1_1_SFT 8
/* TDM2 Setting-2 (0x0120) */
#define RT1011_TDM_I2S_DOCK_ADCDAT_LEN_2_MASK (0x7 << 13)
......@@ -585,6 +602,12 @@
#define RT1011_STP_T0_EN_BIT 6
#define RT1011_STP_T0_EN (0x1 << 6)
/* Cross Biquad Setting-1 (0x0702) */
#define RT1011_MONO_LR_SEL_MASK (0x3 << 5)
#define RT1011_MONO_L_CHANNEL (0x0 << 5)
#define RT1011_MONO_R_CHANNEL (0x1 << 5)
#define RT1011_MONO_LR_MIX_CHANNEL (0x2 << 5)
/* ClassD Internal Setting-1 (0x1300) */
#define RT1011_DRIVER_READY_SPK (0x1 << 12)
#define RT1011_DRIVER_READY_SPK_BIT 12
......
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