Commit 82089116 authored by Linus Walleij's avatar Linus Walleij

ARM: dts: Augment VGA connector bridge on PB11MPcore

The PL111 in the ARM reference platforms are connected to
"panels" that are actually dumb VGA DAC connector bridges.
Now that we can support the proper bridges in the DRM driver,
fix this up.

Cc: Mali DP Maintainers <malidp@foss.arm.com>
Reviewed-by: default avatarLiviu Dudau <liviu.dudau@arm.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 7928b2cb
...@@ -242,6 +242,49 @@ flash1@44000000 { ...@@ -242,6 +242,49 @@ flash1@44000000 {
bank-width = <4>; bank-width = <4>;
}; };
bridge {
compatible = "ti,ths8134a", "ti,ths8134";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
vga_bridge_in: endpoint {
remote-endpoint = <&clcd_pads>;
};
};
port@1 {
reg = <1>;
vga_bridge_out: endpoint {
remote-endpoint = <&vga_con_in>;
};
};
};
};
vga {
/*
* This DDC I2C is connected directly to the DVI portions
* of the connector, so it's not really working when the
* monitor is connected to the VGA connector.
*/
compatible = "vga-connector";
ddc-i2c-bus = <&i2c1>;
port {
vga_con_in: endpoint {
remote-endpoint = <&vga_bridge_out>;
};
};
};
soc { soc {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
...@@ -575,6 +618,13 @@ gpio2: gpio@10015000 { ...@@ -575,6 +618,13 @@ gpio2: gpio@10015000 {
clock-names = "apb_pclk"; clock-names = "apb_pclk";
}; };
i2c1: i2c@10016000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "arm,versatile-i2c";
reg = <0x10016000 0x1000>;
};
rtc: rtc@10017000 { rtc: rtc@10017000 {
compatible = "arm,pl031", "arm,primecell"; compatible = "arm,pl031", "arm,primecell";
reg = <0x10017000 0x1000>; reg = <0x10017000 0x1000>;
...@@ -609,37 +659,15 @@ clcd@10020000 { ...@@ -609,37 +659,15 @@ clcd@10020000 {
interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&oscclk4>, <&pclk>; clocks = <&oscclk4>, <&pclk>;
clock-names = "clcdclk", "apb_pclk"; clock-names = "clcdclk", "apb_pclk";
max-memory-bandwidth = <130000000>; /* 16bpp @ 63.5MHz */ /* 1024x768 16bpp @65MHz works fine */
max-memory-bandwidth = <95000000>;
port { port {
clcd_pads: endpoint { clcd_pads: endpoint {
remote-endpoint = <&clcd_panel>; remote-endpoint = <&vga_bridge_in>;
arm,pl11x,tft-r0g0b0-pads = <0 8 16>; arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
}; };
}; };
panel {
compatible = "panel-dpi";
port {
clcd_panel: endpoint {
remote-endpoint = <&clcd_pads>;
};
};
/* Standard 640x480 VGA timings */
panel-timing {
clock-frequency = <25175000>;
hactive = <640>;
hback-porch = <48>;
hfront-porch = <16>;
hsync-len = <96>;
vactive = <480>;
vback-porch = <33>;
vfront-porch = <10>;
vsync-len = <2>;
};
};
}; };
/* /*
......
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