Commit 82a68267 authored by Gregory CLEMENT's avatar Gregory CLEMENT Committed by Jason Cooper

ARM: dts: mvebu: Convert all the mvebu files to use the range property

This conversion will allow to keep 32 bits addresses for the internal
registers whereas the memory of the system will be 64 bits.
Later it will also ease the move of the mvebu-mbus driver to the
device tree support.
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent b18ea4dc
...@@ -30,11 +30,11 @@ memory { ...@@ -30,11 +30,11 @@ memory {
}; };
soc { soc {
serial@d0012000 { serial@12000 {
clock-frequency = <200000000>; clock-frequency = <200000000>;
status = "okay"; status = "okay";
}; };
sata@d00a0000 { sata@a0000 {
nr-ports = <2>; nr-ports = <2>;
status = "okay"; status = "okay";
}; };
...@@ -49,18 +49,18 @@ phy1: ethernet-phy@1 { ...@@ -49,18 +49,18 @@ phy1: ethernet-phy@1 {
}; };
}; };
ethernet@d0070000 { ethernet@70000 {
status = "okay"; status = "okay";
phy = <&phy0>; phy = <&phy0>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
}; };
ethernet@d0074000 { ethernet@74000 {
status = "okay"; status = "okay";
phy = <&phy1>; phy = <&phy1>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
}; };
mvsdio@d00d4000 { mvsdio@d4000 {
pinctrl-0 = <&sdio_pins1>; pinctrl-0 = <&sdio_pins1>;
pinctrl-names = "default"; pinctrl-names = "default";
/* /*
...@@ -75,15 +75,15 @@ mvsdio@d00d4000 { ...@@ -75,15 +75,15 @@ mvsdio@d00d4000 {
/* No CD or WP GPIOs */ /* No CD or WP GPIOs */
}; };
usb@d0050000 { usb@50000 {
status = "okay"; status = "okay";
}; };
usb@d0051000 { usb@51000 {
status = "okay"; status = "okay";
}; };
spi0: spi@d0010600 { spi0: spi@10600 {
status = "okay"; status = "okay";
spi-flash@0 { spi-flash@0 {
......
...@@ -25,11 +25,11 @@ memory { ...@@ -25,11 +25,11 @@ memory {
}; };
soc { soc {
serial@d0012000 { serial@12000 {
clock-frequency = <200000000>; clock-frequency = <200000000>;
status = "okay"; status = "okay";
}; };
timer@d0020300 { timer@20300 {
clock-frequency = <600000000>; clock-frequency = <600000000>;
status = "okay"; status = "okay";
}; };
...@@ -79,18 +79,18 @@ phy1: ethernet-phy@1 { ...@@ -79,18 +79,18 @@ phy1: ethernet-phy@1 {
reg = <1>; reg = <1>;
}; };
}; };
ethernet@d0070000 { ethernet@70000 {
status = "okay"; status = "okay";
phy = <&phy0>; phy = <&phy0>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
}; };
ethernet@d0074000 { ethernet@74000 {
status = "okay"; status = "okay";
phy = <&phy1>; phy = <&phy1>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
}; };
mvsdio@d00d4000 { mvsdio@d4000 {
pinctrl-0 = <&sdio_pins3>; pinctrl-0 = <&sdio_pins3>;
pinctrl-names = "default"; pinctrl-names = "default";
status = "okay"; status = "okay";
...@@ -100,15 +100,15 @@ mvsdio@d00d4000 { ...@@ -100,15 +100,15 @@ mvsdio@d00d4000 {
*/ */
}; };
usb@d0050000 { usb@50000 {
status = "okay"; status = "okay";
}; };
usb@d0051000 { usb@51000 {
status = "okay"; status = "okay";
}; };
i2c@d0011000 { i2c@11000 {
status = "okay"; status = "okay";
clock-frequency = <100000>; clock-frequency = <100000>;
pca9505: pca9505@25 { pca9505: pca9505@25 {
......
...@@ -28,11 +28,11 @@ memory { ...@@ -28,11 +28,11 @@ memory {
}; };
soc { soc {
serial@d0012000 { serial@12000 {
clock-frequency = <200000000>; clock-frequency = <200000000>;
status = "okay"; status = "okay";
}; };
sata@d00a0000 { sata@a0000 {
nr-ports = <2>; nr-ports = <2>;
status = "okay"; status = "okay";
}; };
...@@ -47,29 +47,29 @@ phy1: ethernet-phy@1 { ...@@ -47,29 +47,29 @@ phy1: ethernet-phy@1 {
}; };
}; };
ethernet@d0070000 { ethernet@70000 {
status = "okay"; status = "okay";
phy = <&phy0>; phy = <&phy0>;
phy-mode = "sgmii"; phy-mode = "sgmii";
}; };
ethernet@d0074000 { ethernet@74000 {
status = "okay"; status = "okay";
phy = <&phy1>; phy = <&phy1>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
}; };
mvsdio@d00d4000 { mvsdio@d4000 {
pinctrl-0 = <&sdio_pins1>; pinctrl-0 = <&sdio_pins1>;
pinctrl-names = "default"; pinctrl-names = "default";
status = "okay"; status = "okay";
/* No CD or WP GPIOs */ /* No CD or WP GPIOs */
}; };
usb@d0050000 { usb@50000 {
status = "okay"; status = "okay";
}; };
usb@d0051000 { usb@51000 {
status = "okay"; status = "okay";
}; };
}; };
......
...@@ -28,54 +28,55 @@ cpu@0 { ...@@ -28,54 +28,55 @@ cpu@0 {
}; };
}; };
soc { soc {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "simple-bus"; compatible = "simple-bus";
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
ranges; ranges = <0 0xd0000000 0x100000>;
mpic: interrupt-controller@d0020000 { mpic: interrupt-controller@20000 {
compatible = "marvell,mpic"; compatible = "marvell,mpic";
#interrupt-cells = <1>; #interrupt-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
interrupt-controller; interrupt-controller;
}; };
coherency-fabric@d0020200 { coherency-fabric@20200 {
compatible = "marvell,coherency-fabric"; compatible = "marvell,coherency-fabric";
reg = <0xd0020200 0xb0>, reg = <0x20200 0xb0>,
<0xd0021810 0x1c>; <0x21810 0x1c>;
}; };
serial@d0012000 { serial@12000 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0xd0012000 0x100>; reg = <0x12000 0x100>;
reg-shift = <2>; reg-shift = <2>;
interrupts = <41>; interrupts = <41>;
reg-io-width = <1>; reg-io-width = <1>;
status = "disabled"; status = "disabled";
}; };
serial@d0012100 { serial@12100 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0xd0012100 0x100>; reg = <0x12100 0x100>;
reg-shift = <2>; reg-shift = <2>;
interrupts = <42>; interrupts = <42>;
reg-io-width = <1>; reg-io-width = <1>;
status = "disabled"; status = "disabled";
}; };
timer@d0020300 { timer@20300 {
compatible = "marvell,armada-370-xp-timer"; compatible = "marvell,armada-370-xp-timer";
reg = <0xd0020300 0x30>, reg = <0x20300 0x30>,
<0xd0021040 0x30>; <0x21040 0x30>;
interrupts = <37>, <38>, <39>, <40>, <5>, <6>; interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
clocks = <&coreclk 2>; clocks = <&coreclk 2>;
}; };
sata@d00a0000 { sata@a0000 {
compatible = "marvell,orion-sata"; compatible = "marvell,orion-sata";
reg = <0xd00a0000 0x2400>; reg = <0xa0000 0x2400>;
interrupts = <55>; interrupts = <55>;
clocks = <&gateclk 15>, <&gateclk 30>; clocks = <&gateclk 15>, <&gateclk 30>;
clock-names = "0", "1"; clock-names = "0", "1";
...@@ -86,28 +87,28 @@ mdio { ...@@ -86,28 +87,28 @@ mdio {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "marvell,orion-mdio"; compatible = "marvell,orion-mdio";
reg = <0xd0072004 0x4>; reg = <0x72004 0x4>;
}; };
ethernet@d0070000 { ethernet@70000 {
compatible = "marvell,armada-370-neta"; compatible = "marvell,armada-370-neta";
reg = <0xd0070000 0x2500>; reg = <0x70000 0x2500>;
interrupts = <8>; interrupts = <8>;
clocks = <&gateclk 4>; clocks = <&gateclk 4>;
status = "disabled"; status = "disabled";
}; };
ethernet@d0074000 { ethernet@74000 {
compatible = "marvell,armada-370-neta"; compatible = "marvell,armada-370-neta";
reg = <0xd0074000 0x2500>; reg = <0x74000 0x2500>;
interrupts = <10>; interrupts = <10>;
clocks = <&gateclk 3>; clocks = <&gateclk 3>;
status = "disabled"; status = "disabled";
}; };
i2c0: i2c@d0011000 { i2c0: i2c@11000 {
compatible = "marvell,mv64xxx-i2c"; compatible = "marvell,mv64xxx-i2c";
reg = <0xd0011000 0x20>; reg = <0x11000 0x20>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <31>; interrupts = <31>;
...@@ -116,9 +117,9 @@ i2c0: i2c@d0011000 { ...@@ -116,9 +117,9 @@ i2c0: i2c@d0011000 {
status = "disabled"; status = "disabled";
}; };
i2c1: i2c@d0011100 { i2c1: i2c@11100 {
compatible = "marvell,mv64xxx-i2c"; compatible = "marvell,mv64xxx-i2c";
reg = <0xd0011100 0x20>; reg = <0x11100 0x20>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <32>; interrupts = <32>;
...@@ -129,35 +130,35 @@ i2c1: i2c@d0011100 { ...@@ -129,35 +130,35 @@ i2c1: i2c@d0011100 {
rtc@10300 { rtc@10300 {
compatible = "marvell,orion-rtc"; compatible = "marvell,orion-rtc";
reg = <0xd0010300 0x20>; reg = <0x10300 0x20>;
interrupts = <50>; interrupts = <50>;
}; };
mvsdio@d00d4000 { mvsdio@d4000 {
compatible = "marvell,orion-sdio"; compatible = "marvell,orion-sdio";
reg = <0xd00d4000 0x200>; reg = <0xd4000 0x200>;
interrupts = <54>; interrupts = <54>;
clocks = <&gateclk 17>; clocks = <&gateclk 17>;
status = "disabled"; status = "disabled";
}; };
usb@d0050000 { usb@50000 {
compatible = "marvell,orion-ehci"; compatible = "marvell,orion-ehci";
reg = <0xd0050000 0x500>; reg = <0x50000 0x500>;
interrupts = <45>; interrupts = <45>;
status = "disabled"; status = "disabled";
}; };
usb@d0051000 { usb@51000 {
compatible = "marvell,orion-ehci"; compatible = "marvell,orion-ehci";
reg = <0xd0051000 0x500>; reg = <0x51000 0x500>;
interrupts = <46>; interrupts = <46>;
status = "disabled"; status = "disabled";
}; };
spi0: spi@d0010600 { spi0: spi@10600 {
compatible = "marvell,orion-spi"; compatible = "marvell,orion-spi";
reg = <0xd0010600 0x28>; reg = <0x10600 0x28>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
cell-index = <0>; cell-index = <0>;
...@@ -166,9 +167,9 @@ spi0: spi@d0010600 { ...@@ -166,9 +167,9 @@ spi0: spi@d0010600 {
status = "disabled"; status = "disabled";
}; };
spi1: spi@d0010680 { spi1: spi@10680 {
compatible = "marvell,orion-spi"; compatible = "marvell,orion-spi";
reg = <0xd0010680 0x28>; reg = <0x10680 0x28>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
cell-index = <1>; cell-index = <1>;
...@@ -177,45 +178,45 @@ spi1: spi@d0010680 { ...@@ -177,45 +178,45 @@ spi1: spi@d0010680 {
status = "disabled"; status = "disabled";
}; };
devbus-bootcs@d0010400 { devbus-bootcs@10400 {
compatible = "marvell,mvebu-devbus"; compatible = "marvell,mvebu-devbus";
reg = <0xd0010400 0x8>; reg = <0x10400 0x8>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
clocks = <&coreclk 0>; clocks = <&coreclk 0>;
status = "disabled"; status = "disabled";
}; };
devbus-cs0@d0010408 { devbus-cs0@10408 {
compatible = "marvell,mvebu-devbus"; compatible = "marvell,mvebu-devbus";
reg = <0xd0010408 0x8>; reg = <0x10408 0x8>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
clocks = <&coreclk 0>; clocks = <&coreclk 0>;
status = "disabled"; status = "disabled";
}; };
devbus-cs1@d0010410 { devbus-cs1@10410 {
compatible = "marvell,mvebu-devbus"; compatible = "marvell,mvebu-devbus";
reg = <0xd0010410 0x8>; reg = <0x10410 0x8>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
clocks = <&coreclk 0>; clocks = <&coreclk 0>;
status = "disabled"; status = "disabled";
}; };
devbus-cs2@d0010418 { devbus-cs2@10418 {
compatible = "marvell,mvebu-devbus"; compatible = "marvell,mvebu-devbus";
reg = <0xd0010418 0x8>; reg = <0x10418 0x8>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
clocks = <&coreclk 0>; clocks = <&coreclk 0>;
status = "disabled"; status = "disabled";
}; };
devbus-cs3@d0010420 { devbus-cs3@10420 {
compatible = "marvell,mvebu-devbus"; compatible = "marvell,mvebu-devbus";
reg = <0xd0010420 0x8>; reg = <0x10420 0x8>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
clocks = <&coreclk 0>; clocks = <&coreclk 0>;
......
...@@ -28,14 +28,15 @@ aliases { ...@@ -28,14 +28,15 @@ aliases {
}; };
soc { soc {
mpic: interrupt-controller@d0020000 {
reg = <0xd0020a00 0x1d0>, mpic: interrupt-controller@20000 {
<0xd0021870 0x58>; reg = <0x20a00 0x1d0>,
<0x21870 0x58>;
}; };
system-controller@d0018200 { system-controller@18200 {
compatible = "marvell,armada-370-xp-system-controller"; compatible = "marvell,armada-370-xp-system-controller";
reg = <0xd0018200 0x100>; reg = <0x18200 0x100>;
}; };
L2: l2-cache { L2: l2-cache {
...@@ -47,7 +48,7 @@ L2: l2-cache { ...@@ -47,7 +48,7 @@ L2: l2-cache {
pinctrl { pinctrl {
compatible = "marvell,mv88f6710-pinctrl"; compatible = "marvell,mv88f6710-pinctrl";
reg = <0xd0018000 0x38>; reg = <0x18000 0x38>;
sdio_pins1: sdio-pins1 { sdio_pins1: sdio-pins1 {
marvell,pins = "mpp9", "mpp11", "mpp12", marvell,pins = "mpp9", "mpp11", "mpp12",
...@@ -68,9 +69,9 @@ sdio_pins3: sdio-pins3 { ...@@ -68,9 +69,9 @@ sdio_pins3: sdio-pins3 {
}; };
}; };
gpio0: gpio@d0018100 { gpio0: gpio@18100 {
compatible = "marvell,orion-gpio"; compatible = "marvell,orion-gpio";
reg = <0xd0018100 0x40>; reg = <0x18100 0x40>;
ngpios = <32>; ngpios = <32>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -79,9 +80,9 @@ gpio0: gpio@d0018100 { ...@@ -79,9 +80,9 @@ gpio0: gpio@d0018100 {
interrupts = <82>, <83>, <84>, <85>; interrupts = <82>, <83>, <84>, <85>;
}; };
gpio1: gpio@d0018140 { gpio1: gpio@18140 {
compatible = "marvell,orion-gpio"; compatible = "marvell,orion-gpio";
reg = <0xd0018140 0x40>; reg = <0x18140 0x40>;
ngpios = <32>; ngpios = <32>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -90,9 +91,9 @@ gpio1: gpio@d0018140 { ...@@ -90,9 +91,9 @@ gpio1: gpio@d0018140 {
interrupts = <87>, <88>, <89>, <90>; interrupts = <87>, <88>, <89>, <90>;
}; };
gpio2: gpio@d0018180 { gpio2: gpio@18180 {
compatible = "marvell,orion-gpio"; compatible = "marvell,orion-gpio";
reg = <0xd0018180 0x40>; reg = <0x18180 0x40>;
ngpios = <2>; ngpios = <2>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -101,23 +102,23 @@ gpio2: gpio@d0018180 { ...@@ -101,23 +102,23 @@ gpio2: gpio@d0018180 {
interrupts = <91>; interrupts = <91>;
}; };
coreclk: mvebu-sar@d0018230 { coreclk: mvebu-sar@18230 {
compatible = "marvell,armada-370-core-clock"; compatible = "marvell,armada-370-core-clock";
reg = <0xd0018230 0x08>; reg = <0x18230 0x08>;
#clock-cells = <1>; #clock-cells = <1>;
}; };
gateclk: clock-gating-control@d0018220 { gateclk: clock-gating-control@18220 {
compatible = "marvell,armada-370-gating-clock"; compatible = "marvell,armada-370-gating-clock";
reg = <0xd0018220 0x4>; reg = <0x18220 0x4>;
clocks = <&coreclk 0>; clocks = <&coreclk 0>;
#clock-cells = <1>; #clock-cells = <1>;
}; };
xor@d0060800 { xor@60800 {
compatible = "marvell,orion-xor"; compatible = "marvell,orion-xor";
reg = <0xd0060800 0x100 reg = <0x60800 0x100
0xd0060A00 0x100>; 0x60A00 0x100>;
status = "okay"; status = "okay";
xor00 { xor00 {
...@@ -133,10 +134,10 @@ xor01 { ...@@ -133,10 +134,10 @@ xor01 {
}; };
}; };
xor@d0060900 { xor@60900 {
compatible = "marvell,orion-xor"; compatible = "marvell,orion-xor";
reg = <0xd0060900 0x100 reg = <0x60900 0x100
0xd0060b00 0x100>; 0x60b00 0x100>;
status = "okay"; status = "okay";
xor10 { xor10 {
...@@ -152,18 +153,18 @@ xor11 { ...@@ -152,18 +153,18 @@ xor11 {
}; };
}; };
usb@d0050000 { usb@50000 {
clocks = <&coreclk 0>; clocks = <&coreclk 0>;
}; };
usb@d0051000 { usb@51000 {
clocks = <&coreclk 0>; clocks = <&coreclk 0>;
}; };
thermal@d0018300 { thermal@18300 {
compatible = "marvell,armada370-thermal"; compatible = "marvell,armada370-thermal";
reg = <0xd0018300 0x4 reg = <0x18300 0x4
0xd0018304 0x4>; 0x18304 0x4>;
status = "okay"; status = "okay";
}; };
...@@ -177,18 +178,18 @@ pcie-controller { ...@@ -177,18 +178,18 @@ pcie-controller {
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
reg = <0xd0040000 0x2000>, <0xd0080000 0x2000>; reg = <0x40000 0x2000>, <0x80000 0x2000>;
reg-names = "pcie0.0", "pcie1.0"; reg-names = "pcie0.0", "pcie1.0";
ranges = <0x82000000 0 0xd0040000 0xd0040000 0 0x00002000 /* Port 0.0 registers */ ranges = <0x82000000 0 0x40000 0x40000 0 0x00002000 /* Port 0.0 registers */
0x82000000 0 0xd0080000 0xd0080000 0 0x00002000 /* Port 1.0 registers */ 0x82000000 0 0x80000 0x80000 0 0x00002000 /* Port 1.0 registers */
0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */ 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */
0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */ 0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */
pcie@1,0 { pcie@1,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82000800 0 0xd0040000 0 0x2000>; assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
reg = <0x0800 0 0 0 0>; reg = <0x0800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
...@@ -204,7 +205,7 @@ pcie@1,0 { ...@@ -204,7 +205,7 @@ pcie@1,0 {
pcie@2,0 { pcie@2,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82002800 0 0xd0080000 0 0x2000>; assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
reg = <0x1000 0 0 0 0>; reg = <0x1000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
......
...@@ -30,24 +30,24 @@ memory { ...@@ -30,24 +30,24 @@ memory {
}; };
soc { soc {
serial@d0012000 { serial@12000 {
clock-frequency = <250000000>; clock-frequency = <250000000>;
status = "okay"; status = "okay";
}; };
serial@d0012100 { serial@12100 {
clock-frequency = <250000000>; clock-frequency = <250000000>;
status = "okay"; status = "okay";
}; };
serial@d0012200 { serial@12200 {
clock-frequency = <250000000>; clock-frequency = <250000000>;
status = "okay"; status = "okay";
}; };
serial@d0012300 { serial@12300 {
clock-frequency = <250000000>; clock-frequency = <250000000>;
status = "okay"; status = "okay";
}; };
sata@d00a0000 { sata@a0000 {
nr-ports = <2>; nr-ports = <2>;
status = "okay"; status = "okay";
}; };
...@@ -70,47 +70,47 @@ phy3: ethernet-phy@3 { ...@@ -70,47 +70,47 @@ phy3: ethernet-phy@3 {
}; };
}; };
ethernet@d0070000 { ethernet@70000 {
status = "okay"; status = "okay";
phy = <&phy0>; phy = <&phy0>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
}; };
ethernet@d0074000 { ethernet@74000 {
status = "okay"; status = "okay";
phy = <&phy1>; phy = <&phy1>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
}; };
ethernet@d0030000 { ethernet@30000 {
status = "okay"; status = "okay";
phy = <&phy2>; phy = <&phy2>;
phy-mode = "sgmii"; phy-mode = "sgmii";
}; };
ethernet@d0034000 { ethernet@34000 {
status = "okay"; status = "okay";
phy = <&phy3>; phy = <&phy3>;
phy-mode = "sgmii"; phy-mode = "sgmii";
}; };
mvsdio@d00d4000 { mvsdio@d4000 {
pinctrl-0 = <&sdio_pins>; pinctrl-0 = <&sdio_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
status = "okay"; status = "okay";
/* No CD or WP GPIOs */ /* No CD or WP GPIOs */
}; };
usb@d0050000 { usb@50000 {
status = "okay"; status = "okay";
}; };
usb@d0051000 { usb@51000 {
status = "okay"; status = "okay";
}; };
usb@d0052000 { usb@52000 {
status = "okay"; status = "okay";
}; };
spi0: spi@d0010600 { spi0: spi@10600 {
status = "okay"; status = "okay";
spi-flash@0 { spi-flash@0 {
......
...@@ -37,24 +37,24 @@ memory { ...@@ -37,24 +37,24 @@ memory {
}; };
soc { soc {
serial@d0012000 { serial@12000 {
clock-frequency = <250000000>; clock-frequency = <250000000>;
status = "okay"; status = "okay";
}; };
serial@d0012100 { serial@12100 {
clock-frequency = <250000000>; clock-frequency = <250000000>;
status = "okay"; status = "okay";
}; };
serial@d0012200 { serial@12200 {
clock-frequency = <250000000>; clock-frequency = <250000000>;
status = "okay"; status = "okay";
}; };
serial@d0012300 { serial@12300 {
clock-frequency = <250000000>; clock-frequency = <250000000>;
status = "okay"; status = "okay";
}; };
sata@d00a0000 { sata@a0000 {
nr-ports = <2>; nr-ports = <2>;
status = "okay"; status = "okay";
}; };
...@@ -77,28 +77,28 @@ phy3: ethernet-phy@3 { ...@@ -77,28 +77,28 @@ phy3: ethernet-phy@3 {
}; };
}; };
ethernet@d0070000 { ethernet@70000 {
status = "okay"; status = "okay";
phy = <&phy0>; phy = <&phy0>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
}; };
ethernet@d0074000 { ethernet@74000 {
status = "okay"; status = "okay";
phy = <&phy1>; phy = <&phy1>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
}; };
ethernet@d0030000 { ethernet@30000 {
status = "okay"; status = "okay";
phy = <&phy2>; phy = <&phy2>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
}; };
ethernet@d0034000 { ethernet@34000 {
status = "okay"; status = "okay";
phy = <&phy3>; phy = <&phy3>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
}; };
spi0: spi@d0010600 { spi0: spi@10600 {
status = "okay"; status = "okay";
spi-flash@0 { spi-flash@0 {
...@@ -110,7 +110,7 @@ spi-flash@0 { ...@@ -110,7 +110,7 @@ spi-flash@0 {
}; };
}; };
devbus-bootcs@d0010400 { devbus-bootcs@10400 {
status = "okay"; status = "okay";
ranges = <0 0xf0000000 0x1000000>; /* @addr 0xf000000, size 0x1000000 */ ranges = <0 0xf0000000 0x1000000>; /* @addr 0xf000000, size 0x1000000 */
......
...@@ -46,7 +46,7 @@ cpu@1 { ...@@ -46,7 +46,7 @@ cpu@1 {
soc { soc {
pinctrl { pinctrl {
compatible = "marvell,mv78230-pinctrl"; compatible = "marvell,mv78230-pinctrl";
reg = <0xd0018000 0x38>; reg = <0x18000 0x38>;
sdio_pins: sdio-pins { sdio_pins: sdio-pins {
marvell,pins = "mpp30", "mpp31", "mpp32", marvell,pins = "mpp30", "mpp31", "mpp32",
...@@ -55,9 +55,9 @@ sdio_pins: sdio-pins { ...@@ -55,9 +55,9 @@ sdio_pins: sdio-pins {
}; };
}; };
gpio0: gpio@d0018100 { gpio0: gpio@18100 {
compatible = "marvell,orion-gpio"; compatible = "marvell,orion-gpio";
reg = <0xd0018100 0x40>; reg = <0x18100 0x40>;
ngpios = <32>; ngpios = <32>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -66,9 +66,9 @@ gpio0: gpio@d0018100 { ...@@ -66,9 +66,9 @@ gpio0: gpio@d0018100 {
interrupts = <82>, <83>, <84>, <85>; interrupts = <82>, <83>, <84>, <85>;
}; };
gpio1: gpio@d0018140 { gpio1: gpio@18140 {
compatible = "marvell,orion-gpio"; compatible = "marvell,orion-gpio";
reg = <0xd0018140 0x40>; reg = <0x18140 0x40>;
ngpios = <17>; ngpios = <17>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -92,17 +92,17 @@ pcie-controller { ...@@ -92,17 +92,17 @@ pcie-controller {
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
ranges = <0x82000000 0 0xd0040000 0xd0040000 0 0x00002000 /* Port 0.0 registers */ ranges = <0x82000000 0 0x40000 0x40000 0 0x00002000 /* Port 0.0 registers */
0x82000000 0 0xd0042000 0xd0042000 0 0x00002000 /* Port 2.0 registers */ 0x82000000 0 0x42000 0x42000 0 0x00002000 /* Port 2.0 registers */
0x82000000 0 0xd0044000 0xd0044000 0 0x00002000 /* Port 0.1 registers */ 0x82000000 0 0x44000 0x44000 0 0x00002000 /* Port 0.1 registers */
0x82000000 0 0xd0048000 0xd0048000 0 0x00002000 /* Port 0.2 registers */ 0x82000000 0 0x48000 0x48000 0 0x00002000 /* Port 0.2 registers */
0x82000000 0 0xd004c000 0xd004c000 0 0x00002000 /* Port 0.3 registers */ 0x82000000 0 0x4c000 0x4c000 0 0x00002000 /* Port 0.3 registers */
0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */ 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */
0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */ 0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */
pcie@1,0 { pcie@1,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82000800 0 0xd0040000 0 0x2000>; assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
reg = <0x0800 0 0 0 0>; reg = <0x0800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
...@@ -118,7 +118,7 @@ pcie@1,0 { ...@@ -118,7 +118,7 @@ pcie@1,0 {
pcie@2,0 { pcie@2,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82000800 0 0xd0044000 0 0x2000>; assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
reg = <0x1000 0 0 0 0>; reg = <0x1000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
...@@ -134,7 +134,7 @@ pcie@2,0 { ...@@ -134,7 +134,7 @@ pcie@2,0 {
pcie@3,0 { pcie@3,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82000800 0 0xd0048000 0 0x2000>; assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
reg = <0x1800 0 0 0 0>; reg = <0x1800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
...@@ -150,7 +150,7 @@ pcie@3,0 { ...@@ -150,7 +150,7 @@ pcie@3,0 {
pcie@4,0 { pcie@4,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82000800 0 0xd004c000 0 0x2000>; assigned-addresses = <0x82000800 0 0x4c000 0 0x2000>;
reg = <0x2000 0 0 0 0>; reg = <0x2000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
...@@ -166,7 +166,7 @@ pcie@4,0 { ...@@ -166,7 +166,7 @@ pcie@4,0 {
pcie@9,0 { pcie@9,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82000800 0 0xd0042000 0 0x2000>; assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
reg = <0x4800 0 0 0 0>; reg = <0x4800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
......
...@@ -47,7 +47,7 @@ cpu@1 { ...@@ -47,7 +47,7 @@ cpu@1 {
soc { soc {
pinctrl { pinctrl {
compatible = "marvell,mv78260-pinctrl"; compatible = "marvell,mv78260-pinctrl";
reg = <0xd0018000 0x38>; reg = <0x18000 0x38>;
sdio_pins: sdio-pins { sdio_pins: sdio-pins {
marvell,pins = "mpp30", "mpp31", "mpp32", marvell,pins = "mpp30", "mpp31", "mpp32",
...@@ -56,9 +56,9 @@ sdio_pins: sdio-pins { ...@@ -56,9 +56,9 @@ sdio_pins: sdio-pins {
}; };
}; };
gpio0: gpio@d0018100 { gpio0: gpio@18100 {
compatible = "marvell,orion-gpio"; compatible = "marvell,orion-gpio";
reg = <0xd0018100 0x40>; reg = <0x18100 0x40>;
ngpios = <32>; ngpios = <32>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -67,9 +67,9 @@ gpio0: gpio@d0018100 { ...@@ -67,9 +67,9 @@ gpio0: gpio@d0018100 {
interrupts = <82>, <83>, <84>, <85>; interrupts = <82>, <83>, <84>, <85>;
}; };
gpio1: gpio@d0018140 { gpio1: gpio@18140 {
compatible = "marvell,orion-gpio"; compatible = "marvell,orion-gpio";
reg = <0xd0018140 0x40>; reg = <0x18140 0x40>;
ngpios = <32>; ngpios = <32>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -78,9 +78,9 @@ gpio1: gpio@d0018140 { ...@@ -78,9 +78,9 @@ gpio1: gpio@d0018140 {
interrupts = <87>, <88>, <89>, <90>; interrupts = <87>, <88>, <89>, <90>;
}; };
gpio2: gpio@d0018180 { gpio2: gpio@18180 {
compatible = "marvell,orion-gpio"; compatible = "marvell,orion-gpio";
reg = <0xd0018180 0x40>; reg = <0x18180 0x40>;
ngpios = <3>; ngpios = <3>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -89,9 +89,9 @@ gpio2: gpio@d0018180 { ...@@ -89,9 +89,9 @@ gpio2: gpio@d0018180 {
interrupts = <91>; interrupts = <91>;
}; };
ethernet@d0034000 { ethernet@34000 {
compatible = "marvell,armada-370-neta"; compatible = "marvell,armada-370-neta";
reg = <0xd0034000 0x2500>; reg = <0x34000 0x2500>;
interrupts = <14>; interrupts = <14>;
clocks = <&gateclk 1>; clocks = <&gateclk 1>;
status = "disabled"; status = "disabled";
...@@ -112,19 +112,19 @@ pcie-controller { ...@@ -112,19 +112,19 @@ pcie-controller {
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
ranges = <0x82000000 0 0xd0040000 0xd0040000 0 0x00002000 /* Port 0.0 registers */ ranges = <0x82000000 0 0x40000 0x40000 0 0x00002000 /* Port 0.0 registers */
0x82000000 0 0xd0042000 0xd0042000 0 0x00002000 /* Port 2.0 registers */ 0x82000000 0 0x42000 0x42000 0 0x00002000 /* Port 2.0 registers */
0x82000000 0 0xd0044000 0xd0044000 0 0x00002000 /* Port 0.1 registers */ 0x82000000 0 0x44000 0x44000 0 0x00002000 /* Port 0.1 registers */
0x82000000 0 0xd0048000 0xd0048000 0 0x00002000 /* Port 0.2 registers */ 0x82000000 0 0x48000 0x48000 0 0x00002000 /* Port 0.2 registers */
0x82000000 0 0xd004c000 0xd004c000 0 0x00002000 /* Port 0.3 registers */ 0x82000000 0 0x4c000 0x4c000 0 0x00002000 /* Port 0.3 registers */
0x82000000 0 0xd0080000 0xd0080000 0 0x00002000 /* Port 1.0 registers */ 0x82000000 0 0x80000 0x80000 0 0x00002000 /* Port 1.0 registers */
0x82000000 0 0xd0082000 0xd0082000 0 0x00002000 /* Port 3.0 registers */ 0x82000000 0 0x82000 0x82000 0 0x00002000 /* Port 3.0 registers */
0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */ 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */
0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */ 0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */
pcie@1,0 { pcie@1,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82000800 0 0xd0040000 0 0x2000>; assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
reg = <0x0800 0 0 0 0>; reg = <0x0800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
...@@ -140,7 +140,7 @@ pcie@1,0 { ...@@ -140,7 +140,7 @@ pcie@1,0 {
pcie@2,0 { pcie@2,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82000800 0 0xd0044000 0 0x2000>; assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
reg = <0x1000 0 0 0 0>; reg = <0x1000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
...@@ -156,7 +156,7 @@ pcie@2,0 { ...@@ -156,7 +156,7 @@ pcie@2,0 {
pcie@3,0 { pcie@3,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82000800 0 0xd0048000 0 0x2000>; assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
reg = <0x1800 0 0 0 0>; reg = <0x1800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
...@@ -172,7 +172,7 @@ pcie@3,0 { ...@@ -172,7 +172,7 @@ pcie@3,0 {
pcie@4,0 { pcie@4,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82000800 0 0xd004c000 0 0x2000>; assigned-addresses = <0x82000800 0 0x4c000 0 0x2000>;
reg = <0x2000 0 0 0 0>; reg = <0x2000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
...@@ -188,7 +188,7 @@ pcie@4,0 { ...@@ -188,7 +188,7 @@ pcie@4,0 {
pcie@9,0 { pcie@9,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82000800 0 0xd0042000 0 0x2000>; assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
reg = <0x4800 0 0 0 0>; reg = <0x4800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
...@@ -204,7 +204,7 @@ pcie@9,0 { ...@@ -204,7 +204,7 @@ pcie@9,0 {
pcie@10,0 { pcie@10,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82000800 0 0xd0082000 0 0x2000>; assigned-addresses = <0x82000800 0 0x82000 0 0x2000>;
reg = <0x5000 0 0 0 0>; reg = <0x5000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
......
...@@ -62,7 +62,7 @@ cpu@3 { ...@@ -62,7 +62,7 @@ cpu@3 {
soc { soc {
pinctrl { pinctrl {
compatible = "marvell,mv78460-pinctrl"; compatible = "marvell,mv78460-pinctrl";
reg = <0xd0018000 0x38>; reg = <0x18000 0x38>;
sdio_pins: sdio-pins { sdio_pins: sdio-pins {
marvell,pins = "mpp30", "mpp31", "mpp32", marvell,pins = "mpp30", "mpp31", "mpp32",
...@@ -71,9 +71,9 @@ sdio_pins: sdio-pins { ...@@ -71,9 +71,9 @@ sdio_pins: sdio-pins {
}; };
}; };
gpio0: gpio@d0018100 { gpio0: gpio@18100 {
compatible = "marvell,orion-gpio"; compatible = "marvell,orion-gpio";
reg = <0xd0018100 0x40>; reg = <0x18100 0x40>;
ngpios = <32>; ngpios = <32>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -82,9 +82,9 @@ gpio0: gpio@d0018100 { ...@@ -82,9 +82,9 @@ gpio0: gpio@d0018100 {
interrupts = <82>, <83>, <84>, <85>; interrupts = <82>, <83>, <84>, <85>;
}; };
gpio1: gpio@d0018140 { gpio1: gpio@18140 {
compatible = "marvell,orion-gpio"; compatible = "marvell,orion-gpio";
reg = <0xd0018140 0x40>; reg = <0x18140 0x40>;
ngpios = <32>; ngpios = <32>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -93,9 +93,9 @@ gpio1: gpio@d0018140 { ...@@ -93,9 +93,9 @@ gpio1: gpio@d0018140 {
interrupts = <87>, <88>, <89>, <90>; interrupts = <87>, <88>, <89>, <90>;
}; };
gpio2: gpio@d0018180 { gpio2: gpio@18180 {
compatible = "marvell,orion-gpio"; compatible = "marvell,orion-gpio";
reg = <0xd0018180 0x40>; reg = <0x18180 0x40>;
ngpios = <3>; ngpios = <3>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -104,9 +104,9 @@ gpio2: gpio@d0018180 { ...@@ -104,9 +104,9 @@ gpio2: gpio@d0018180 {
interrupts = <91>; interrupts = <91>;
}; };
ethernet@d0034000 { ethernet@34000 {
compatible = "marvell,armada-370-neta"; compatible = "marvell,armada-370-neta";
reg = <0xd0034000 0x2500>; reg = <0x34000 0x2500>;
interrupts = <14>; interrupts = <14>;
clocks = <&gateclk 1>; clocks = <&gateclk 1>;
status = "disabled"; status = "disabled";
...@@ -127,22 +127,22 @@ pcie-controller { ...@@ -127,22 +127,22 @@ pcie-controller {
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
ranges = <0x82000000 0 0xd0040000 0xd0040000 0 0x00002000 /* Port 0.0 registers */ ranges = <0x82000000 0 0x40000 0x40000 0 0x00002000 /* Port 0.0 registers */
0x82000000 0 0xd0042000 0xd0042000 0 0x00002000 /* Port 2.0 registers */ 0x82000000 0 0x42000 0x42000 0 0x00002000 /* Port 2.0 registers */
0x82000000 0 0xd0044000 0xd0044000 0 0x00002000 /* Port 0.1 registers */ 0x82000000 0 0x44000 0x44000 0 0x00002000 /* Port 0.1 registers */
0x82000000 0 0xd0048000 0xd0048000 0 0x00002000 /* Port 0.2 registers */ 0x82000000 0 0x48000 0x48000 0 0x00002000 /* Port 0.2 registers */
0x82000000 0 0xd004c000 0xd004c000 0 0x00002000 /* Port 0.3 registers */ 0x82000000 0 0x4c000 0x4c000 0 0x00002000 /* Port 0.3 registers */
0x82000000 0 0xd0080000 0xd0080000 0 0x00002000 /* Port 1.0 registers */ 0x82000000 0 0x80000 0x80000 0 0x00002000 /* Port 1.0 registers */
0x82000000 0 0xd0082000 0xd0082000 0 0x00002000 /* Port 3.0 registers */ 0x82000000 0 0x82000 0x82000 0 0x00002000 /* Port 3.0 registers */
0x82000000 0 0xd0084000 0xd0084000 0 0x00002000 /* Port 1.1 registers */ 0x82000000 0 0x84000 0x84000 0 0x00002000 /* Port 1.1 registers */
0x82000000 0 0xd0088000 0xd0088000 0 0x00002000 /* Port 1.2 registers */ 0x82000000 0 0x88000 0x88000 0 0x00002000 /* Port 1.2 registers */
0x82000000 0 0xd008c000 0xd008c000 0 0x00002000 /* Port 1.3 registers */ 0x82000000 0 0x8c000 0x8c000 0 0x00002000 /* Port 1.3 registers */
0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */ 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */
0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */ 0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */
pcie@1,0 { pcie@1,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82000800 0 0xd0040000 0 0x2000>; assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
reg = <0x0800 0 0 0 0>; reg = <0x0800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
...@@ -158,7 +158,7 @@ pcie@1,0 { ...@@ -158,7 +158,7 @@ pcie@1,0 {
pcie@2,0 { pcie@2,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82001000 0 0xd0044000 0 0x2000>; assigned-addresses = <0x82001000 0 0x44000 0 0x2000>;
reg = <0x1000 0 0 0 0>; reg = <0x1000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
...@@ -174,7 +174,7 @@ pcie@2,0 { ...@@ -174,7 +174,7 @@ pcie@2,0 {
pcie@3,0 { pcie@3,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82001800 0 0xd0048000 0 0x2000>; assigned-addresses = <0x82001800 0 0x48000 0 0x2000>;
reg = <0x1800 0 0 0 0>; reg = <0x1800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
...@@ -190,7 +190,7 @@ pcie@3,0 { ...@@ -190,7 +190,7 @@ pcie@3,0 {
pcie@4,0 { pcie@4,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82002000 0 0xd004c000 0 0x2000>; assigned-addresses = <0x82002000 0 0x4c000 0 0x2000>;
reg = <0x2000 0 0 0 0>; reg = <0x2000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
...@@ -206,7 +206,7 @@ pcie@4,0 { ...@@ -206,7 +206,7 @@ pcie@4,0 {
pcie@5,0 { pcie@5,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82002800 0 0xd0080000 0 0x2000>; assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
reg = <0x2800 0 0 0 0>; reg = <0x2800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
...@@ -222,7 +222,7 @@ pcie@5,0 { ...@@ -222,7 +222,7 @@ pcie@5,0 {
pcie@6,0 { pcie@6,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82003000 0 0xd0084000 0 0x2000>; assigned-addresses = <0x82003000 0 0x84000 0 0x2000>;
reg = <0x3000 0 0 0 0>; reg = <0x3000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
...@@ -238,7 +238,7 @@ pcie@6,0 { ...@@ -238,7 +238,7 @@ pcie@6,0 {
pcie@7,0 { pcie@7,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82003800 0 0xd0088000 0 0x2000>; assigned-addresses = <0x82003800 0 0x88000 0 0x2000>;
reg = <0x3800 0 0 0 0>; reg = <0x3800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
...@@ -254,7 +254,7 @@ pcie@7,0 { ...@@ -254,7 +254,7 @@ pcie@7,0 {
pcie@8,0 { pcie@8,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82004000 0 0xd008c000 0 0x2000>; assigned-addresses = <0x82004000 0 0x8c000 0 0x2000>;
reg = <0x4000 0 0 0 0>; reg = <0x4000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
...@@ -269,7 +269,7 @@ pcie@8,0 { ...@@ -269,7 +269,7 @@ pcie@8,0 {
}; };
pcie@9,0 { pcie@9,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82004800 0 0xd0042000 0 0x2000>; assigned-addresses = <0x82004800 0 0x42000 0 0x2000>;
reg = <0x4800 0 0 0 0>; reg = <0x4800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
...@@ -285,7 +285,7 @@ pcie@9,0 { ...@@ -285,7 +285,7 @@ pcie@9,0 {
pcie@10,0 { pcie@10,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82005000 0 0xd0082000 0 0x2000>; assigned-addresses = <0x82005000 0 0x82000 0 0x2000>;
reg = <0x5000 0 0 0 0>; reg = <0x5000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
......
...@@ -27,11 +27,11 @@ memory { ...@@ -27,11 +27,11 @@ memory {
}; };
soc { soc {
serial@d0012000 { serial@12000 {
clock-frequency = <250000000>; clock-frequency = <250000000>;
status = "okay"; status = "okay";
}; };
serial@d0012100 { serial@12100 {
clock-frequency = <250000000>; clock-frequency = <250000000>;
status = "okay"; status = "okay";
}; };
...@@ -96,31 +96,31 @@ phy3: ethernet-phy@3 { ...@@ -96,31 +96,31 @@ phy3: ethernet-phy@3 {
}; };
}; };
ethernet@d0070000 { ethernet@70000 {
status = "okay"; status = "okay";
phy = <&phy0>; phy = <&phy0>;
phy-mode = "sgmii"; phy-mode = "sgmii";
}; };
ethernet@d0074000 { ethernet@74000 {
status = "okay"; status = "okay";
phy = <&phy1>; phy = <&phy1>;
phy-mode = "sgmii"; phy-mode = "sgmii";
}; };
ethernet@d0030000 { ethernet@30000 {
status = "okay"; status = "okay";
phy = <&phy2>; phy = <&phy2>;
phy-mode = "sgmii"; phy-mode = "sgmii";
}; };
ethernet@d0034000 { ethernet@34000 {
status = "okay"; status = "okay";
phy = <&phy3>; phy = <&phy3>;
phy-mode = "sgmii"; phy-mode = "sgmii";
}; };
i2c@d0011000 { i2c@11000 {
status = "okay"; status = "okay";
clock-frequency = <400000>; clock-frequency = <400000>;
}; };
i2c@d0011100 { i2c@11100 {
status = "okay"; status = "okay";
clock-frequency = <400000>; clock-frequency = <400000>;
...@@ -129,18 +129,18 @@ s35390a: s35390a@30 { ...@@ -129,18 +129,18 @@ s35390a: s35390a@30 {
reg = <0x30>; reg = <0x30>;
}; };
}; };
sata@d00a0000 { sata@a0000 {
nr-ports = <2>; nr-ports = <2>;
status = "okay"; status = "okay";
}; };
usb@d0050000 { usb@50000 {
status = "okay"; status = "okay";
}; };
usb@d0051000 { usb@51000 {
status = "okay"; status = "okay";
}; };
devbus-bootcs@d0010400 { devbus-bootcs@10400 {
status = "okay"; status = "okay";
ranges = <0 0xf0000000 0x8000000>; /* @addr 0xf000000, size 0x8000000 */ ranges = <0 0xf0000000 0x8000000>; /* @addr 0xf000000, size 0x8000000 */
......
...@@ -22,83 +22,84 @@ / { ...@@ -22,83 +22,84 @@ / {
model = "Marvell Armada XP family SoC"; model = "Marvell Armada XP family SoC";
compatible = "marvell,armadaxp", "marvell,armada-370-xp"; compatible = "marvell,armadaxp", "marvell,armada-370-xp";
soc { soc {
L2: l2-cache { L2: l2-cache {
compatible = "marvell,aurora-system-cache"; compatible = "marvell,aurora-system-cache";
reg = <0xd0008000 0x1000>; reg = <0x08000 0x1000>;
cache-id-part = <0x100>; cache-id-part = <0x100>;
wt-override; wt-override;
}; };
mpic: interrupt-controller@d0020000 { mpic: interrupt-controller@20000 {
reg = <0xd0020a00 0x2d0>, reg = <0x20a00 0x2d0>,
<0xd0021070 0x58>; <0x21070 0x58>;
}; };
armada-370-xp-pmsu@d0022000 { armada-370-xp-pmsu@22000 {
compatible = "marvell,armada-370-xp-pmsu"; compatible = "marvell,armada-370-xp-pmsu";
reg = <0xd0022100 0x430>, reg = <0x22100 0x430>,
<0xd0020800 0x20>; <0x20800 0x20>;
}; };
serial@d0012200 { serial@12200 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0xd0012200 0x100>; reg = <0x12200 0x100>;
reg-shift = <2>; reg-shift = <2>;
interrupts = <43>; interrupts = <43>;
reg-io-width = <1>; reg-io-width = <1>;
status = "disabled"; status = "disabled";
}; };
serial@d0012300 { serial@12300 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0xd0012300 0x100>; reg = <0x12300 0x100>;
reg-shift = <2>; reg-shift = <2>;
interrupts = <44>; interrupts = <44>;
reg-io-width = <1>; reg-io-width = <1>;
status = "disabled"; status = "disabled";
}; };
timer@d0020300 { timer@20300 {
marvell,timer-25Mhz; marvell,timer-25Mhz;
}; };
coreclk: mvebu-sar@d0018230 { coreclk: mvebu-sar@18230 {
compatible = "marvell,armada-xp-core-clock"; compatible = "marvell,armada-xp-core-clock";
reg = <0xd0018230 0x08>; reg = <0x18230 0x08>;
#clock-cells = <1>; #clock-cells = <1>;
}; };
cpuclk: clock-complex@d0018700 { cpuclk: clock-complex@18700 {
#clock-cells = <1>; #clock-cells = <1>;
compatible = "marvell,armada-xp-cpu-clock"; compatible = "marvell,armada-xp-cpu-clock";
reg = <0xd0018700 0xA0>; reg = <0x18700 0xA0>;
clocks = <&coreclk 1>; clocks = <&coreclk 1>;
}; };
gateclk: clock-gating-control@d0018220 { gateclk: clock-gating-control@18220 {
compatible = "marvell,armada-xp-gating-clock"; compatible = "marvell,armada-xp-gating-clock";
reg = <0xd0018220 0x4>; reg = <0x18220 0x4>;
clocks = <&coreclk 0>; clocks = <&coreclk 0>;
#clock-cells = <1>; #clock-cells = <1>;
}; };
system-controller@d0018200 { system-controller@18200 {
compatible = "marvell,armada-370-xp-system-controller"; compatible = "marvell,armada-370-xp-system-controller";
reg = <0xd0018200 0x500>; reg = <0x18200 0x500>;
}; };
ethernet@d0030000 { ethernet@30000 {
compatible = "marvell,armada-370-neta"; compatible = "marvell,armada-370-neta";
reg = <0xd0030000 0x2500>; reg = <0x30000 0x2500>;
interrupts = <12>; interrupts = <12>;
clocks = <&gateclk 2>; clocks = <&gateclk 2>;
status = "disabled"; status = "disabled";
}; };
xor@d0060900 { xor@60900 {
compatible = "marvell,orion-xor"; compatible = "marvell,orion-xor";
reg = <0xd0060900 0x100 reg = <0x60900 0x100
0xd0060b00 0x100>; 0x60b00 0x100>;
clocks = <&gateclk 22>; clocks = <&gateclk 22>;
status = "okay"; status = "okay";
...@@ -115,10 +116,10 @@ xor11 { ...@@ -115,10 +116,10 @@ xor11 {
}; };
}; };
xor@d00f0900 { xor@f0900 {
compatible = "marvell,orion-xor"; compatible = "marvell,orion-xor";
reg = <0xd00F0900 0x100 reg = <0xF0900 0x100
0xd00F0B00 0x100>; 0xF0B00 0x100>;
clocks = <&gateclk 28>; clocks = <&gateclk 28>;
status = "okay"; status = "okay";
...@@ -135,26 +136,26 @@ xor01 { ...@@ -135,26 +136,26 @@ xor01 {
}; };
}; };
usb@d0050000 { usb@50000 {
clocks = <&gateclk 18>; clocks = <&gateclk 18>;
}; };
usb@d0051000 { usb@51000 {
clocks = <&gateclk 19>; clocks = <&gateclk 19>;
}; };
usb@d0052000 { usb@52000 {
compatible = "marvell,orion-ehci"; compatible = "marvell,orion-ehci";
reg = <0xd0052000 0x500>; reg = <0x52000 0x500>;
interrupts = <47>; interrupts = <47>;
clocks = <&gateclk 20>; clocks = <&gateclk 20>;
status = "disabled"; status = "disabled";
}; };
thermal@d00182b0 { thermal@182b0 {
compatible = "marvell,armadaxp-thermal"; compatible = "marvell,armadaxp-thermal";
reg = <0xd00182b0 0x4 reg = <0x182b0 0x4
0xd00184d0 0x4>; 0x184d0 0x4>;
status = "okay"; status = "okay";
}; };
}; };
......
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