Commit 842f2fed authored by Alexander Graf's avatar Alexander Graf Committed by Benjamin Herrenschmidt

Make head_64.S aware of KVM real mode code

We need to run some KVM trampoline code in real mode. Unfortunately, real mode
only covers 8MB on Cell so we need to squeeze ourselves as low as possible.

Also, we need to trap interrupts to get us back from guest state to host state
without telling Linux about it.

This patch adds interrupt traps and includes the KVM code that requires real
mode in the real mode parts of Linux.
Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent 513579e3
...@@ -147,6 +147,7 @@ ...@@ -147,6 +147,7 @@
.globl label##_pSeries; \ .globl label##_pSeries; \
label##_pSeries: \ label##_pSeries: \
HMT_MEDIUM; \ HMT_MEDIUM; \
DO_KVM n; \
mtspr SPRN_SPRG_SCRATCH0,r13; /* save r13 */ \ mtspr SPRN_SPRG_SCRATCH0,r13; /* save r13 */ \
EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common) EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
...@@ -170,6 +171,7 @@ label##_pSeries: \ ...@@ -170,6 +171,7 @@ label##_pSeries: \
.globl label##_pSeries; \ .globl label##_pSeries; \
label##_pSeries: \ label##_pSeries: \
HMT_MEDIUM; \ HMT_MEDIUM; \
DO_KVM n; \
mtspr SPRN_SPRG_SCRATCH0,r13; /* save r13 */ \ mtspr SPRN_SPRG_SCRATCH0,r13; /* save r13 */ \
mfspr r13,SPRN_SPRG_PACA; /* get paca address into r13 */ \ mfspr r13,SPRN_SPRG_PACA; /* get paca address into r13 */ \
std r9,PACA_EXGEN+EX_R9(r13); /* save r9, r10 */ \ std r9,PACA_EXGEN+EX_R9(r13); /* save r9, r10 */ \
......
...@@ -41,6 +41,7 @@ __start_interrupts: ...@@ -41,6 +41,7 @@ __start_interrupts:
. = 0x200 . = 0x200
_machine_check_pSeries: _machine_check_pSeries:
HMT_MEDIUM HMT_MEDIUM
DO_KVM 0x200
mtspr SPRN_SPRG_SCRATCH0,r13 /* save r13 */ mtspr SPRN_SPRG_SCRATCH0,r13 /* save r13 */
EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common) EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common)
...@@ -48,6 +49,7 @@ _machine_check_pSeries: ...@@ -48,6 +49,7 @@ _machine_check_pSeries:
.globl data_access_pSeries .globl data_access_pSeries
data_access_pSeries: data_access_pSeries:
HMT_MEDIUM HMT_MEDIUM
DO_KVM 0x300
mtspr SPRN_SPRG_SCRATCH0,r13 mtspr SPRN_SPRG_SCRATCH0,r13
BEGIN_FTR_SECTION BEGIN_FTR_SECTION
mfspr r13,SPRN_SPRG_PACA mfspr r13,SPRN_SPRG_PACA
...@@ -77,6 +79,7 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_SLB) ...@@ -77,6 +79,7 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_SLB)
.globl data_access_slb_pSeries .globl data_access_slb_pSeries
data_access_slb_pSeries: data_access_slb_pSeries:
HMT_MEDIUM HMT_MEDIUM
DO_KVM 0x380
mtspr SPRN_SPRG_SCRATCH0,r13 mtspr SPRN_SPRG_SCRATCH0,r13
mfspr r13,SPRN_SPRG_PACA /* get paca address into r13 */ mfspr r13,SPRN_SPRG_PACA /* get paca address into r13 */
std r3,PACA_EXSLB+EX_R3(r13) std r3,PACA_EXSLB+EX_R3(r13)
...@@ -115,6 +118,7 @@ data_access_slb_pSeries: ...@@ -115,6 +118,7 @@ data_access_slb_pSeries:
.globl instruction_access_slb_pSeries .globl instruction_access_slb_pSeries
instruction_access_slb_pSeries: instruction_access_slb_pSeries:
HMT_MEDIUM HMT_MEDIUM
DO_KVM 0x480
mtspr SPRN_SPRG_SCRATCH0,r13 mtspr SPRN_SPRG_SCRATCH0,r13
mfspr r13,SPRN_SPRG_PACA /* get paca address into r13 */ mfspr r13,SPRN_SPRG_PACA /* get paca address into r13 */
std r3,PACA_EXSLB+EX_R3(r13) std r3,PACA_EXSLB+EX_R3(r13)
...@@ -154,6 +158,7 @@ instruction_access_slb_pSeries: ...@@ -154,6 +158,7 @@ instruction_access_slb_pSeries:
.globl system_call_pSeries .globl system_call_pSeries
system_call_pSeries: system_call_pSeries:
HMT_MEDIUM HMT_MEDIUM
DO_KVM 0xc00
BEGIN_FTR_SECTION BEGIN_FTR_SECTION
cmpdi r0,0x1ebe cmpdi r0,0x1ebe
beq- 1f beq- 1f
...@@ -186,12 +191,15 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) ...@@ -186,12 +191,15 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)
* trickery is thus necessary * trickery is thus necessary
*/ */
. = 0xf00 . = 0xf00
DO_KVM 0xf00
b performance_monitor_pSeries b performance_monitor_pSeries
. = 0xf20 . = 0xf20
DO_KVM 0xf20
b altivec_unavailable_pSeries b altivec_unavailable_pSeries
. = 0xf40 . = 0xf40
DO_KVM 0xf40
b vsx_unavailable_pSeries b vsx_unavailable_pSeries
#ifdef CONFIG_CBE_RAS #ifdef CONFIG_CBE_RAS
......
...@@ -37,6 +37,7 @@ ...@@ -37,6 +37,7 @@
#include <asm/firmware.h> #include <asm/firmware.h>
#include <asm/page_64.h> #include <asm/page_64.h>
#include <asm/irqflags.h> #include <asm/irqflags.h>
#include <asm/kvm_book3s_64_asm.h>
/* The physical memory is layed out such that the secondary processor /* The physical memory is layed out such that the secondary processor
* spin code sits at 0x0000...0x00ff. On server, the vectors follow * spin code sits at 0x0000...0x00ff. On server, the vectors follow
...@@ -165,6 +166,12 @@ exception_marker: ...@@ -165,6 +166,12 @@ exception_marker:
#include "exceptions-64s.S" #include "exceptions-64s.S"
#endif #endif
/* KVM trampoline code needs to be close to the interrupt handlers */
#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
#include "../kvm/book3s_64_rmhandlers.S"
#endif
_GLOBAL(generic_secondary_thread_init) _GLOBAL(generic_secondary_thread_init)
mr r24,r3 mr r24,r3
......
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