Commit 86d4ac2c authored by Nick Chan's avatar Nick Chan Committed by Greg Kroah-Hartman

tty: serial: samsung: Fix A7-A11 serial earlycon SError

Apple's earlier SoCs, like A7-A11, requires 32-bit writes for the serial
port. Otherwise, a SError happens when writing to UTXH (+0x20). This only
manifested in earlycon as reg-io-width in the device tree is consulted
for normal serial writes.

Change the iotype of the port to UPIO_MEM32, to allow the serial port to
function on A7-A11 SoCs. This change does not appear to affect Apple M1 and
above.
Reviewed-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: default avatarNeal Gompa <neal@gompa.dev>
Tested-by: default avatarJanne Grunau <j@jannau.net>
Signed-off-by: default avatarNick Chan <towinchenmi@gmail.com>
Reviewed-by: default avatarAndi Shyti <andi.shyti@kernel.org>
Link: https://lore.kernel.org/r/20240911050741.14477-3-towinchenmi@gmail.comSigned-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 4c59c59e
...@@ -2536,7 +2536,7 @@ static const struct s3c24xx_serial_drv_data s5l_serial_drv_data = { ...@@ -2536,7 +2536,7 @@ static const struct s3c24xx_serial_drv_data s5l_serial_drv_data = {
.name = "Apple S5L UART", .name = "Apple S5L UART",
.type = TYPE_APPLE_S5L, .type = TYPE_APPLE_S5L,
.port_type = PORT_8250, .port_type = PORT_8250,
.iotype = UPIO_MEM, .iotype = UPIO_MEM32,
.fifosize = 16, .fifosize = 16,
.rx_fifomask = S3C2410_UFSTAT_RXMASK, .rx_fifomask = S3C2410_UFSTAT_RXMASK,
.rx_fifoshift = S3C2410_UFSTAT_RXSHIFT, .rx_fifoshift = S3C2410_UFSTAT_RXSHIFT,
...@@ -2822,6 +2822,9 @@ OF_EARLYCON_DECLARE(gs101, "google,gs101-uart", gs101_early_console_setup); ...@@ -2822,6 +2822,9 @@ OF_EARLYCON_DECLARE(gs101, "google,gs101-uart", gs101_early_console_setup);
static int __init apple_s5l_early_console_setup(struct earlycon_device *device, static int __init apple_s5l_early_console_setup(struct earlycon_device *device,
const char *opt) const char *opt)
{ {
/* Apple A7-A11 requires MMIO32 register accesses. */
device->port.iotype = UPIO_MEM32;
/* Close enough to S3C2410 for earlycon... */ /* Close enough to S3C2410 for earlycon... */
device->port.private_data = &s3c2410_early_console_data; device->port.private_data = &s3c2410_early_console_data;
......
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