Commit 87ba7fea authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher

drm/amdgpu: switch to query reserved fb size from vbios (v3)

For Sienna_Cichlid, query fw_reserved_fb_size from vbios directly.
For navi1x, fall back to default 64K TMR size.
For pre-navi, no need to reserve tmr region in top LFB.

v2: fix TMR define (Alex)
v3: partially revert size change
Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9a244ebe
...@@ -58,6 +58,7 @@ ...@@ -58,6 +58,7 @@
#include "amdgpu_amdkfd.h" #include "amdgpu_amdkfd.h"
#include "amdgpu_sdma.h" #include "amdgpu_sdma.h"
#include "amdgpu_ras.h" #include "amdgpu_ras.h"
#include "amdgpu_atomfirmware.h"
#include "bif/bif_4_1_d.h" #include "bif/bif_4_1_d.h"
#define AMDGPU_TTM_VRAM_MAX_DW_READ (size_t)128 #define AMDGPU_TTM_VRAM_MAX_DW_READ (size_t)128
...@@ -1960,6 +1961,16 @@ int amdgpu_ttm_init(struct amdgpu_device *adev) ...@@ -1960,6 +1961,16 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
* reserve TMR memory at the top of VRAM which holds * reserve TMR memory at the top of VRAM which holds
* IP Discovery data and is protected by PSP. * IP Discovery data and is protected by PSP.
*/ */
adev->discovery_tmr_size =
amdgpu_atomfirmware_get_fw_reserved_fb_size(adev);
if (!adev->discovery_tmr_size &&
adev->asic_type >= CHIP_NAVI10 &&
amdgpu_discovery) {
/* if fw_reserved_fb_size is 0 from vbios,
* then fallback to the default tmr_size */
adev->discovery_tmr_size = DISCOVERY_TMR_SIZE;
}
if (adev->discovery_tmr_size > 0) { if (adev->discovery_tmr_size > 0) {
r = amdgpu_bo_create_kernel_at(adev, r = amdgpu_bo_create_kernel_at(adev,
adev->gmc.real_vram_size - adev->discovery_tmr_size, adev->gmc.real_vram_size - adev->discovery_tmr_size,
......
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