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Commit 8864eaca authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge branch 'mmp/multiplatform' into next/multiplatform 

* mmp/multiplatform:
  ARM: mmp: avoid unused functions
  ARM: mmp: move into ARCH_MULTIPLATFORM
  ARM: mmp: make all header files local
  ARM: mmp: make plat-pxa build standalone
  ARM: mmp: remove remaining legacy pxa-dma support
  ARM: mohawk: allow building with MMU disabled
  ARM: make xscale iwmmxt code multiplatform aware
  clk: mmp: stop using platform headers
parents fb4f0424 84f45ee9
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Showing with 225 additions and 285 deletions
arch/arm/Kconfig
View file @ 8864eaca
......@@ -546,22 +546,6 @@ config ARCH_ORION5X
Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
Orion-2 (5281), Orion-1-90 (6183).
config ARCH_MMP
bool "Marvell PXA168/910/MMP2"
depends on MMU
select ARCH_REQUIRE_GPIOLIB
select CLKDEV_LOOKUP
select GENERIC_ALLOCATOR
select GENERIC_CLOCKEVENTS
select GPIO_PXA
select IRQ_DOMAIN
select MULTI_IRQ_HANDLER
select PINCTRL
select PLAT_PXA
select SPARSE_IRQ
help
Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
config ARCH_KS8695
bool "Micrel/Kendin KS8695"
select ARCH_REQUIRE_GPIOLIB
......
arch/arm/include/asm/cputype.h
View file @ 8864eaca
......@@ -228,10 +228,26 @@ static inline int cpu_is_xsc3(void)
}
#endif
#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
#define cpu_is_xscale() 0
#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3) && \
!defined(CONFIG_CPU_MOHAWK)
#define cpu_is_xscale_family() 0
#else
#define cpu_is_xscale() 1
static inline int cpu_is_xscale_family(void)
{
unsigned int id;
id = read_cpuid_id() & 0xffffe000;
switch (id) {
case 0x69052000: /* Intel XScale 1 */
case 0x69054000: /* Intel XScale 2 */
case 0x69056000: /* Intel XScale 3 */
case 0x56056000: /* Marvell XScale 3 */
case 0x56158000: /* Marvell Mohawk */
return 1;
}
return 0;
}
#endif
/*
......
arch/arm/kernel/xscale-cp0.c
View file @ 8864eaca
......@@ -15,6 +15,9 @@
#include <linux/init.h>
#include <linux/io.h>
#include <asm/thread_notify.h>
#include <asm/cputype.h>
asm(" .arch armv5te\n");
static inline void dsp_save_state(u32 *state)
{
......@@ -152,6 +155,10 @@ static int __init xscale_cp0_init(void)
{
u32 cp_access;
/* do not attempt to probe iwmmxt on non-xscale family CPUs */
if (!cpu_is_xscale_family())
return 0;
cp_access = xscale_cp_access_read() & ~3;
xscale_cp_access_write(cp_access | 1);
......
arch/arm/mach-mmp/Kconfig
View file @ 8864eaca
menuconfig ARCH_MMP
bool "Marvell PXA168/910/MMP2"
depends on ARCH_MULTI_V5 || ARCH_MULTI_V7
select ARCH_REQUIRE_GPIOLIB
select GPIO_PXA
select PINCTRL
select PLAT_PXA
help
Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
if ARCH_MMP
menu "Marvell PXA168/910/MMP2 Implmentations"
menu "Marvell PXA168/910/MMP2 Implementations"
if ATAGS
config MACH_ASPENITE
bool "Marvell's PXA168 Aspenite Development Board"
depends on ARCH_MULTI_V5
select CPU_PXA168
help
Say 'Y' here if you want to support the Marvell PXA168-based
......@@ -11,6 +24,7 @@ config MACH_ASPENITE
config MACH_ZYLONITE2
bool "Marvell's PXA168 Zylonite2 Development Board"
depends on ARCH_MULTI_V5
select CPU_PXA168
help
Say 'Y' here if you want to support the Marvell PXA168-based
......@@ -18,6 +32,7 @@ config MACH_ZYLONITE2
config MACH_AVENGERS_LITE
bool "Marvell's PXA168 Avengers Lite Development Board"
depends on ARCH_MULTI_V5
select CPU_PXA168
help
Say 'Y' here if you want to support the Marvell PXA168-based
......@@ -25,6 +40,7 @@ config MACH_AVENGERS_LITE
config MACH_TAVOREVB
bool "Marvell's PXA910 TavorEVB Development Board"
depends on ARCH_MULTI_V5
select CPU_PXA910
help
Say 'Y' here if you want to support the Marvell PXA910-based
......@@ -32,6 +48,7 @@ config MACH_TAVOREVB
config MACH_TTC_DKB
bool "Marvell's PXA910 TavorEVB Development Board"
depends on ARCH_MULTI_V5
select CPU_PXA910
help
Say 'Y' here if you want to support the Marvell PXA910-based
......@@ -39,7 +56,7 @@ config MACH_TTC_DKB
config MACH_BROWNSTONE
bool "Marvell's Brownstone Development Platform"
depends on !CPU_MOHAWK
depends on ARCH_MULTI_V7
select CPU_MMP2
help
Say 'Y' here if you want to support the Marvell MMP2-based
......@@ -50,7 +67,7 @@ config MACH_BROWNSTONE
config MACH_FLINT
bool "Marvell's Flint Development Platform"
depends on !CPU_MOHAWK
depends on ARCH_MULTI_V7
select CPU_MMP2
help
Say 'Y' here if you want to support the Marvell MMP2-based
......@@ -61,7 +78,7 @@ config MACH_FLINT
config MACH_MARVELL_JASPER
bool "Marvell's Jasper Development Platform"
depends on !CPU_MOHAWK
depends on ARCH_MULTI_V7
select CPU_MMP2
help
Say 'Y' here if you want to support the Marvell MMP2-base
......@@ -72,6 +89,7 @@ config MACH_MARVELL_JASPER
config MACH_TETON_BGA
bool "Marvell's PXA168 Teton BGA Development Board"
depends on ARCH_MULTI_V5
select CPU_PXA168
help
Say 'Y' here if you want to support the Marvell PXA168-based
......@@ -79,14 +97,16 @@ config MACH_TETON_BGA
config MACH_GPLUGD
bool "Marvell's PXA168 GuruPlug Display (gplugD) Board"
depends on ARCH_MULTI_V5
select CPU_PXA168
help
Say 'Y' here if you want to support the Marvell PXA168-based
GuruPlug Display (gplugD) Board
endif
config MACH_MMP_DT
bool "Support MMP (ARMv5) platforms from device tree"
select USE_OF
depends on ARCH_MULTI_V5
select PINCTRL
select PINCTRL_SINGLE
select COMMON_CLK
......@@ -99,11 +119,9 @@ config MACH_MMP_DT
config MACH_MMP2_DT
bool "Support MMP2 (ARMv7) platforms from device tree"
depends on !CPU_MOHAWK
select USE_OF
depends on ARCH_MULTI_V7
select PINCTRL
select PINCTRL_SINGLE
select COMMON_CLK
select ARCH_HAS_RESET_CONTROLLER
select CPU_PJ4
help
......
arch/arm/mach-mmp/Makefile
View file @ 8864eaca
#
# Makefile for Marvell's PXA168 processors line
#
ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-pxa/include
obj-y += common.o devices.o time.o
......
arch/arm/mach-mmp/include/mach/addr-map.h → arch/arm/mach-mmp/addr-map.h
View file @ 8864eaca
/*
* linux/arch/arm/mach-mmp/include/mach/addr-map.h
*
* Common address map definitions
*
* This program is free software; you can redistribute it and/or modify
......
arch/arm/mach-mmp/aspenite.c
View file @ 8864eaca
......@@ -22,14 +22,14 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/addr-map.h>
#include <mach/mfp-pxa168.h>
#include <mach/pxa168.h>
#include <mach/irqs.h>
#include <video/pxa168fb.h>
#include <linux/input.h>
#include <linux/platform_data/keypad-pxa27x.h>
#include "addr-map.h"
#include "mfp-pxa168.h"
#include "pxa168.h"
#include "irqs.h"
#include "common.h"
static unsigned long common_pin_config[] __initdata = {
......
arch/arm/mach-mmp/avengers_lite.c
View file @ 8864eaca
......@@ -17,10 +17,10 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/addr-map.h>
#include <mach/mfp-pxa168.h>
#include <mach/pxa168.h>
#include <mach/irqs.h>
#include "addr-map.h"
#include "mfp-pxa168.h"
#include "pxa168.h"
#include "irqs.h"
#include "common.h"
......
arch/arm/mach-mmp/brownstone.c
View file @ 8864eaca
......@@ -22,10 +22,10 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/addr-map.h>
#include <mach/mfp-mmp2.h>
#include <mach/mmp2.h>
#include <mach/irqs.h>
#include "addr-map.h"
#include "mfp-mmp2.h"
#include "mmp2.h"
#include "irqs.h"
#include "common.h"
......
arch/arm/mach-mmp/clock-mmp2.c
View file @ 8864eaca
......@@ -4,8 +4,9 @@
#include <linux/list.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/clk/mmp.h>
#include <mach/addr-map.h>
#include "addr-map.h"
#include "common.h"
#include "clock.h"
......@@ -105,7 +106,8 @@ static struct clk_lookup mmp2_clkregs[] = {
INIT_CLKREG(&clk_sdh3, "sdhci-pxav3.3", "PXA-SDHCLK"),
};
void __init mmp2_clk_init(void)
void __init mmp2_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
phys_addr_t apbc_phys)
{
clkdev_add_table(ARRAY_AND_SIZE(mmp2_clkregs));
}
arch/arm/mach-mmp/clock-pxa168.c
View file @ 8864eaca
......@@ -4,8 +4,9 @@
#include <linux/list.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/clk/mmp.h>
#include <mach/addr-map.h>
#include "addr-map.h"
#include "common.h"
#include "clock.h"
......@@ -85,7 +86,8 @@ static struct clk_lookup pxa168_clkregs[] = {
INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
};
void __init pxa168_clk_init(void)
void __init pxa168_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
phys_addr_t apbc_phys)
{
clkdev_add_table(ARRAY_AND_SIZE(pxa168_clkregs));
}
arch/arm/mach-mmp/clock-pxa910.c
View file @ 8864eaca
......@@ -4,8 +4,9 @@
#include <linux/list.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/clk/mmp.h>
#include <mach/addr-map.h>
#include "addr-map.h"
#include "common.h"
#include "clock.h"
......@@ -61,7 +62,8 @@ static struct clk_lookup pxa910_clkregs[] = {
INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
};
void __init pxa910_clk_init(void)
void __init pxa910_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
phys_addr_t apbc_phys, phys_addr_t apbcp_phys)
{
clkdev_add_table(ARRAY_AND_SIZE(pxa910_clkregs));
}
arch/arm/mach-mmp/clock.c
View file @ 8864eaca
......@@ -13,7 +13,7 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <mach/regs-apbc.h>
#include "regs-apbc.h"
#include "clock.h"
static void apbc_clk_enable(struct clk *clk)
......
arch/arm/mach-mmp/clock.h
View file @ 8864eaca
/*
* linux/arch/arm/mach-mmp/clock.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
......
arch/arm/mach-mmp/common.c
View file @ 8864eaca
......@@ -15,8 +15,8 @@
#include <asm/page.h>
#include <asm/mach/map.h>
#include <asm/system_misc.h>
#include <mach/addr-map.h>
#include <mach/cputype.h>
#include "addr-map.h"
#include "cputype.h"
#include "common.h"
......
arch/arm/mach-mmp/common.h
View file @ 8864eaca
......@@ -5,6 +5,3 @@ extern void timer_init(int irq);
extern void __init mmp_map_io(void);
extern void mmp_restart(enum reboot_mode, const char *);
extern void __init pxa168_clk_init(void);
extern void __init pxa910_clk_init(void);
extern void __init mmp2_clk_init(void);
arch/arm/mach-mmp/devices.c
View file @ 8864eaca
......@@ -12,10 +12,10 @@
#include <linux/delay.h>
#include <asm/irq.h>
#include <mach/irqs.h>
#include <mach/devices.h>
#include <mach/cputype.h>
#include <mach/regs-usb.h>
#include "irqs.h"
#include "devices.h"
#include "cputype.h"
#include "regs-usb.h"
int __init pxa_register_device(struct pxa_device_desc *desc,
void *data, size_t size)
......@@ -73,6 +73,8 @@ int __init pxa_register_device(struct pxa_device_desc *desc,
}
#if IS_ENABLED(CONFIG_USB) || IS_ENABLED(CONFIG_USB_GADGET)
#if IS_ENABLED(CONFIG_USB_MV_UDC) || IS_ENABLED(CONFIG_USB_EHCI_MV)
#if IS_ENABLED(CONFIG_CPU_PXA910) || IS_ENABLED(CONFIG_CPU_PXA168)
/*****************************************************************************
* The registers read/write routines
......@@ -112,9 +114,6 @@ static void u2o_write(void __iomem *base, unsigned int offset,
readl_relaxed(base + offset);
}
#if IS_ENABLED(CONFIG_USB_MV_UDC) || IS_ENABLED(CONFIG_USB_EHCI_MV)
#if IS_ENABLED(CONFIG_CPU_PXA910) || IS_ENABLED(CONFIG_CPU_PXA168)
static DEFINE_MUTEX(phy_lock);
static int phy_init_cnt;
......
arch/arm/mach-mmp/flint.c
View file @ 8864eaca
......@@ -21,10 +21,10 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/addr-map.h>
#include <mach/mfp-mmp2.h>
#include <mach/mmp2.h>
#include <mach/irqs.h>
#include "addr-map.h"
#include "mfp-mmp2.h"
#include "mmp2.h"
#include "irqs.h"
#include "common.h"
......
arch/arm/mach-mmp/gplugd.c
View file @ 8864eaca
......@@ -16,9 +16,9 @@
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/irqs.h>
#include <mach/pxa168.h>
#include <mach/mfp-pxa168.h>
#include "irqs.h"
#include "pxa168.h"
#include "mfp-pxa168.h"
#include "common.h"
......
arch/arm/mach-mmp/include/mach/dma.h deleted 100644 → 0
View file @ fb4f0424
/*
* linux/arch/arm/mach-mmp/include/mach/dma.h
*/
#ifndef __ASM_MACH_DMA_H
#define __ASM_MACH_DMA_H
#include <mach/addr-map.h>
#define DMAC_REGS_VIRT (APB_VIRT_BASE + 0x00000)
#include <plat/dma.h>
#endif /* __ASM_MACH_DMA_H */
arch/arm/mach-mmp/include/mach/hardware.h deleted 100644 → 0
View file @ fb4f0424
#ifndef __ASM_MACH_HARDWARE_H
#define __ASM_MACH_HARDWARE_H
#endif /* __ASM_MACH_HARDWARE_H */
arch/arm/mach-mmp/include/mach/regs-smc.h deleted 100644 → 0
View file @ fb4f0424
/*
* linux/arch/arm/mach-mmp/include/mach/regs-smc.h
*
* Static Memory Controller Registers
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_MACH_REGS_SMC_H
#define __ASM_MACH_REGS_SMC_H
#include <mach/addr-map.h>
#define SMC_VIRT_BASE (AXI_VIRT_BASE + 0x83800)
#define SMC_REG(x) (SMC_VIRT_BASE + (x))
#define SMC_MSC0 SMC_REG(0x0020)
#define SMC_MSC1 SMC_REG(0x0024)
#define SMC_SXCNFG0 SMC_REG(0x0030)
#define SMC_SXCNFG1 SMC_REG(0x0034)
#define SMC_MEMCLKCFG SMC_REG(0x0068)
#define SMC_CSDFICFG0 SMC_REG(0x0090)
#define SMC_CSDFICFG1 SMC_REG(0x0094)
#define SMC_CLK_RET_DEL SMC_REG(0x00b0)
#define SMC_ADV_RET_DEL SMC_REG(0x00b4)
#define SMC_CSADRMAP0 SMC_REG(0x00c0)
#define SMC_CSADRMAP1 SMC_REG(0x00c4)
#define SMC_WE_AP0 SMC_REG(0x00e0)
#define SMC_WE_AP1 SMC_REG(0x00e4)
#define SMC_OE_AP0 SMC_REG(0x00f0)
#define SMC_OE_AP1 SMC_REG(0x00f4)
#define SMC_ADV_AP0 SMC_REG(0x0100)
#define SMC_ADV_AP1 SMC_REG(0x0104)
#endif /* __ASM_MACH_REGS_SMC_H */
arch/arm/mach-mmp/include/mach/uncompress.h deleted 100644 → 0
View file @ fb4f0424
/*
* arch/arm/mach-mmp/include/mach/uncompress.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/serial_reg.h>
#include <mach/addr-map.h>
#include <asm/mach-types.h>
#define UART1_BASE (APB_PHYS_BASE + 0x36000)
#define UART2_BASE (APB_PHYS_BASE + 0x17000)
#define UART3_BASE (APB_PHYS_BASE + 0x18000)
volatile unsigned long *UART;
static inline void putc(char c)
{
/* UART enabled? */
if (!(UART[UART_IER] & UART_IER_UUE))
return;
while (!(UART[UART_LSR] & UART_LSR_THRE))
barrier();
UART[UART_TX] = c;
}
/*
* This does not append a newline
*/
static inline void flush(void)
{
}
static inline void arch_decomp_setup(void)
{
/* default to UART2 */
UART = (unsigned long *)UART2_BASE;
if (machine_is_avengers_lite())
UART = (unsigned long *)UART3_BASE;
}
arch/arm/mach-mmp/jasper.c
View file @ 8864eaca
......@@ -20,12 +20,12 @@
#include <linux/mfd/max8925.h>
#include <linux/interrupt.h>
#include <mach/irqs.h>
#include "irqs.h"
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/addr-map.h>
#include <mach/mfp-mmp2.h>
#include <mach/mmp2.h>
#include "addr-map.h"
#include "mfp-mmp2.h"
#include "mmp2.h"
#include "common.h"
......
arch/arm/mach-mmp/include/mach/mfp-mmp2.h → arch/arm/mach-mmp/mfp-mmp2.h
View file @ 8864eaca
#ifndef __ASM_MACH_MFP_MMP2_H
#define __ASM_MACH_MFP_MMP2_H
#include <mach/mfp.h>
#include "mfp.h"
#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
#define MFP_DRIVE_SLOW (0x2 << 13)
......
arch/arm/mach-mmp/include/mach/mfp-pxa168.h → arch/arm/mach-mmp/mfp-pxa168.h
View file @ 8864eaca
#ifndef __ASM_MACH_MFP_PXA168_H
#define __ASM_MACH_MFP_PXA168_H
#include <mach/mfp.h>
#include "mfp.h"
#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
#define MFP_DRIVE_SLOW (0x1 << 13)
......
arch/arm/mach-mmp/include/mach/mfp-pxa910.h → arch/arm/mach-mmp/mfp-pxa910.h
View file @ 8864eaca
#ifndef __ASM_MACH_MFP_PXA910_H
#define __ASM_MACH_MFP_PXA910_H
#include <mach/mfp.h>
#include "mfp.h"
#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
#define MFP_DRIVE_SLOW (0x2 << 13)
......
arch/arm/mach-mmp/mmp2.c
View file @ 8864eaca
......@@ -9,6 +9,7 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/clk/mmp.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
......@@ -20,15 +21,14 @@
#include <asm/hardware/cache-tauros2.h>
#include <asm/mach/time.h>
#include <mach/addr-map.h>
#include <mach/regs-apbc.h>
#include <mach/cputype.h>
#include <mach/irqs.h>
#include <mach/dma.h>
#include <mach/mfp.h>
#include <mach/devices.h>
#include <mach/mmp2.h>
#include <mach/pm-mmp2.h>
#include "addr-map.h"
#include "regs-apbc.h"
#include "cputype.h"
#include "irqs.h"
#include "mfp.h"
#include "devices.h"
#include "mmp2.h"
#include "pm-mmp2.h"
#include "common.h"
......@@ -110,8 +110,9 @@ static int __init mmp2_init(void)
#endif
mfp_init_base(MFPR_VIRT_BASE);
mfp_init_addr(mmp2_addr_map);
pxa_init_dma(IRQ_MMP2_DMA_RIQ, 16);
mmp2_clk_init();
mmp2_clk_init(APB_PHYS_BASE + 0x50000,
AXI_PHYS_BASE + 0x82800,
APB_PHYS_BASE + 0x15000);
}
return 0;
......
arch/arm/mach-mmp/include/mach/mmp2.h → arch/arm/mach-mmp/mmp2.h
View file @ 8864eaca
......@@ -10,9 +10,10 @@ extern void mmp2_clear_pmic_int(void);
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <mach/devices.h>
#include <linux/platform_data/dma-mmp_tdma.h>
#include "devices.h"
extern struct pxa_device_desc mmp2_device_uart1;
extern struct pxa_device_desc mmp2_device_uart2;
extern struct pxa_device_desc mmp2_device_uart3;
......
arch/arm/mach-mmp/pm-mmp2.c
View file @ 8864eaca
......@@ -18,12 +18,12 @@
#include <linux/io.h>
#include <linux/interrupt.h>
#include <asm/mach-types.h>
#include <mach/hardware.h>
#include <mach/cputype.h>
#include <mach/addr-map.h>
#include <mach/pm-mmp2.h>
#include <mach/regs-icu.h>
#include <mach/irqs.h>
#include "cputype.h"
#include "addr-map.h"
#include "pm-mmp2.h"
#include "regs-icu.h"
#include "irqs.h"
int mmp2_set_wake(struct irq_data *d, unsigned int on)
{
......
arch/arm/mach-mmp/include/mach/pm-mmp2.h → arch/arm/mach-mmp/pm-mmp2.h
View file @ 8864eaca
......@@ -11,7 +11,7 @@
#ifndef __MMP2_PM_H__
#define __MMP2_PM_H__
#include <mach/addr-map.h>
#include "addr-map.h"
#define APMU_PJ_IDLE_CFG APMU_REG(0x018)
#define APMU_PJ_IDLE_CFG_PJ_IDLE (1 << 1)
......
arch/arm/mach-mmp/pm-pxa910.c
View file @ 8864eaca
......@@ -19,12 +19,12 @@
#include <linux/irq.h>
#include <asm/mach-types.h>
#include <asm/outercache.h>
#include <mach/hardware.h>
#include <mach/cputype.h>
#include <mach/addr-map.h>
#include <mach/pm-pxa910.h>
#include <mach/regs-icu.h>
#include <mach/irqs.h>
#include "cputype.h"
#include "addr-map.h"
#include "pm-pxa910.h"
#include "regs-icu.h"
#include "irqs.h"
int pxa910_set_wake(struct irq_data *data, unsigned int on)
{
......
arch/arm/mach-mmp/pxa168.c
View file @ 8864eaca
......@@ -13,25 +13,25 @@
#include <linux/list.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/clk/mmp.h>
#include <linux/platform_device.h>
#include <linux/platform_data/mv_usb.h>
#include <linux/dma-mapping.h>
#include <asm/mach/time.h>
#include <asm/system_misc.h>
#include <mach/cputype.h>
#include <mach/addr-map.h>
#include <mach/regs-apbc.h>
#include <mach/regs-apmu.h>
#include <mach/irqs.h>
#include <mach/dma.h>
#include <mach/devices.h>
#include <mach/mfp.h>
#include <linux/dma-mapping.h>
#include <mach/pxa168.h>
#include <mach/regs-usb.h>
#include "common.h"
#include "addr-map.h"
#include "clock.h"
#include "common.h"
#include "cputype.h"
#include "devices.h"
#include "irqs.h"
#include "mfp.h"
#include "pxa168.h"
#include "regs-apbc.h"
#include "regs-apmu.h"
#include "regs-usb.h"
#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
......@@ -55,8 +55,9 @@ static int __init pxa168_init(void)
if (cpu_is_pxa168()) {
mfp_init_base(MFPR_VIRT_BASE);
mfp_init_addr(pxa168_mfp_addr_map);
pxa_init_dma(IRQ_PXA168_DMA_INT0, 32);
pxa168_clk_init();
pxa168_clk_init(APB_PHYS_BASE + 0x50000,
AXI_PHYS_BASE + 0x82800,
APB_PHYS_BASE + 0x15000);
}
return 0;
......
arch/arm/mach-mmp/include/mach/pxa168.h → arch/arm/mach-mmp/pxa168.h
View file @ 8864eaca
......@@ -11,14 +11,15 @@ extern void pxa168_clear_keypad_wakeup(void);
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <mach/devices.h>
#include <linux/platform_data/mtd-nand-pxa3xx.h>
#include <video/pxa168fb.h>
#include <linux/platform_data/keypad-pxa27x.h>
#include <mach/cputype.h>
#include <linux/pxa168_eth.h>
#include <linux/platform_data/mv_usb.h>
#include "devices.h"
#include "cputype.h"
extern struct pxa_device_desc pxa168_device_uart1;
extern struct pxa_device_desc pxa168_device_uart2;
extern struct pxa_device_desc pxa168_device_uart3;
......
arch/arm/mach-mmp/pxa910.c
View file @ 8864eaca
......@@ -7,6 +7,7 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/clk/mmp.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
......@@ -18,15 +19,14 @@
#include <asm/hardware/cache-tauros2.h>
#include <asm/mach/time.h>
#include <mach/addr-map.h>
#include <mach/regs-apbc.h>
#include <mach/cputype.h>
#include <mach/irqs.h>
#include <mach/dma.h>
#include <mach/mfp.h>
#include <mach/devices.h>
#include <mach/pm-pxa910.h>
#include <mach/pxa910.h>
#include "addr-map.h"
#include "regs-apbc.h"
#include "cputype.h"
#include "irqs.h"
#include "mfp.h"
#include "devices.h"
#include "pm-pxa910.h"
#include "pxa910.h"
#include "common.h"
......@@ -96,8 +96,10 @@ static int __init pxa910_init(void)
#endif
mfp_init_base(MFPR_VIRT_BASE);
mfp_init_addr(pxa910_mfp_addr_map);
pxa_init_dma(IRQ_PXA910_DMA_INT0, 32);
pxa910_clk_init();
pxa910_clk_init(APB_PHYS_BASE + 0x50000,
AXI_PHYS_BASE + 0x82800,
APB_PHYS_BASE + 0x15000,
APB_PHYS_BASE + 0x3b000);
}
return 0;
......
arch/arm/mach-mmp/include/mach/pxa910.h → arch/arm/mach-mmp/pxa910.h
View file @ 8864eaca
......@@ -7,10 +7,11 @@ extern void __init pxa910_init_irq(void);
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <mach/devices.h>
#include <linux/platform_data/mtd-nand-pxa3xx.h>
#include <video/mmp_disp.h>
#include "devices.h"
extern struct pxa_device_desc pxa910_device_uart1;
extern struct pxa_device_desc pxa910_device_uart2;
extern struct pxa_device_desc pxa910_device_twsi0;
......
arch/arm/mach-mmp/include/mach/regs-apbc.h → arch/arm/mach-mmp/regs-apbc.h
View file @ 8864eaca
/*
* linux/arch/arm/mach-mmp/include/mach/regs-apbc.h
*
* Application Peripheral Bus Clock Unit
*
* This program is free software; you can redistribute it and/or modify
......@@ -11,7 +9,7 @@
#ifndef __ASM_MACH_REGS_APBC_H
#define __ASM_MACH_REGS_APBC_H
#include <mach/addr-map.h>
#include "addr-map.h"
/* Common APB clock register bit definitions */
#define APBC_APBCLK (1 << 0) /* APB Bus Clock Enable */
......
arch/arm/mach-mmp/include/mach/regs-apmu.h → arch/arm/mach-mmp/regs-apmu.h
View file @ 8864eaca
/*
* linux/arch/arm/mach-mmp/include/mach/regs-apmu.h
*
* Application Subsystem Power Management Unit
*
* This program is free software; you can redistribute it and/or modify
......@@ -11,7 +9,7 @@
#ifndef __ASM_MACH_REGS_APMU_H
#define __ASM_MACH_REGS_APMU_H
#include <mach/addr-map.h>
#include "addr-map.h"
#define APMU_FNCLK_EN (1 << 4)
#define APMU_AXICLK_EN (1 << 3)
......
arch/arm/mach-mmp/include/mach/regs-icu.h → arch/arm/mach-mmp/regs-icu.h
View file @ 8864eaca
/*
* linux/arch/arm/mach-mmp/include/mach/regs-icu.h
*
* Interrupt Control Unit
*
* This program is free software; you can redistribute it and/or modify
......@@ -11,7 +9,7 @@
#ifndef __ASM_MACH_ICU_H
#define __ASM_MACH_ICU_H
#include <mach/addr-map.h>
#include "addr-map.h"
#define ICU_VIRT_BASE (AXI_VIRT_BASE + 0x82000)
#define ICU_REG(x) (ICU_VIRT_BASE + (x))
......
arch/arm/mach-mmp/include/mach/regs-timers.h → arch/arm/mach-mmp/regs-timers.h
View file @ 8864eaca
/*
* linux/arch/arm/mach-mmp/include/mach/regs-timers.h
*
* Timers Module
*
* This program is free software; you can redistribute it and/or modify
......@@ -11,7 +9,7 @@
#ifndef __ASM_MACH_REGS_TIMERS_H
#define __ASM_MACH_REGS_TIMERS_H
#include <mach/addr-map.h>
#include "addr-map.h"
#define TIMERS1_VIRT_BASE (APB_VIRT_BASE + 0x14000)
#define TIMERS2_VIRT_BASE (APB_VIRT_BASE + 0x16000)
......
arch/arm/mach-mmp/tavorevb.c
View file @ 8864eaca
......@@ -16,10 +16,10 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/addr-map.h>
#include <mach/mfp-pxa910.h>
#include <mach/pxa910.h>
#include <mach/irqs.h>
#include "addr-map.h"
#include "mfp-pxa910.h"
#include "pxa910.h"
#include "irqs.h"
#include "common.h"
......
arch/arm/mach-mmp/teton_bga.c
View file @ 8864eaca
......@@ -23,11 +23,11 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/addr-map.h>
#include <mach/mfp-pxa168.h>
#include <mach/pxa168.h>
#include <mach/teton_bga.h>
#include <mach/irqs.h>
#include "addr-map.h"
#include "mfp-pxa168.h"
#include "pxa168.h"
#include "teton_bga.h"
#include "irqs.h"
#include "common.h"
......
arch/arm/mach-mmp/include/mach/teton_bga.h → arch/arm/mach-mmp/teton_bga.h
View file @ 8864eaca
/*
* linux/arch/arm/mach-mmp/include/mach/teton_bga.h
*
* Support for the Marvell PXA168 Teton BGA Development Platform.
*
* This program is free software; you can redistribute it and/or modify
......
arch/arm/mach-mmp/time.c
View file @ 8864eaca
......@@ -29,14 +29,13 @@
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/sched_clock.h>
#include <mach/addr-map.h>
#include <mach/regs-timers.h>
#include <mach/regs-apbc.h>
#include <mach/irqs.h>
#include <mach/cputype.h>
#include <asm/mach/time.h>
#include "addr-map.h"
#include "regs-timers.h"
#include "regs-apbc.h"
#include "irqs.h"
#include "cputype.h"
#include "clock.h"
#ifdef CONFIG_CPU_MMP2
......
arch/arm/mach-mmp/ttc_dkb.c
View file @ 8864eaca
......@@ -26,11 +26,11 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <mach/addr-map.h>
#include <mach/mfp-pxa910.h>
#include <mach/pxa910.h>
#include <mach/irqs.h>
#include <mach/regs-usb.h>
#include "addr-map.h"
#include "mfp-pxa910.h"
#include "pxa910.h"
#include "irqs.h"
#include "regs-usb.h"
#include "common.h"
......
arch/arm/mm/idmap.c
View file @ 8864eaca
......@@ -86,7 +86,7 @@ static void identity_mapping_add(pgd_t *pgd, const char *text_start,
prot |= PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AF;
if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale_family())
prot |= PMD_BIT4;
pgd += pgd_index(addr);
......
arch/arm/mm/mmu.c
View file @ 8864eaca
......@@ -477,7 +477,7 @@ static void __init build_mem_type_table(void)
* "update-able on write" bit on ARM610). However, Xscale and
* Xscale3 require this bit to be cleared.
*/
if (cpu_is_xscale() || cpu_is_xsc3()) {
if (cpu_is_xscale_family()) {
for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
mem_types[i].prot_sect &= ~PMD_BIT4;
mem_types[i].prot_l1 &= ~PMD_BIT4;
......
arch/arm/mm/proc-mohawk.S
View file @ 8864eaca
......@@ -342,11 +342,13 @@ ENTRY(cpu_mohawk_switch_mm)
*/
.align 5
ENTRY(cpu_mohawk_set_pte_ext)
#ifdef CONFIG_MMU
armv3_set_pte_ext
mov r0, r0
mcr p15, 0, r0, c7, c10, 1 @ clean D entry
mcr p15, 0, r0, c7, c10, 4 @ drain WB
ret lr
#endif
.globl cpu_mohawk_suspend_size
.equ cpu_mohawk_suspend_size, 4 * 6
......
arch/arm/plat-pxa/Makefile
View file @ 8864eaca
#
# Makefile for code common across different PXA processor families
#
ccflags-$(CONFIG_ARCH_MMP) := -I$(srctree)/$(src)/include
obj-y := dma.o
obj-$(CONFIG_ARCH_PXA) := dma.o
obj-$(CONFIG_PXA3xx) += mfp.o
obj-$(CONFIG_ARCH_MMP) += mfp.o
......
arch/arm/plat-pxa/ssp.c
View file @ 8864eaca
......@@ -34,7 +34,6 @@
#include <linux/of_device.h>
#include <asm/irq.h>
#include <mach/hardware.h>
static DEFINE_MUTEX(ssp_lock);
static LIST_HEAD(ssp_list);
......
drivers/clk/mmp/clk-mmp2.c
View file @ 8864eaca
......@@ -9,6 +9,7 @@
* warranty of any kind, whether express or implied.
*/
#include <linux/clk.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/spinlock.h>
......@@ -16,8 +17,6 @@
#include <linux/delay.h>
#include <linux/err.h>
#include <mach/addr-map.h>
#include "clk.h"
#define APBC_RTC 0x0
......@@ -73,7 +72,8 @@ static const char *sdh_parent[] = {"pll1_4", "pll2", "usb_pll", "pll1"};
static const char *disp_parent[] = {"pll1", "pll1_16", "pll2", "vctcxo"};
static const char *ccic_parent[] = {"pll1_2", "pll1_16", "vctcxo"};
void __init mmp2_clk_init(void)
void __init mmp2_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
phys_addr_t apbc_phys)
{
struct clk *clk;
struct clk *vctcxo;
......@@ -81,19 +81,19 @@ void __init mmp2_clk_init(void)
void __iomem *apmu_base;
void __iomem *apbc_base;
mpmu_base = ioremap(APB_PHYS_BASE + 0x50000, SZ_4K);
mpmu_base = ioremap(mpmu_phys, SZ_4K);
if (mpmu_base == NULL) {
pr_err("error to ioremap MPMU base\n");
return;
}
apmu_base = ioremap(AXI_PHYS_BASE + 0x82800, SZ_4K);
apmu_base = ioremap(apmu_phys, SZ_4K);
if (apmu_base == NULL) {
pr_err("error to ioremap APMU base\n");
return;
}
apbc_base = ioremap(APB_PHYS_BASE + 0x15000, SZ_4K);
apbc_base = ioremap(apbc_phys, SZ_4K);
if (apbc_base == NULL) {
pr_err("error to ioremap APBC base\n");
return;
......
drivers/clk/mmp/clk-pxa168.c
View file @ 8864eaca
......@@ -9,6 +9,7 @@
* warranty of any kind, whether express or implied.
*/
#include <linux/clk.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/spinlock.h>
......@@ -16,8 +17,6 @@
#include <linux/delay.h>
#include <linux/err.h>
#include <mach/addr-map.h>
#include "clk.h"
#define APBC_RTC 0x28
......@@ -66,7 +65,8 @@ static const char *disp_parent[] = {"pll1_2", "pll1_12"};
static const char *ccic_parent[] = {"pll1_2", "pll1_12"};
static const char *ccic_phy_parent[] = {"pll1_6", "pll1_12"};
void __init pxa168_clk_init(void)
void __init pxa168_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
phys_addr_t apbc_phys)
{
struct clk *clk;
struct clk *uart_pll;
......@@ -74,19 +74,19 @@ void __init pxa168_clk_init(void)
void __iomem *apmu_base;
void __iomem *apbc_base;
mpmu_base = ioremap(APB_PHYS_BASE + 0x50000, SZ_4K);
mpmu_base = ioremap(mpmu_phys, SZ_4K);
if (mpmu_base == NULL) {
pr_err("error to ioremap MPMU base\n");
return;
}
apmu_base = ioremap(AXI_PHYS_BASE + 0x82800, SZ_4K);
apmu_base = ioremap(apmu_phys, SZ_4K);
if (apmu_base == NULL) {
pr_err("error to ioremap APMU base\n");
return;
}
apbc_base = ioremap(APB_PHYS_BASE + 0x15000, SZ_4K);
apbc_base = ioremap(apbc_phys, SZ_4K);
if (apbc_base == NULL) {
pr_err("error to ioremap APBC base\n");
return;
......
drivers/clk/mmp/clk-pxa910.c
View file @ 8864eaca
......@@ -9,6 +9,7 @@
* warranty of any kind, whether express or implied.
*/
#include <linux/clk.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/spinlock.h>
......@@ -16,8 +17,6 @@
#include <linux/delay.h>
#include <linux/err.h>
#include <mach/addr-map.h>
#include "clk.h"
#define APBC_RTC 0x28
......@@ -64,7 +63,8 @@ static const char *disp_parent[] = {"pll1_2", "pll1_12"};
static const char *ccic_parent[] = {"pll1_2", "pll1_12"};
static const char *ccic_phy_parent[] = {"pll1_6", "pll1_12"};
void __init pxa910_clk_init(void)
void __init pxa910_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
phys_addr_t apbc_phys, phys_addr_t apbcp_phys)
{
struct clk *clk;
struct clk *uart_pll;
......@@ -73,25 +73,25 @@ void __init pxa910_clk_init(void)
void __iomem *apbcp_base;
void __iomem *apbc_base;
mpmu_base = ioremap(APB_PHYS_BASE + 0x50000, SZ_4K);
mpmu_base = ioremap(mpmu_phys, SZ_4K);
if (mpmu_base == NULL) {
pr_err("error to ioremap MPMU base\n");
return;
}
apmu_base = ioremap(AXI_PHYS_BASE + 0x82800, SZ_4K);
apmu_base = ioremap(apmu_phys, SZ_4K);
if (apmu_base == NULL) {
pr_err("error to ioremap APMU base\n");
return;
}
apbcp_base = ioremap(APB_PHYS_BASE + 0x3b000, SZ_4K);
apbcp_base = ioremap(apbcp_phys, SZ_4K);
if (apbcp_base == NULL) {
pr_err("error to ioremap APBC extension base\n");
return;
}
apbc_base = ioremap(APB_PHYS_BASE + 0x15000, SZ_4K);
apbc_base = ioremap(apbc_phys, SZ_4K);
if (apbc_base == NULL) {
pr_err("error to ioremap APBC base\n");
return;
......
include/linux/clk/mmp.h 0 → 100644
View file @ 8864eaca
#ifndef __CLK_MMP_H
#define __CLK_MMP_H
#include <linux/types.h>
extern void pxa168_clk_init(phys_addr_t mpmu_phys,
phys_addr_t apmu_phys,
phys_addr_t apbc_phys);
extern void pxa910_clk_init(phys_addr_t mpmu_phys,
phys_addr_t apmu_phys,
phys_addr_t apbc_phys,
phys_addr_t apbcp_phys);
extern void mmp2_clk_init(phys_addr_t mpmu_phys,
phys_addr_t apmu_phys,
phys_addr_t apbc_phys);
#endif
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