Commit 88d81c86 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'renesas-dts-for-v6.11-tag1' of...

Merge tag 'renesas-dts-for-v6.11-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.11

  - Add support for the second and third Ethernet interfaces on the
    White Hawk development board,
  - Add support for the second Ethernet interface on the RZ/N1 SoC,
  - Add I2C EEPROM support for the Condor-I development board,
  - Add video capture support for the R-Car V4M SoC,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v6.11-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: r8a779h0: Add video capture nodes
  arm64: dts: renesas: r9a08g045: Update fallback string for SDHI nodes
  arm64: dts: renesas: rzg2l: Update fallback string for SDHI nodes
  arm64: dts: renesas: r9a09g011: Update fallback string for SDHI nodes
  arm64: dts: renesas: s4sk: Add aliases for I2C buses
  arm64: dts: renesas: spider-cpu: Add aliases for I2C buses
  arm64: dts: renesas: white-hawk-cpu: Add aliases for I2C buses
  arm64: dts: renesas: condor-i: Add I2C EEPROM
  arm64: dts: renesas: gray-hawk-single: Add aliases for I2C buses
  ARM: dts: renesas: r9a06g032: Describe GMAC1
  arm64: dts: renesas: white-hawk: ethernet: Describe AVB1 and AVB2
  arm64: dts: renesas: r8a779g0: Use MDIO node for all AVB devices

Link: https://lore.kernel.org/r/cover.1718355312.git.geert+renesas@glider.beSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents f2661062 2bb78d9f
......@@ -316,6 +316,24 @@ dma1: dma-controller@40105000 {
data-width = <8>;
};
gmac1: ethernet@44000000 {
compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
reg = <0x44000000 0x2000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
clocks = <&sysctrl R9A06G032_HCLK_GMAC0>;
clock-names = "stmmaceth";
power-domains = <&sysctrl>;
snps,multicast-filter-bins = <256>;
snps,perfect-filter-entries = <128>;
tx-fifo-depth = <2048>;
rx-fifo-depth = <4096>;
pcs-handle = <&mii_conv1>;
status = "disabled";
};
gmac2: ethernet@44002000 {
compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
reg = <0x44002000 0x2000>;
......
......@@ -227,6 +227,12 @@ adv7511_out: endpoint {
};
};
};
eeprom@50 {
compatible = "rohm,br24t01", "atmel,24c01";
reg = <0x50>;
pagesize = <8>;
};
};
&i2c1 {
......
......@@ -14,11 +14,3 @@ / {
model = "Renesas Condor board based on r8a77980";
compatible = "renesas,condor", "renesas,r8a77980";
};
&i2c0 {
eeprom@50 {
compatible = "rohm,br24t01", "atmel,24c01";
reg = <0x50>;
pagesize = <8>;
};
};
......@@ -15,6 +15,12 @@ / {
compatible = "renesas,spider-cpu", "renesas,r8a779f0";
aliases {
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
serial0 = &hscif0;
serial1 = &scif0;
};
......
......@@ -14,6 +14,12 @@ / {
compatible = "renesas,s4sk", "renesas,r8a779f4", "renesas,r8a779f0";
aliases {
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
serial0 = &hscif0;
serial1 = &hscif1;
ethernet0 = &rswitch;
......
......@@ -815,8 +815,6 @@ avb0: ethernet@e6800000 {
phy-mode = "rgmii";
rx-internal-delay-ps = <0>;
tx-internal-delay-ps = <0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
......@@ -862,8 +860,6 @@ avb1: ethernet@e6810000 {
phy-mode = "rgmii";
rx-internal-delay-ps = <0>;
tx-internal-delay-ps = <0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
......@@ -909,8 +905,6 @@ avb2: ethernet@e6820000 {
phy-mode = "rgmii";
rx-internal-delay-ps = <0>;
tx-internal-delay-ps = <0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
......
......@@ -17,6 +17,10 @@ / {
compatible = "renesas,gray-hawk-single", "renesas,r8a779h0";
aliases {
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
serial0 = &hscif0;
serial1 = &hscif2;
ethernet0 = &avb0;
......
......@@ -939,6 +939,454 @@ msiof5: spi@e6c28000 {
status = "disabled";
};
vin00: video@e6ef0000 {
compatible = "renesas,vin-r8a779h0";
reg = <0 0xe6ef0000 0 0x1000>;
interrupts = <GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 730>;
power-domains = <&sysc R8A779H0_PD_C4>;
resets = <&cpg 730>;
renesas,id = <0>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
vin00isp0: endpoint@0 {
reg = <0>;
remote-endpoint = <&isp0vin00>;
};
};
};
};
vin01: video@e6ef1000 {
compatible = "renesas,vin-r8a779h0";
reg = <0 0xe6ef1000 0 0x1000>;
interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 731>;
power-domains = <&sysc R8A779H0_PD_C4>;
resets = <&cpg 731>;
renesas,id = <1>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
vin01isp0: endpoint@0 {
reg = <0>;
remote-endpoint = <&isp0vin01>;
};
};
};
};
vin02: video@e6ef2000 {
compatible = "renesas,vin-r8a779h0";
reg = <0 0xe6ef2000 0 0x1000>;
interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 800>;
power-domains = <&sysc R8A779H0_PD_C4>;
resets = <&cpg 800>;
renesas,id = <2>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
vin02isp0: endpoint@0 {
reg = <0>;
remote-endpoint = <&isp0vin02>;
};
};
};
};
vin03: video@e6ef3000 {
compatible = "renesas,vin-r8a779h0";
reg = <0 0xe6ef3000 0 0x1000>;
interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 801>;
power-domains = <&sysc R8A779H0_PD_C4>;
resets = <&cpg 801>;
renesas,id = <3>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
vin03isp0: endpoint@0 {
reg = <0>;
remote-endpoint = <&isp0vin03>;
};
};
};
};
vin04: video@e6ef4000 {
compatible = "renesas,vin-r8a779h0";
reg = <0 0xe6ef4000 0 0x1000>;
interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 802>;
power-domains = <&sysc R8A779H0_PD_C4>;
resets = <&cpg 802>;
renesas,id = <4>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
vin04isp0: endpoint@0 {
reg = <0>;
remote-endpoint = <&isp0vin04>;
};
};
};
};
vin05: video@e6ef5000 {
compatible = "renesas,vin-r8a779h0";
reg = <0 0xe6ef5000 0 0x1000>;
interrupts = <GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 803>;
power-domains = <&sysc R8A779H0_PD_C4>;
resets = <&cpg 803>;
renesas,id = <5>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
vin05isp0: endpoint@0 {
reg = <0>;
remote-endpoint = <&isp0vin05>;
};
};
};
};
vin06: video@e6ef6000 {
compatible = "renesas,vin-r8a779h0";
reg = <0 0xe6ef6000 0 0x1000>;
interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 804>;
power-domains = <&sysc R8A779H0_PD_C4>;
resets = <&cpg 804>;
renesas,id = <6>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
vin06isp0: endpoint@0 {
reg = <0>;
remote-endpoint = <&isp0vin06>;
};
};
};
};
vin07: video@e6ef7000 {
compatible = "renesas,vin-r8a779h0";
reg = <0 0xe6ef7000 0 0x1000>;
interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 805>;
power-domains = <&sysc R8A779H0_PD_C4>;
resets = <&cpg 805>;
renesas,id = <7>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
vin07isp0: endpoint@0 {
reg = <0>;
remote-endpoint = <&isp0vin07>;
};
};
};
};
vin08: video@e6ef8000 {
compatible = "renesas,vin-r8a779h0";
reg = <0 0xe6ef8000 0 0x1000>;
interrupts = <GIC_SPI 537 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 806>;
power-domains = <&sysc R8A779H0_PD_C4>;
resets = <&cpg 806>;
renesas,id = <8>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
vin08isp1: endpoint@1 {
reg = <1>;
remote-endpoint = <&isp1vin08>;
};
};
};
};
vin09: video@e6ef9000 {
compatible = "renesas,vin-r8a779h0";
reg = <0 0xe6ef9000 0 0x1000>;
interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 807>;
power-domains = <&sysc R8A779H0_PD_C4>;
resets = <&cpg 807>;
renesas,id = <9>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
vin09isp1: endpoint@1 {
reg = <1>;
remote-endpoint = <&isp1vin09>;
};
};
};
};
vin10: video@e6efa000 {
compatible = "renesas,vin-r8a779h0";
reg = <0 0xe6efa000 0 0x1000>;
interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 808>;
power-domains = <&sysc R8A779H0_PD_C4>;
resets = <&cpg 808>;
renesas,id = <10>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
vin10isp1: endpoint@1 {
reg = <1>;
remote-endpoint = <&isp1vin10>;
};
};
};
};
vin11: video@e6efb000 {
compatible = "renesas,vin-r8a779h0";
reg = <0 0xe6efb000 0 0x1000>;
interrupts = <GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 809>;
power-domains = <&sysc R8A779H0_PD_C4>;
resets = <&cpg 809>;
renesas,id = <11>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
vin11isp1: endpoint@1 {
reg = <1>;
remote-endpoint = <&isp1vin11>;
};
};
};
};
vin12: video@e6efc000 {
compatible = "renesas,vin-r8a779h0";
reg = <0 0xe6efc000 0 0x1000>;
interrupts = <GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 810>;
power-domains = <&sysc R8A779H0_PD_C4>;
resets = <&cpg 810>;
renesas,id = <12>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
vin12isp1: endpoint@1 {
reg = <1>;
remote-endpoint = <&isp1vin12>;
};
};
};
};
vin13: video@e6efd000 {
compatible = "renesas,vin-r8a779h0";
reg = <0 0xe6efd000 0 0x1000>;
interrupts = <GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 811>;
power-domains = <&sysc R8A779H0_PD_C4>;
resets = <&cpg 811>;
renesas,id = <13>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
vin13isp1: endpoint@1 {
reg = <1>;
remote-endpoint = <&isp1vin13>;
};
};
};
};
vin14: video@e6efe000 {
compatible = "renesas,vin-r8a779h0";
reg = <0 0xe6efe000 0 0x1000>;
interrupts = <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 812>;
power-domains = <&sysc R8A779H0_PD_C4>;
resets = <&cpg 812>;
renesas,id = <14>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
vin14isp1: endpoint@1 {
reg = <1>;
remote-endpoint = <&isp1vin14>;
};
};
};
};
vin15: video@e6eff000 {
compatible = "renesas,vin-r8a779h0";
reg = <0 0xe6eff000 0 0x1000>;
interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 813>;
power-domains = <&sysc R8A779H0_PD_C4>;
resets = <&cpg 813>;
renesas,id = <15>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
vin15isp1: endpoint@1 {
reg = <1>;
remote-endpoint = <&isp1vin15>;
};
};
};
};
dmac1: dma-controller@e7350000 {
compatible = "renesas,dmac-r8a779h0",
"renesas,rcar-gen4-dmac";
......@@ -1152,6 +1600,224 @@ gic: interrupt-controller@f1000000 {
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
};
csi40: csi2@fe500000 {
compatible = "renesas,r8a779h0-csi2";
reg = <0 0xfe500000 0 0x40000>;
interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 331>;
power-domains = <&sysc R8A779H0_PD_C4>;
resets = <&cpg 331>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
};
port@1 {
reg = <1>;
csi40isp0: endpoint {
remote-endpoint = <&isp0csi40>;
};
};
};
};
csi41: csi2@fe540000 {
compatible = "renesas,r8a779h0-csi2";
reg = <0 0xfe540000 0 0x40000>;
interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 400>;
power-domains = <&sysc R8A779H0_PD_C4>;
resets = <&cpg 400>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
};
port@1 {
reg = <1>;
csi41isp1: endpoint {
remote-endpoint = <&isp1csi41>;
};
};
};
};
isp0: isp@fed00000 {
compatible = "renesas,r8a779h0-isp";
reg = <0 0xfed00000 0 0x10000>;
interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_LOW>;
clocks = <&cpg CPG_MOD 612>;
power-domains = <&sysc R8A779H0_PD_A3ISP0>;
resets = <&cpg 612>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
isp0csi40: endpoint@0 {
reg = <0>;
remote-endpoint = <&csi40isp0>;
};
};
port@1 {
reg = <1>;
isp0vin00: endpoint {
remote-endpoint = <&vin00isp0>;
};
};
port@2 {
reg = <2>;
isp0vin01: endpoint {
remote-endpoint = <&vin01isp0>;
};
};
port@3 {
reg = <3>;
isp0vin02: endpoint {
remote-endpoint = <&vin02isp0>;
};
};
port@4 {
reg = <4>;
isp0vin03: endpoint {
remote-endpoint = <&vin03isp0>;
};
};
port@5 {
reg = <5>;
isp0vin04: endpoint {
remote-endpoint = <&vin04isp0>;
};
};
port@6 {
reg = <6>;
isp0vin05: endpoint {
remote-endpoint = <&vin05isp0>;
};
};
port@7 {
reg = <7>;
isp0vin06: endpoint {
remote-endpoint = <&vin06isp0>;
};
};
port@8 {
reg = <8>;
isp0vin07: endpoint {
remote-endpoint = <&vin07isp0>;
};
};
};
};
isp1: isp@fed20000 {
compatible = "renesas,r8a779h0-isp";
reg = <0 0xfed20000 0 0x10000>;
interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_LOW>;
clocks = <&cpg CPG_MOD 613>;
power-domains = <&sysc R8A779H0_PD_A3ISP0>;
resets = <&cpg 613>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
isp1csi41: endpoint@1 {
reg = <1>;
remote-endpoint = <&csi41isp1>;
};
};
port@1 {
reg = <1>;
isp1vin08: endpoint {
remote-endpoint = <&vin08isp1>;
};
};
port@2 {
reg = <2>;
isp1vin09: endpoint {
remote-endpoint = <&vin09isp1>;
};
};
port@3 {
reg = <3>;
isp1vin10: endpoint {
remote-endpoint = <&vin10isp1>;
};
};
port@4 {
reg = <4>;
isp1vin11: endpoint {
remote-endpoint = <&vin11isp1>;
};
};
port@5 {
reg = <5>;
isp1vin12: endpoint {
remote-endpoint = <&vin12isp1>;
};
};
port@6 {
reg = <6>;
isp1vin13: endpoint {
remote-endpoint = <&vin13isp1>;
};
};
port@7 {
reg = <7>;
isp1vin14: endpoint {
remote-endpoint = <&vin14isp1>;
};
};
port@8 {
reg = <8>;
isp1vin15: endpoint {
remote-endpoint = <&vin15isp1>;
};
};
};
};
prr: chipid@fff00044 {
compatible = "renesas,prr";
reg = <0 0xfff00044 0 4>;
......
......@@ -646,7 +646,7 @@ dmac: dma-controller@11820000 {
sdhi0: mmc@11c00000 {
compatible = "renesas,sdhi-r9a07g043",
"renesas,rcar-gen3-sdhi";
"renesas,rzg2l-sdhi";
reg = <0x0 0x11c00000 0 0x10000>;
interrupts = <SOC_PERIPHERAL_IRQ(104) IRQ_TYPE_LEVEL_HIGH>,
<SOC_PERIPHERAL_IRQ(105) IRQ_TYPE_LEVEL_HIGH>;
......@@ -662,7 +662,7 @@ sdhi0: mmc@11c00000 {
sdhi1: mmc@11c10000 {
compatible = "renesas,sdhi-r9a07g043",
"renesas,rcar-gen3-sdhi";
"renesas,rzg2l-sdhi";
reg = <0x0 0x11c10000 0 0x10000>;
interrupts = <SOC_PERIPHERAL_IRQ(106) IRQ_TYPE_LEVEL_HIGH>,
<SOC_PERIPHERAL_IRQ(107) IRQ_TYPE_LEVEL_HIGH>;
......
......@@ -1050,7 +1050,7 @@ gic: interrupt-controller@11900000 {
sdhi0: mmc@11c00000 {
compatible = "renesas,sdhi-r9a07g044",
"renesas,rcar-gen3-sdhi";
"renesas,rzg2l-sdhi";
reg = <0x0 0x11c00000 0 0x10000>;
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
......@@ -1066,7 +1066,7 @@ sdhi0: mmc@11c00000 {
sdhi1: mmc@11c10000 {
compatible = "renesas,sdhi-r9a07g044",
"renesas,rcar-gen3-sdhi";
"renesas,rzg2l-sdhi";
reg = <0x0 0x11c10000 0 0x10000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
......
......@@ -1058,7 +1058,7 @@ gic: interrupt-controller@11900000 {
sdhi0: mmc@11c00000 {
compatible = "renesas,sdhi-r9a07g054",
"renesas,rcar-gen3-sdhi";
"renesas,rzg2l-sdhi";
reg = <0x0 0x11c00000 0 0x10000>;
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
......@@ -1074,7 +1074,7 @@ sdhi0: mmc@11c00000 {
sdhi1: mmc@11c10000 {
compatible = "renesas,sdhi-r9a07g054",
"renesas,rcar-gen3-sdhi";
"renesas,rzg2l-sdhi";
reg = <0x0 0x11c10000 0 0x10000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
......
......@@ -182,7 +182,7 @@ irqc: interrupt-controller@11050000 {
};
sdhi0: mmc@11c00000 {
compatible = "renesas,sdhi-r9a08g045", "renesas,rcar-gen3-sdhi";
compatible = "renesas,sdhi-r9a08g045", "renesas,rzg2l-sdhi";
reg = <0x0 0x11c00000 0 0x10000>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
......@@ -197,7 +197,7 @@ sdhi0: mmc@11c00000 {
};
sdhi1: mmc@11c10000 {
compatible = "renesas,sdhi-r9a08g045", "renesas,rcar-gen3-sdhi";
compatible = "renesas,sdhi-r9a08g045", "renesas,rzg2l-sdhi";
reg = <0x0 0x11c10000 0 0x10000>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
......@@ -212,7 +212,7 @@ sdhi1: mmc@11c10000 {
};
sdhi2: mmc@11c20000 {
compatible = "renesas,sdhi-r9a08g045", "renesas,rcar-gen3-sdhi";
compatible = "renesas,sdhi-r9a08g045", "renesas,rzg2l-sdhi";
reg = <0x0 0x11c20000 0 0x10000>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
......
......@@ -71,7 +71,7 @@ gic: interrupt-controller@82010000 {
sdhi0: mmc@85000000 {
compatible = "renesas,sdhi-r9a09g011",
"renesas,rcar-gen3-sdhi";
"renesas,rzg2l-sdhi";
reg = <0x0 0x85000000 0 0x2000>;
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
......@@ -87,7 +87,7 @@ sdhi0: mmc@85000000 {
sdhi1: mmc@85010000 {
compatible = "renesas,sdhi-r9a09g011",
"renesas,rcar-gen3-sdhi";
"renesas,rzg2l-sdhi";
reg = <0x0 0x85010000 0 0x2000>;
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
......@@ -103,7 +103,7 @@ sdhi1: mmc@85010000 {
emmc: mmc@85020000 {
compatible = "renesas,sdhi-r9a09g011",
"renesas,rcar-gen3-sdhi";
"renesas,rzg2l-sdhi";
reg = <0x0 0x85020000 0 0x2000>;
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
......
......@@ -13,6 +13,12 @@
/ {
aliases {
ethernet0 = &avb0;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
serial0 = &hscif0;
};
......@@ -142,18 +148,23 @@ reg_3p3v: regulator-3p3v {
&avb0 {
pinctrl-0 = <&avb0_pins>;
pinctrl-names = "default";
phy-handle = <&phy0>;
phy-handle = <&avb0_phy>;
tx-internal-delay-ps = <2000>;
status = "okay";
phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id0022.1622",
"ethernet-phy-ieee802.3-c22";
rxc-skew-ps = <1500>;
reg = <0>;
interrupt-parent = <&gpio7>;
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
avb0_phy: ethernet-phy@0 {
compatible = "ethernet-phy-id0022.1622",
"ethernet-phy-ieee802.3-c22";
rxc-skew-ps = <1500>;
reg = <0>;
interrupt-parent = <&gpio7>;
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
};
};
};
......
......@@ -6,6 +6,57 @@
* Copyright (C) 2022 Glider bv
*/
/ {
aliases {
ethernet1 = &avb1;
ethernet2 = &avb2;
};
};
&avb1 {
pinctrl-0 = <&avb1_pins>;
pinctrl-names = "default";
phy-handle = <&avb1_phy>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
reset-gpios = <&gpio6 1 GPIO_ACTIVE_LOW>;
reset-post-delay-us = <4000>;
avb1_phy: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0>;
interrupt-parent = <&gpio6>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
};
};
};
&avb2 {
pinctrl-0 = <&avb2_pins>;
pinctrl-names = "default";
phy-handle = <&avb2_phy>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
reset-post-delay-us = <4000>;
avb2_phy: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0>;
interrupt-parent = <&gpio5>;
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
};
};
};
&i2c0 {
eeprom@53 {
compatible = "rohm,br24g01", "atmel,24c01";
......@@ -14,3 +65,55 @@ eeprom@53 {
pagesize = <8>;
};
};
&pfc {
avb1_pins: avb1 {
mux {
groups = "avb1_link", "avb1_mdio", "avb1_rgmii",
"avb1_txcrefclk";
function = "avb1";
};
mdio {
groups = "avb1_mdio";
drive-strength = <24>;
bias-disable;
};
rgmii {
groups = "avb1_rgmii";
drive-strength = <24>;
bias-disable;
};
link {
groups = "avb1_link";
bias-disable;
};
};
avb2_pins: avb2 {
mux {
groups = "avb2_link", "avb2_mdio", "avb2_rgmii",
"avb2_txcrefclk";
function = "avb2";
};
mdio {
groups = "avb2_mdio";
drive-strength = <24>;
bias-disable;
};
rgmii {
groups = "avb2_rgmii";
drive-strength = <24>;
bias-disable;
};
link {
groups = "avb2_link";
bias-disable;
};
};
};
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