Commit 8903821c authored by Tinghan Shen's avatar Tinghan Shen Committed by Matthias Brugger
parent 867477a5
......@@ -226,6 +226,17 @@ dsu-pmu {
<&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
};
dmic_codec: dmic-codec {
compatible = "dmic-codec";
num-channels = <2>;
wakeup-delay-ms = <50>;
};
sound: mt8195-sound {
mediatek,platform = <&afe>;
status = "disabled";
};
clk26m: oscillator-26m {
compatible = "fixed-clock";
#clock-cells = <0>;
......@@ -728,6 +739,53 @@ scp_adsp: clock-controller@10720000 {
#clock-cells = <1>;
};
afe: mt8195-afe-pcm@10890000 {
compatible = "mediatek,mt8195-audio";
reg = <0 0x10890000 0 0x10000>;
mediatek,topckgen = <&topckgen>;
power-domains = <&spm MT8195_POWER_DOMAIN_AUDIO>;
interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&clk26m>,
<&apmixedsys CLK_APMIXED_APLL1>,
<&apmixedsys CLK_APMIXED_APLL2>,
<&topckgen CLK_TOP_APLL12_DIV0>,
<&topckgen CLK_TOP_APLL12_DIV1>,
<&topckgen CLK_TOP_APLL12_DIV2>,
<&topckgen CLK_TOP_APLL12_DIV3>,
<&topckgen CLK_TOP_APLL12_DIV9>,
<&topckgen CLK_TOP_A1SYS_HP>,
<&topckgen CLK_TOP_AUD_INTBUS>,
<&topckgen CLK_TOP_AUDIO_H>,
<&topckgen CLK_TOP_AUDIO_LOCAL_BUS>,
<&topckgen CLK_TOP_DPTX_MCK>,
<&topckgen CLK_TOP_I2SO1_MCK>,
<&topckgen CLK_TOP_I2SO2_MCK>,
<&topckgen CLK_TOP_I2SI1_MCK>,
<&topckgen CLK_TOP_I2SI2_MCK>,
<&infracfg_ao CLK_INFRA_AO_AUDIO_26M_B>,
<&scp_adsp CLK_SCP_ADSP_AUDIODSP>;
clock-names = "clk26m",
"apll1_ck",
"apll2_ck",
"apll12_div0",
"apll12_div1",
"apll12_div2",
"apll12_div3",
"apll12_div9",
"a1sys_hp_sel",
"aud_intbus_sel",
"audio_h_sel",
"audio_local_bus_sel",
"dptx_m_sel",
"i2so1_m_sel",
"i2so2_m_sel",
"i2si1_m_sel",
"i2si2_m_sel",
"infra_ao_audio_26m_b",
"scp_adsp_audiodsp";
status = "disabled";
};
uart0: serial@11001100 {
compatible = "mediatek,mt8195-uart",
"mediatek,mt6577-uart";
......
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