Commit 89fe81c0 authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam Committed by Bjorn Andersson

arm64: dts: qcom: sc8280xp: Fix the PCI I/O port range

For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are
located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI addresses
(0x30200000, 0x32200000, 0x34200000, 0x38200000, 0x3c200000) specified in
the ranges property for I/O region.

Fixes: 813e8315 ("arm64: dts: qcom: sc8280xp/sa8540p: add PCIe2-4 nodes")
Reported-by: default avatarArnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230228164752.55682-11-manivannan.sadhasivam@linaro.org
parent cb3d6ab7
...@@ -1665,7 +1665,7 @@ pcie4: pcie@1c00000 { ...@@ -1665,7 +1665,7 @@ pcie4: pcie@1c00000 {
reg-names = "parf", "dbi", "elbi", "atu", "config"; reg-names = "parf", "dbi", "elbi", "atu", "config";
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
ranges = <0x01000000 0x0 0x30200000 0x0 0x30200000 0x0 0x100000>, ranges = <0x01000000 0x0 0x00000000 0x0 0x30200000 0x0 0x100000>,
<0x02000000 0x0 0x30300000 0x0 0x30300000 0x0 0x1d00000>; <0x02000000 0x0 0x30300000 0x0 0x30300000 0x0 0x1d00000>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
...@@ -1764,7 +1764,7 @@ pcie3b: pcie@1c08000 { ...@@ -1764,7 +1764,7 @@ pcie3b: pcie@1c08000 {
reg-names = "parf", "dbi", "elbi", "atu", "config"; reg-names = "parf", "dbi", "elbi", "atu", "config";
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
ranges = <0x01000000 0x0 0x32200000 0x0 0x32200000 0x0 0x100000>, ranges = <0x01000000 0x0 0x00000000 0x0 0x32200000 0x0 0x100000>,
<0x02000000 0x0 0x32300000 0x0 0x32300000 0x0 0x1d00000>; <0x02000000 0x0 0x32300000 0x0 0x32300000 0x0 0x1d00000>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
...@@ -1861,7 +1861,7 @@ pcie3a: pcie@1c10000 { ...@@ -1861,7 +1861,7 @@ pcie3a: pcie@1c10000 {
reg-names = "parf", "dbi", "elbi", "atu", "config"; reg-names = "parf", "dbi", "elbi", "atu", "config";
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
ranges = <0x01000000 0x0 0x34200000 0x0 0x34200000 0x0 0x100000>, ranges = <0x01000000 0x0 0x00000000 0x0 0x34200000 0x0 0x100000>,
<0x02000000 0x0 0x34300000 0x0 0x34300000 0x0 0x1d00000>; <0x02000000 0x0 0x34300000 0x0 0x34300000 0x0 0x1d00000>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
...@@ -1961,7 +1961,7 @@ pcie2b: pcie@1c18000 { ...@@ -1961,7 +1961,7 @@ pcie2b: pcie@1c18000 {
reg-names = "parf", "dbi", "elbi", "atu", "config"; reg-names = "parf", "dbi", "elbi", "atu", "config";
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
ranges = <0x01000000 0x0 0x38200000 0x0 0x38200000 0x0 0x100000>, ranges = <0x01000000 0x0 0x00000000 0x0 0x38200000 0x0 0x100000>,
<0x02000000 0x0 0x38300000 0x0 0x38300000 0x0 0x1d00000>; <0x02000000 0x0 0x38300000 0x0 0x38300000 0x0 0x1d00000>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
...@@ -2058,7 +2058,7 @@ pcie2a: pcie@1c20000 { ...@@ -2058,7 +2058,7 @@ pcie2a: pcie@1c20000 {
reg-names = "parf", "dbi", "elbi", "atu", "config"; reg-names = "parf", "dbi", "elbi", "atu", "config";
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
ranges = <0x01000000 0x0 0x3c200000 0x0 0x3c200000 0x0 0x100000>, ranges = <0x01000000 0x0 0x00000000 0x0 0x3c200000 0x0 0x100000>,
<0x02000000 0x0 0x3c300000 0x0 0x3c300000 0x0 0x1d00000>; <0x02000000 0x0 0x3c300000 0x0 0x3c300000 0x0 0x1d00000>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
......
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