Commit 8be586f7 authored by Linus Walleij's avatar Linus Walleij

Revert "pinctrl: tegra: Add support to display pin function"

This reverts commit d1cd5b51.

It was reported that some I2C3 functions stop working after this
patch, and it is just debug help so let's revert it and investigate.

Link: https://lore.kernel.org/linux-gpio/20230925183049.10a40546@booty/Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent c153a4ed
......@@ -96,7 +96,6 @@ static const struct cfg_param {
{"nvidia,slew-rate-falling", TEGRA_PINCONF_PARAM_SLEW_RATE_FALLING},
{"nvidia,slew-rate-rising", TEGRA_PINCONF_PARAM_SLEW_RATE_RISING},
{"nvidia,drive-type", TEGRA_PINCONF_PARAM_DRIVE_TYPE},
{"nvidia,function", TEGRA_PINCONF_PARAM_FUNCTION},
};
static int tegra_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
......@@ -471,12 +470,6 @@ static int tegra_pinconf_reg(struct tegra_pmx *pmx,
*bit = g->drvtype_bit;
*width = 2;
break;
case TEGRA_PINCONF_PARAM_FUNCTION:
*bank = g->mux_bank;
*reg = g->mux_reg;
*bit = g->mux_bit;
*width = 2;
break;
default:
dev_err(pmx->dev, "Invalid config param %04x\n", param);
return -ENOTSUPP;
......@@ -640,16 +633,8 @@ static void tegra_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
val >>= bit;
val &= (1 << width) - 1;
if (cfg_params[i].param == TEGRA_PINCONF_PARAM_FUNCTION) {
u8 idx = pmx->soc->groups[group].funcs[val];
seq_printf(s, "\n\t%s=%s",
strip_prefix(cfg_params[i].property),
pmx->functions[idx].name);
} else {
seq_printf(s, "\n\t%s=%u",
strip_prefix(cfg_params[i].property), val);
}
seq_printf(s, "\n\t%s=%u",
strip_prefix(cfg_params[i].property), val);
}
}
......
......@@ -54,8 +54,6 @@ enum tegra_pinconf_param {
TEGRA_PINCONF_PARAM_SLEW_RATE_RISING,
/* argument: Integer, range is HW-dependant */
TEGRA_PINCONF_PARAM_DRIVE_TYPE,
/* argument: pinmux settings */
TEGRA_PINCONF_PARAM_FUNCTION,
};
enum tegra_pinconf_pull {
......
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