Commit 8d11cfb0 authored by Vladimir Zapolskiy's avatar Vladimir Zapolskiy Committed by Vinod Koul

dmaengine: imx-sdma: Remove platform data header

Since commit 6c5f05a6 ("ARM: imx3: Remove imx3 soc_init()")
there are no more users of struct sdma_script_start_addrs outside
of the driver itself, thus let's move the struct declaration just
to the driver source code and remove the header file as unused one.
Signed-off-by: default avatarVladimir Zapolskiy <vz@mleia.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: default avatarFabio Estevam <festevam@gmail.com>
Link: https://lore.kernel.org/r/20210620191103.156626-1-vz@mleia.comSigned-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 72cce7dd
...@@ -35,7 +35,6 @@ ...@@ -35,7 +35,6 @@
#include <linux/workqueue.h> #include <linux/workqueue.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <linux/platform_data/dma-imx-sdma.h>
#include <linux/platform_data/dma-imx.h> #include <linux/platform_data/dma-imx.h>
#include <linux/regmap.h> #include <linux/regmap.h>
#include <linux/mfd/syscon.h> #include <linux/mfd/syscon.h>
...@@ -181,6 +180,61 @@ ...@@ -181,6 +180,61 @@
BIT(DMA_MEM_TO_DEV) | \ BIT(DMA_MEM_TO_DEV) | \
BIT(DMA_DEV_TO_DEV)) BIT(DMA_DEV_TO_DEV))
/**
* struct sdma_script_start_addrs - SDMA script start pointers
*
* start addresses of the different functions in the physical
* address space of the SDMA engine.
*/
struct sdma_script_start_addrs {
s32 ap_2_ap_addr;
s32 ap_2_bp_addr;
s32 ap_2_ap_fixed_addr;
s32 bp_2_ap_addr;
s32 loopback_on_dsp_side_addr;
s32 mcu_interrupt_only_addr;
s32 firi_2_per_addr;
s32 firi_2_mcu_addr;
s32 per_2_firi_addr;
s32 mcu_2_firi_addr;
s32 uart_2_per_addr;
s32 uart_2_mcu_addr;
s32 per_2_app_addr;
s32 mcu_2_app_addr;
s32 per_2_per_addr;
s32 uartsh_2_per_addr;
s32 uartsh_2_mcu_addr;
s32 per_2_shp_addr;
s32 mcu_2_shp_addr;
s32 ata_2_mcu_addr;
s32 mcu_2_ata_addr;
s32 app_2_per_addr;
s32 app_2_mcu_addr;
s32 shp_2_per_addr;
s32 shp_2_mcu_addr;
s32 mshc_2_mcu_addr;
s32 mcu_2_mshc_addr;
s32 spdif_2_mcu_addr;
s32 mcu_2_spdif_addr;
s32 asrc_2_mcu_addr;
s32 ext_mem_2_ipu_addr;
s32 descrambler_addr;
s32 dptc_dvfs_addr;
s32 utra_addr;
s32 ram_code_start_addr;
/* End of v1 array */
s32 mcu_2_ssish_addr;
s32 ssish_2_mcu_addr;
s32 hdmi_dma_addr;
/* End of v2 array */
s32 zcanfd_2_mcu_addr;
s32 zqspi_2_mcu_addr;
s32 mcu_2_ecspi_addr;
/* End of v3 array */
s32 mcu_2_zqspi_addr;
/* End of v4 array */
};
/* /*
* Mode/Count of data node descriptors - IPCv2 * Mode/Count of data node descriptors - IPCv2
*/ */
......
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __MACH_MXC_SDMA_H__
#define __MACH_MXC_SDMA_H__
/**
* struct sdma_script_start_addrs - SDMA script start pointers
*
* start addresses of the different functions in the physical
* address space of the SDMA engine.
*/
struct sdma_script_start_addrs {
s32 ap_2_ap_addr;
s32 ap_2_bp_addr;
s32 ap_2_ap_fixed_addr;
s32 bp_2_ap_addr;
s32 loopback_on_dsp_side_addr;
s32 mcu_interrupt_only_addr;
s32 firi_2_per_addr;
s32 firi_2_mcu_addr;
s32 per_2_firi_addr;
s32 mcu_2_firi_addr;
s32 uart_2_per_addr;
s32 uart_2_mcu_addr;
s32 per_2_app_addr;
s32 mcu_2_app_addr;
s32 per_2_per_addr;
s32 uartsh_2_per_addr;
s32 uartsh_2_mcu_addr;
s32 per_2_shp_addr;
s32 mcu_2_shp_addr;
s32 ata_2_mcu_addr;
s32 mcu_2_ata_addr;
s32 app_2_per_addr;
s32 app_2_mcu_addr;
s32 shp_2_per_addr;
s32 shp_2_mcu_addr;
s32 mshc_2_mcu_addr;
s32 mcu_2_mshc_addr;
s32 spdif_2_mcu_addr;
s32 mcu_2_spdif_addr;
s32 asrc_2_mcu_addr;
s32 ext_mem_2_ipu_addr;
s32 descrambler_addr;
s32 dptc_dvfs_addr;
s32 utra_addr;
s32 ram_code_start_addr;
/* End of v1 array */
s32 mcu_2_ssish_addr;
s32 ssish_2_mcu_addr;
s32 hdmi_dma_addr;
/* End of v2 array */
s32 zcanfd_2_mcu_addr;
s32 zqspi_2_mcu_addr;
s32 mcu_2_ecspi_addr;
/* End of v3 array */
s32 mcu_2_zqspi_addr;
/* End of v4 array */
};
#endif /* __MACH_MXC_SDMA_H__ */
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