Commit 8d33b055 authored by Bridge Wu's avatar Bridge Wu Committed by Russell King

[ARM] pxa: mmc: add 2nd host controller support for pxa3xx

This patch is to add the second mmc controller support for pxa3xx.
It's valid for pxa3[0|1|2]0.

On zylonite, the second controller has no slot.
Signed-off-by: default avatarBridge Wu <bridge.wu@marvell.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent fafc9d3f
...@@ -549,4 +549,44 @@ struct platform_device pxa3xx_device_ssp4 = { ...@@ -549,4 +549,44 @@ struct platform_device pxa3xx_device_ssp4 = {
.resource = pxa3xx_resource_ssp4, .resource = pxa3xx_resource_ssp4,
.num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4), .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
}; };
static struct resource pxa3xx_resources_mci2[] = {
[0] = {
.start = 0x42000000,
.end = 0x42000fff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_MMC2,
.end = IRQ_MMC2,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = 93,
.end = 93,
.flags = IORESOURCE_DMA,
},
[3] = {
.start = 94,
.end = 94,
.flags = IORESOURCE_DMA,
},
};
struct platform_device pxa3xx_device_mci2 = {
.name = "pxa2xx-mci",
.id = 1,
.dev = {
.dma_mask = &pxamci_dmamask,
.coherent_dma_mask = 0xffffffff,
},
.num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
.resource = pxa3xx_resources_mci2,
};
void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
{
pxa_register_device(&pxa3xx_device_mci2, info);
}
#endif /* CONFIG_PXA3xx */ #endif /* CONFIG_PXA3xx */
extern struct platform_device pxa_device_mci; extern struct platform_device pxa_device_mci;
extern struct platform_device pxa3xx_device_mci2;
extern struct platform_device pxa_device_udc; extern struct platform_device pxa_device_udc;
extern struct platform_device pxa_device_fb; extern struct platform_device pxa_device_fb;
extern struct platform_device pxa_device_ffuart; extern struct platform_device pxa_device_ffuart;
......
...@@ -196,6 +196,7 @@ static struct clk pxa3xx_clks[] = { ...@@ -196,6 +196,7 @@ static struct clk pxa3xx_clks[] = {
PXA3xx_CKEN("SSPCLK", SSP4, 13000000, 0, &pxa3xx_device_ssp4.dev), PXA3xx_CKEN("SSPCLK", SSP4, 13000000, 0, &pxa3xx_device_ssp4.dev),
PXA3xx_CKEN("MMCCLK", MMC1, 19500000, 0, &pxa_device_mci.dev), PXA3xx_CKEN("MMCCLK", MMC1, 19500000, 0, &pxa_device_mci.dev),
PXA3xx_CKEN("MMCCLK", MMC2, 19500000, 0, &pxa3xx_device_mci2.dev),
}; };
void __init pxa3xx_init_irq(void) void __init pxa3xx_init_irq(void)
......
...@@ -233,9 +233,15 @@ static struct pxamci_platform_data zylonite_mci_platform_data = { ...@@ -233,9 +233,15 @@ static struct pxamci_platform_data zylonite_mci_platform_data = {
.get_ro = zylonite_mci_ro, .get_ro = zylonite_mci_ro,
}; };
static struct pxamci_platform_data zylonite_mci2_platform_data = {
.detect_delay = 20,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
};
static void __init zylonite_init_mmc(void) static void __init zylonite_init_mmc(void)
{ {
pxa_set_mci_info(&zylonite_mci_platform_data); pxa_set_mci_info(&zylonite_mci_platform_data);
pxa3xx_set_mci2_info(&zylonite_mci2_platform_data);
} }
#else #else
static inline void zylonite_init_mmc(void) {} static inline void zylonite_init_mmc(void) {}
......
...@@ -97,6 +97,14 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = { ...@@ -97,6 +97,14 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = {
GPIO7_MMC1_CLK, GPIO7_MMC1_CLK,
GPIO8_MMC1_CMD, /* CMD0 for slot 0 */ GPIO8_MMC1_CMD, /* CMD0 for slot 0 */
GPIO15_GPIO, /* CMD1 default as GPIO for slot 0 */ GPIO15_GPIO, /* CMD1 default as GPIO for slot 0 */
/* MMC2 */
GPIO9_MMC2_DAT0,
GPIO10_MMC2_DAT1,
GPIO11_MMC2_DAT2,
GPIO12_MMC2_DAT3,
GPIO13_MMC2_CLK,
GPIO14_MMC2_CMD,
}; };
static mfp_cfg_t pxa300_mfp_cfg[] __initdata = { static mfp_cfg_t pxa300_mfp_cfg[] __initdata = {
......
...@@ -104,6 +104,14 @@ static mfp_cfg_t mfp_cfg[] __initdata = { ...@@ -104,6 +104,14 @@ static mfp_cfg_t mfp_cfg[] __initdata = {
GPIO22_MMC1_CLK, GPIO22_MMC1_CLK,
GPIO23_MMC1_CMD,/* CMD0 for slot 0 */ GPIO23_MMC1_CMD,/* CMD0 for slot 0 */
GPIO31_GPIO, /* CMD1 default as GPIO for slot 0 */ GPIO31_GPIO, /* CMD1 default as GPIO for slot 0 */
/* MMC2 */
GPIO24_MMC2_DAT0,
GPIO25_MMC2_DAT1,
GPIO26_MMC2_DAT2,
GPIO27_MMC2_DAT3,
GPIO28_MMC2_CLK,
GPIO29_MMC2_CMD,
}; };
#define NUM_LCD_DETECT_PINS 7 #define NUM_LCD_DETECT_PINS 7
......
...@@ -17,5 +17,6 @@ struct pxamci_platform_data { ...@@ -17,5 +17,6 @@ struct pxamci_platform_data {
}; };
extern void pxa_set_mci_info(struct pxamci_platform_data *info); extern void pxa_set_mci_info(struct pxamci_platform_data *info);
extern void pxa3xx_set_mci2_info(struct pxamci_platform_data *info);
#endif #endif
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