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Commit 8d5e33ad authored by Shannon Nelson's avatar Shannon Nelson Committed by Jeff Kirsher
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i40e: add more struct size checks 

Add struct size checks to many of the indirect structs and a few
command structs that were left out previously.

Change-ID: I7810b9af0f04e3ced670639f8671daf7df9b3f4d
Signed-off-by: default avatarShannon Nelson <shannon.nelson@intel.com>
Acked-by: default avatarGreg Rose <gregory.v.rose@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent b686ece5
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Showing with 86 additions and 0 deletions
drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h
View file @ 8d5e33ad
...@@ -456,6 +456,8 @@ struct i40e_aqc_arp_proxy_data { ...@@ -456,6 +456,8 @@ struct i40e_aqc_arp_proxy_data {
u8 mac_addr[6]; u8 mac_addr[6];
}; };
I40E_CHECK_STRUCT_LEN(0x14, i40e_aqc_arp_proxy_data);
/* Set NS Proxy Table Entry Command (indirect 0x0105) */ /* Set NS Proxy Table Entry Command (indirect 0x0105) */
struct i40e_aqc_ns_proxy_data { struct i40e_aqc_ns_proxy_data {
__le16 table_idx_mac_addr_0; __le16 table_idx_mac_addr_0;
...@@ -481,6 +483,8 @@ struct i40e_aqc_ns_proxy_data { ...@@ -481,6 +483,8 @@ struct i40e_aqc_ns_proxy_data {
u8 ipv6_addr_1[16]; u8 ipv6_addr_1[16];
}; };
I40E_CHECK_STRUCT_LEN(0x3c, i40e_aqc_ns_proxy_data);
/* Manage LAA Command (0x0106) - obsolete */ /* Manage LAA Command (0x0106) - obsolete */
struct i40e_aqc_mng_laa { struct i40e_aqc_mng_laa {
__le16 command_flags; __le16 command_flags;
...@@ -491,6 +495,8 @@ struct i40e_aqc_mng_laa { ...@@ -491,6 +495,8 @@ struct i40e_aqc_mng_laa {
u8 reserved2[6]; u8 reserved2[6];
}; };
I40E_CHECK_CMD_LENGTH(i40e_aqc_mng_laa);
/* Manage MAC Address Read Command (indirect 0x0107) */ /* Manage MAC Address Read Command (indirect 0x0107) */
struct i40e_aqc_mac_address_read { struct i40e_aqc_mac_address_read {
__le16 command_flags; __le16 command_flags;
...@@ -562,6 +568,8 @@ struct i40e_aqc_get_switch_config_header_resp { ...@@ -562,6 +568,8 @@ struct i40e_aqc_get_switch_config_header_resp {
u8 reserved[12]; u8 reserved[12];
}; };
I40E_CHECK_CMD_LENGTH(i40e_aqc_get_switch_config_header_resp);
struct i40e_aqc_switch_config_element_resp { struct i40e_aqc_switch_config_element_resp {
u8 element_type; u8 element_type;
#define I40E_AQ_SW_ELEM_TYPE_MAC 1 #define I40E_AQ_SW_ELEM_TYPE_MAC 1
...@@ -587,6 +595,8 @@ struct i40e_aqc_switch_config_element_resp { ...@@ -587,6 +595,8 @@ struct i40e_aqc_switch_config_element_resp {
__le16 element_info; __le16 element_info;
}; };
I40E_CHECK_STRUCT_LEN(0x10, i40e_aqc_switch_config_element_resp);
/* Get Switch Configuration (indirect 0x0200) /* Get Switch Configuration (indirect 0x0200)
* an array of elements are returned in the response buffer * an array of elements are returned in the response buffer
* the first in the array is the header, remainder are elements * the first in the array is the header, remainder are elements
...@@ -596,6 +606,8 @@ struct i40e_aqc_get_switch_config_resp { ...@@ -596,6 +606,8 @@ struct i40e_aqc_get_switch_config_resp {
struct i40e_aqc_switch_config_element_resp element[1]; struct i40e_aqc_switch_config_element_resp element[1];
}; };
I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_get_switch_config_resp);
/* Add Statistics (direct 0x0201) /* Add Statistics (direct 0x0201)
* Remove Statistics (direct 0x0202) * Remove Statistics (direct 0x0202)
*/ */
...@@ -661,6 +673,8 @@ struct i40e_aqc_switch_resource_alloc_element_resp { ...@@ -661,6 +673,8 @@ struct i40e_aqc_switch_resource_alloc_element_resp {
u8 reserved2[6]; u8 reserved2[6];
}; };
I40E_CHECK_STRUCT_LEN(0x10, i40e_aqc_switch_resource_alloc_element_resp);
/* Add VSI (indirect 0x0210) /* Add VSI (indirect 0x0210)
* this indirect command uses struct i40e_aqc_vsi_properties_data * this indirect command uses struct i40e_aqc_vsi_properties_data
* as the indirect buffer (128 bytes) * as the indirect buffer (128 bytes)
...@@ -1092,6 +1106,8 @@ struct i40e_aqc_remove_tag { ...@@ -1092,6 +1106,8 @@ struct i40e_aqc_remove_tag {
u8 reserved[12]; u8 reserved[12];
}; };
I40E_CHECK_CMD_LENGTH(i40e_aqc_remove_tag);
/* Add multicast E-Tag (direct 0x0257) /* Add multicast E-Tag (direct 0x0257)
* del multicast E-Tag (direct 0x0258) only uses pv_seid and etag fields * del multicast E-Tag (direct 0x0258) only uses pv_seid and etag fields
* and no external data * and no external data
...@@ -1359,6 +1375,8 @@ struct i40e_aqc_configure_vsi_ets_sla_bw_data { ...@@ -1359,6 +1375,8 @@ struct i40e_aqc_configure_vsi_ets_sla_bw_data {
u8 reserved1[28]; u8 reserved1[28];
}; };
I40E_CHECK_STRUCT_LEN(0x40, i40e_aqc_configure_vsi_ets_sla_bw_data);
/* Configure VSI Bandwidth Allocation per Traffic Type (indirect 0x0407) /* Configure VSI Bandwidth Allocation per Traffic Type (indirect 0x0407)
* responds with i40e_aqc_qs_handles_resp * responds with i40e_aqc_qs_handles_resp
*/ */
...@@ -1370,6 +1388,8 @@ struct i40e_aqc_configure_vsi_tc_bw_data { ...@@ -1370,6 +1388,8 @@ struct i40e_aqc_configure_vsi_tc_bw_data {
__le16 qs_handles[8]; __le16 qs_handles[8];
}; };
I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_configure_vsi_tc_bw_data);
/* Query vsi bw configuration (indirect 0x0408) */ /* Query vsi bw configuration (indirect 0x0408) */
struct i40e_aqc_query_vsi_bw_config_resp { struct i40e_aqc_query_vsi_bw_config_resp {
u8 tc_valid_bits; u8 tc_valid_bits;
...@@ -1383,6 +1403,8 @@ struct i40e_aqc_query_vsi_bw_config_resp { ...@@ -1383,6 +1403,8 @@ struct i40e_aqc_query_vsi_bw_config_resp {
u8 reserved3[23]; u8 reserved3[23];
}; };
I40E_CHECK_STRUCT_LEN(0x40, i40e_aqc_query_vsi_bw_config_resp);
/* Query VSI Bandwidth Allocation per Traffic Type (indirect 0x040A) */ /* Query VSI Bandwidth Allocation per Traffic Type (indirect 0x040A) */
struct i40e_aqc_query_vsi_ets_sla_config_resp { struct i40e_aqc_query_vsi_ets_sla_config_resp {
u8 tc_valid_bits; u8 tc_valid_bits;
...@@ -1394,6 +1416,8 @@ struct i40e_aqc_query_vsi_ets_sla_config_resp { ...@@ -1394,6 +1416,8 @@ struct i40e_aqc_query_vsi_ets_sla_config_resp {
__le16 tc_bw_max[2]; __le16 tc_bw_max[2];
}; };
I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_query_vsi_ets_sla_config_resp);
/* Configure Switching Component Bandwidth Limit (direct 0x0410) */ /* Configure Switching Component Bandwidth Limit (direct 0x0410) */
struct i40e_aqc_configure_switching_comp_bw_limit { struct i40e_aqc_configure_switching_comp_bw_limit {
__le16 seid; __le16 seid;
...@@ -1421,6 +1445,8 @@ struct i40e_aqc_configure_switching_comp_ets_data { ...@@ -1421,6 +1445,8 @@ struct i40e_aqc_configure_switching_comp_ets_data {
u8 reserved2[96]; u8 reserved2[96];
}; };
I40E_CHECK_STRUCT_LEN(0x80, i40e_aqc_configure_switching_comp_ets_data);
/* Configure Switching Component Bandwidth Limits per Tc (indirect 0x0416) */ /* Configure Switching Component Bandwidth Limits per Tc (indirect 0x0416) */
struct i40e_aqc_configure_switching_comp_ets_bw_limit_data { struct i40e_aqc_configure_switching_comp_ets_bw_limit_data {
u8 tc_valid_bits; u8 tc_valid_bits;
...@@ -1432,6 +1458,9 @@ struct i40e_aqc_configure_switching_comp_ets_bw_limit_data { ...@@ -1432,6 +1458,9 @@ struct i40e_aqc_configure_switching_comp_ets_bw_limit_data {
u8 reserved1[28]; u8 reserved1[28];
}; };
I40E_CHECK_STRUCT_LEN(0x40,
i40e_aqc_configure_switching_comp_ets_bw_limit_data);
/* Configure Switching Component Bandwidth Allocation per Tc /* Configure Switching Component Bandwidth Allocation per Tc
* (indirect 0x0417) * (indirect 0x0417)
*/ */
...@@ -1443,6 +1472,8 @@ struct i40e_aqc_configure_switching_comp_bw_config_data { ...@@ -1443,6 +1472,8 @@ struct i40e_aqc_configure_switching_comp_bw_config_data {
u8 reserved1[20]; u8 reserved1[20];
}; };
I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_configure_switching_comp_bw_config_data);
/* Query Switching Component Configuration (indirect 0x0418) */ /* Query Switching Component Configuration (indirect 0x0418) */
struct i40e_aqc_query_switching_comp_ets_config_resp { struct i40e_aqc_query_switching_comp_ets_config_resp {
u8 tc_valid_bits; u8 tc_valid_bits;
...@@ -1453,6 +1484,8 @@ struct i40e_aqc_query_switching_comp_ets_config_resp { ...@@ -1453,6 +1484,8 @@ struct i40e_aqc_query_switching_comp_ets_config_resp {
u8 reserved2[23]; u8 reserved2[23];
}; };
I40E_CHECK_STRUCT_LEN(0x40, i40e_aqc_query_switching_comp_ets_config_resp);
/* Query PhysicalPort ETS Configuration (indirect 0x0419) */ /* Query PhysicalPort ETS Configuration (indirect 0x0419) */
struct i40e_aqc_query_port_ets_config_resp { struct i40e_aqc_query_port_ets_config_resp {
u8 reserved[4]; u8 reserved[4];
...@@ -1468,6 +1501,8 @@ struct i40e_aqc_query_port_ets_config_resp { ...@@ -1468,6 +1501,8 @@ struct i40e_aqc_query_port_ets_config_resp {
u8 reserved3[32]; u8 reserved3[32];
}; };
I40E_CHECK_STRUCT_LEN(0x44, i40e_aqc_query_port_ets_config_resp);
/* Query Switching Component Bandwidth Allocation per Traffic Type /* Query Switching Component Bandwidth Allocation per Traffic Type
* (indirect 0x041A) * (indirect 0x041A)
*/ */
...@@ -1482,6 +1517,8 @@ struct i40e_aqc_query_switching_comp_bw_config_resp { ...@@ -1482,6 +1517,8 @@ struct i40e_aqc_query_switching_comp_bw_config_resp {
__le16 tc_bw_max[2]; __le16 tc_bw_max[2];
}; };
I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_query_switching_comp_bw_config_resp);
/* Suspend/resume port TX traffic /* Suspend/resume port TX traffic
* (direct 0x041B and 0x041C) uses the generic SEID struct * (direct 0x041B and 0x041C) uses the generic SEID struct
*/ */
...@@ -1495,6 +1532,8 @@ struct i40e_aqc_configure_partition_bw_data { ...@@ -1495,6 +1532,8 @@ struct i40e_aqc_configure_partition_bw_data {
u8 max_bw[16]; /* bandwidth limit */ u8 max_bw[16]; /* bandwidth limit */
}; };
I40E_CHECK_STRUCT_LEN(0x22, i40e_aqc_configure_partition_bw_data);
/* Get and set the active HMC resource profile and status. /* Get and set the active HMC resource profile and status.
* (direct 0x0500) and (direct 0x0501) * (direct 0x0500) and (direct 0x0501)
*/ */
...@@ -1577,6 +1616,8 @@ struct i40e_aqc_module_desc { ...@@ -1577,6 +1616,8 @@ struct i40e_aqc_module_desc {
u8 reserved2[8]; u8 reserved2[8];
}; };
I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_module_desc);
struct i40e_aq_get_phy_abilities_resp { struct i40e_aq_get_phy_abilities_resp {
__le32 phy_type; /* bitmap using the above enum for offsets */ __le32 phy_type; /* bitmap using the above enum for offsets */
u8 link_speed; /* bitmap using the above enum bit patterns */ u8 link_speed; /* bitmap using the above enum bit patterns */
...@@ -1605,6 +1646,8 @@ struct i40e_aq_get_phy_abilities_resp { ...@@ -1605,6 +1646,8 @@ struct i40e_aq_get_phy_abilities_resp {
struct i40e_aqc_module_desc qualified_module[I40E_AQ_PHY_MAX_QMS]; struct i40e_aqc_module_desc qualified_module[I40E_AQ_PHY_MAX_QMS];
}; };
I40E_CHECK_STRUCT_LEN(0x218, i40e_aq_get_phy_abilities_resp);
/* Set PHY Config (direct 0x0601) */ /* Set PHY Config (direct 0x0601) */
struct i40e_aq_set_phy_config { /* same bits as above in all */ struct i40e_aq_set_phy_config { /* same bits as above in all */
__le32 phy_type; __le32 phy_type;
......
drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h
View file @ 8d5e33ad
...@@ -456,6 +456,8 @@ struct i40e_aqc_arp_proxy_data { ...@@ -456,6 +456,8 @@ struct i40e_aqc_arp_proxy_data {
u8 mac_addr[6]; u8 mac_addr[6];
}; };
I40E_CHECK_STRUCT_LEN(0x14, i40e_aqc_arp_proxy_data);
/* Set NS Proxy Table Entry Command (indirect 0x0105) */ /* Set NS Proxy Table Entry Command (indirect 0x0105) */
struct i40e_aqc_ns_proxy_data { struct i40e_aqc_ns_proxy_data {
__le16 table_idx_mac_addr_0; __le16 table_idx_mac_addr_0;
...@@ -481,6 +483,8 @@ struct i40e_aqc_ns_proxy_data { ...@@ -481,6 +483,8 @@ struct i40e_aqc_ns_proxy_data {
u8 ipv6_addr_1[16]; u8 ipv6_addr_1[16];
}; };
I40E_CHECK_STRUCT_LEN(0x3c, i40e_aqc_ns_proxy_data);
/* Manage LAA Command (0x0106) - obsolete */ /* Manage LAA Command (0x0106) - obsolete */
struct i40e_aqc_mng_laa { struct i40e_aqc_mng_laa {
__le16 command_flags; __le16 command_flags;
...@@ -491,6 +495,8 @@ struct i40e_aqc_mng_laa { ...@@ -491,6 +495,8 @@ struct i40e_aqc_mng_laa {
u8 reserved2[6]; u8 reserved2[6];
}; };
I40E_CHECK_CMD_LENGTH(i40e_aqc_mng_laa);
/* Manage MAC Address Read Command (indirect 0x0107) */ /* Manage MAC Address Read Command (indirect 0x0107) */
struct i40e_aqc_mac_address_read { struct i40e_aqc_mac_address_read {
__le16 command_flags; __le16 command_flags;
...@@ -562,6 +568,8 @@ struct i40e_aqc_get_switch_config_header_resp { ...@@ -562,6 +568,8 @@ struct i40e_aqc_get_switch_config_header_resp {
u8 reserved[12]; u8 reserved[12];
}; };
I40E_CHECK_CMD_LENGTH(i40e_aqc_get_switch_config_header_resp);
struct i40e_aqc_switch_config_element_resp { struct i40e_aqc_switch_config_element_resp {
u8 element_type; u8 element_type;
#define I40E_AQ_SW_ELEM_TYPE_MAC 1 #define I40E_AQ_SW_ELEM_TYPE_MAC 1
...@@ -587,6 +595,8 @@ struct i40e_aqc_switch_config_element_resp { ...@@ -587,6 +595,8 @@ struct i40e_aqc_switch_config_element_resp {
__le16 element_info; __le16 element_info;
}; };
I40E_CHECK_STRUCT_LEN(0x10, i40e_aqc_switch_config_element_resp);
/* Get Switch Configuration (indirect 0x0200) /* Get Switch Configuration (indirect 0x0200)
* an array of elements are returned in the response buffer * an array of elements are returned in the response buffer
* the first in the array is the header, remainder are elements * the first in the array is the header, remainder are elements
...@@ -596,6 +606,8 @@ struct i40e_aqc_get_switch_config_resp { ...@@ -596,6 +606,8 @@ struct i40e_aqc_get_switch_config_resp {
struct i40e_aqc_switch_config_element_resp element[1]; struct i40e_aqc_switch_config_element_resp element[1];
}; };
I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_get_switch_config_resp);
/* Add Statistics (direct 0x0201) /* Add Statistics (direct 0x0201)
* Remove Statistics (direct 0x0202) * Remove Statistics (direct 0x0202)
*/ */
...@@ -661,6 +673,8 @@ struct i40e_aqc_switch_resource_alloc_element_resp { ...@@ -661,6 +673,8 @@ struct i40e_aqc_switch_resource_alloc_element_resp {
u8 reserved2[6]; u8 reserved2[6];
}; };
I40E_CHECK_STRUCT_LEN(0x10, i40e_aqc_switch_resource_alloc_element_resp);
/* Add VSI (indirect 0x0210) /* Add VSI (indirect 0x0210)
* this indirect command uses struct i40e_aqc_vsi_properties_data * this indirect command uses struct i40e_aqc_vsi_properties_data
* as the indirect buffer (128 bytes) * as the indirect buffer (128 bytes)
...@@ -1092,6 +1106,8 @@ struct i40e_aqc_remove_tag { ...@@ -1092,6 +1106,8 @@ struct i40e_aqc_remove_tag {
u8 reserved[12]; u8 reserved[12];
}; };
I40E_CHECK_CMD_LENGTH(i40e_aqc_remove_tag);
/* Add multicast E-Tag (direct 0x0257) /* Add multicast E-Tag (direct 0x0257)
* del multicast E-Tag (direct 0x0258) only uses pv_seid and etag fields * del multicast E-Tag (direct 0x0258) only uses pv_seid and etag fields
* and no external data * and no external data
...@@ -1359,6 +1375,8 @@ struct i40e_aqc_configure_vsi_ets_sla_bw_data { ...@@ -1359,6 +1375,8 @@ struct i40e_aqc_configure_vsi_ets_sla_bw_data {
u8 reserved1[28]; u8 reserved1[28];
}; };
I40E_CHECK_STRUCT_LEN(0x40, i40e_aqc_configure_vsi_ets_sla_bw_data);
/* Configure VSI Bandwidth Allocation per Traffic Type (indirect 0x0407) /* Configure VSI Bandwidth Allocation per Traffic Type (indirect 0x0407)
* responds with i40e_aqc_qs_handles_resp * responds with i40e_aqc_qs_handles_resp
*/ */
...@@ -1370,6 +1388,8 @@ struct i40e_aqc_configure_vsi_tc_bw_data { ...@@ -1370,6 +1388,8 @@ struct i40e_aqc_configure_vsi_tc_bw_data {
__le16 qs_handles[8]; __le16 qs_handles[8];
}; };
I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_configure_vsi_tc_bw_data);
/* Query vsi bw configuration (indirect 0x0408) */ /* Query vsi bw configuration (indirect 0x0408) */
struct i40e_aqc_query_vsi_bw_config_resp { struct i40e_aqc_query_vsi_bw_config_resp {
u8 tc_valid_bits; u8 tc_valid_bits;
...@@ -1383,6 +1403,8 @@ struct i40e_aqc_query_vsi_bw_config_resp { ...@@ -1383,6 +1403,8 @@ struct i40e_aqc_query_vsi_bw_config_resp {
u8 reserved3[23]; u8 reserved3[23];
}; };
I40E_CHECK_STRUCT_LEN(0x40, i40e_aqc_query_vsi_bw_config_resp);
/* Query VSI Bandwidth Allocation per Traffic Type (indirect 0x040A) */ /* Query VSI Bandwidth Allocation per Traffic Type (indirect 0x040A) */
struct i40e_aqc_query_vsi_ets_sla_config_resp { struct i40e_aqc_query_vsi_ets_sla_config_resp {
u8 tc_valid_bits; u8 tc_valid_bits;
...@@ -1394,6 +1416,8 @@ struct i40e_aqc_query_vsi_ets_sla_config_resp { ...@@ -1394,6 +1416,8 @@ struct i40e_aqc_query_vsi_ets_sla_config_resp {
__le16 tc_bw_max[2]; __le16 tc_bw_max[2];
}; };
I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_query_vsi_ets_sla_config_resp);
/* Configure Switching Component Bandwidth Limit (direct 0x0410) */ /* Configure Switching Component Bandwidth Limit (direct 0x0410) */
struct i40e_aqc_configure_switching_comp_bw_limit { struct i40e_aqc_configure_switching_comp_bw_limit {
__le16 seid; __le16 seid;
...@@ -1421,6 +1445,8 @@ struct i40e_aqc_configure_switching_comp_ets_data { ...@@ -1421,6 +1445,8 @@ struct i40e_aqc_configure_switching_comp_ets_data {
u8 reserved2[96]; u8 reserved2[96];
}; };
I40E_CHECK_STRUCT_LEN(0x80, i40e_aqc_configure_switching_comp_ets_data);
/* Configure Switching Component Bandwidth Limits per Tc (indirect 0x0416) */ /* Configure Switching Component Bandwidth Limits per Tc (indirect 0x0416) */
struct i40e_aqc_configure_switching_comp_ets_bw_limit_data { struct i40e_aqc_configure_switching_comp_ets_bw_limit_data {
u8 tc_valid_bits; u8 tc_valid_bits;
...@@ -1432,6 +1458,9 @@ struct i40e_aqc_configure_switching_comp_ets_bw_limit_data { ...@@ -1432,6 +1458,9 @@ struct i40e_aqc_configure_switching_comp_ets_bw_limit_data {
u8 reserved1[28]; u8 reserved1[28];
}; };
I40E_CHECK_STRUCT_LEN(0x40,
i40e_aqc_configure_switching_comp_ets_bw_limit_data);
/* Configure Switching Component Bandwidth Allocation per Tc /* Configure Switching Component Bandwidth Allocation per Tc
* (indirect 0x0417) * (indirect 0x0417)
*/ */
...@@ -1443,6 +1472,8 @@ struct i40e_aqc_configure_switching_comp_bw_config_data { ...@@ -1443,6 +1472,8 @@ struct i40e_aqc_configure_switching_comp_bw_config_data {
u8 reserved1[20]; u8 reserved1[20];
}; };
I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_configure_switching_comp_bw_config_data);
/* Query Switching Component Configuration (indirect 0x0418) */ /* Query Switching Component Configuration (indirect 0x0418) */
struct i40e_aqc_query_switching_comp_ets_config_resp { struct i40e_aqc_query_switching_comp_ets_config_resp {
u8 tc_valid_bits; u8 tc_valid_bits;
...@@ -1453,6 +1484,8 @@ struct i40e_aqc_query_switching_comp_ets_config_resp { ...@@ -1453,6 +1484,8 @@ struct i40e_aqc_query_switching_comp_ets_config_resp {
u8 reserved2[23]; u8 reserved2[23];
}; };
I40E_CHECK_STRUCT_LEN(0x40, i40e_aqc_query_switching_comp_ets_config_resp);
/* Query PhysicalPort ETS Configuration (indirect 0x0419) */ /* Query PhysicalPort ETS Configuration (indirect 0x0419) */
struct i40e_aqc_query_port_ets_config_resp { struct i40e_aqc_query_port_ets_config_resp {
u8 reserved[4]; u8 reserved[4];
...@@ -1468,6 +1501,8 @@ struct i40e_aqc_query_port_ets_config_resp { ...@@ -1468,6 +1501,8 @@ struct i40e_aqc_query_port_ets_config_resp {
u8 reserved3[32]; u8 reserved3[32];
}; };
I40E_CHECK_STRUCT_LEN(0x44, i40e_aqc_query_port_ets_config_resp);
/* Query Switching Component Bandwidth Allocation per Traffic Type /* Query Switching Component Bandwidth Allocation per Traffic Type
* (indirect 0x041A) * (indirect 0x041A)
*/ */
...@@ -1482,6 +1517,8 @@ struct i40e_aqc_query_switching_comp_bw_config_resp { ...@@ -1482,6 +1517,8 @@ struct i40e_aqc_query_switching_comp_bw_config_resp {
__le16 tc_bw_max[2]; __le16 tc_bw_max[2];
}; };
I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_query_switching_comp_bw_config_resp);
/* Suspend/resume port TX traffic /* Suspend/resume port TX traffic
* (direct 0x041B and 0x041C) uses the generic SEID struct * (direct 0x041B and 0x041C) uses the generic SEID struct
*/ */
...@@ -1495,6 +1532,8 @@ struct i40e_aqc_configure_partition_bw_data { ...@@ -1495,6 +1532,8 @@ struct i40e_aqc_configure_partition_bw_data {
u8 max_bw[16]; /* bandwidth limit */ u8 max_bw[16]; /* bandwidth limit */
}; };
I40E_CHECK_STRUCT_LEN(0x22, i40e_aqc_configure_partition_bw_data);
/* Get and set the active HMC resource profile and status. /* Get and set the active HMC resource profile and status.
* (direct 0x0500) and (direct 0x0501) * (direct 0x0500) and (direct 0x0501)
*/ */
...@@ -1577,6 +1616,8 @@ struct i40e_aqc_module_desc { ...@@ -1577,6 +1616,8 @@ struct i40e_aqc_module_desc {
u8 reserved2[8]; u8 reserved2[8];
}; };
I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_module_desc);
struct i40e_aq_get_phy_abilities_resp { struct i40e_aq_get_phy_abilities_resp {
__le32 phy_type; /* bitmap using the above enum for offsets */ __le32 phy_type; /* bitmap using the above enum for offsets */
u8 link_speed; /* bitmap using the above enum bit patterns */ u8 link_speed; /* bitmap using the above enum bit patterns */
...@@ -1605,6 +1646,8 @@ struct i40e_aq_get_phy_abilities_resp { ...@@ -1605,6 +1646,8 @@ struct i40e_aq_get_phy_abilities_resp {
struct i40e_aqc_module_desc qualified_module[I40E_AQ_PHY_MAX_QMS]; struct i40e_aqc_module_desc qualified_module[I40E_AQ_PHY_MAX_QMS];
}; };
I40E_CHECK_STRUCT_LEN(0x218, i40e_aq_get_phy_abilities_resp);
/* Set PHY Config (direct 0x0601) */ /* Set PHY Config (direct 0x0601) */
struct i40e_aq_set_phy_config { /* same bits as above in all */ struct i40e_aq_set_phy_config { /* same bits as above in all */
__le32 phy_type; __le32 phy_type;
......
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