Commit 8d6aa136 authored by Jiaxin Yu's avatar Jiaxin Yu Committed by Mark Brown

dt-bindings: medaitek: mt8183: add property "resets" && "reset-names"

This patch add property "resets" && "reset-names" in examples so that we can
use reset controller to reset audio domain regs.
Signed-off-by: default avatarJiaxin Yu <jiaxin.yu@mediatek.com>
Link: https://lore.kernel.org/r/1569580317-21181-4-git-send-email-jiaxin.yu@mediatek.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent cfc28ac1
...@@ -4,6 +4,10 @@ Required properties: ...@@ -4,6 +4,10 @@ Required properties:
- compatible = "mediatek,mt68183-audio"; - compatible = "mediatek,mt68183-audio";
- reg: register location and size - reg: register location and size
- interrupts: should contain AFE interrupt - interrupts: should contain AFE interrupt
- resets: Must contain an entry for each entry in reset-names
See ../reset/reset.txt for details.
- reset-names: should have these reset names:
"audiosys";
- power-domains: should define the power domain - power-domains: should define the power domain
- clocks: Must contain an entry for each entry in clock-names - clocks: Must contain an entry for each entry in clock-names
- clock-names: should have these clock names: - clock-names: should have these clock names:
...@@ -20,6 +24,8 @@ Example: ...@@ -20,6 +24,8 @@ Example:
compatible = "mediatek,mt8183-audio"; compatible = "mediatek,mt8183-audio";
reg = <0 0x11220000 0 0x1000>; reg = <0 0x11220000 0 0x1000>;
interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_LOW>; interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_LOW>;
resets = <&watchdog MT8183_TOPRGU_AUDIO_SW_RST>;
reset-names = "audiosys";
power-domains = <&scpsys MT8183_POWER_DOMAIN_AUDIO>; power-domains = <&scpsys MT8183_POWER_DOMAIN_AUDIO>;
clocks = <&infrasys CLK_INFRA_AUDIO>, clocks = <&infrasys CLK_INFRA_AUDIO>,
<&infrasys CLK_INFRA_AUDIO_26M_BCLK>, <&infrasys CLK_INFRA_AUDIO_26M_BCLK>,
......
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