Commit 8d81296c authored by Mahesh Salgaonkar's avatar Mahesh Salgaonkar Committed by Michael Ellerman

powerpc/radix: Remove trace_tlbie call from radix__flush_tlb_all

radix__flush_tlb_all() is called only in kexec path in real mode and any
tracepoints at this stage will make kexec to fail if enabled.

To verify enable tlbie trace before kexec.

$ echo 1 > /sys/kernel/debug/tracing/events/powerpc/tlbie/enable
== kexec into new kernel and kexec fails.

Fix this by not calling trace_tlbie from radix__flush_tlb_all().

Fixes: 0428491c ("powerpc/mm: Trace tlbie(l) instructions")
Cc: stable@vger.kernel.org # v4.13+
Signed-off-by: default avatarMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Acked-by: default avatarBalbir Singh <bsingharora@gmail.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 45baee14
...@@ -666,14 +666,12 @@ void radix__flush_tlb_all(void) ...@@ -666,14 +666,12 @@ void radix__flush_tlb_all(void)
*/ */
asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1) asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1)
: : "r"(rb), "i"(r), "i"(1), "i"(ric), "r"(rs) : "memory"); : : "r"(rb), "i"(r), "i"(1), "i"(ric), "r"(rs) : "memory");
trace_tlbie(0, 0, rb, rs, ric, prs, r);
/* /*
* now flush host entires by passing PRS = 0 and LPID == 0 * now flush host entires by passing PRS = 0 and LPID == 0
*/ */
asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1) asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1)
: : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(0) : "memory"); : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(0) : "memory");
asm volatile("eieio; tlbsync; ptesync": : :"memory"); asm volatile("eieio; tlbsync; ptesync": : :"memory");
trace_tlbie(0, 0, rb, 0, ric, prs, r);
} }
void radix__flush_tlb_pte_p9_dd1(unsigned long old_pte, struct mm_struct *mm, void radix__flush_tlb_pte_p9_dd1(unsigned long old_pte, struct mm_struct *mm,
......
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