Commit 8e1a2540 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'iommu-fixes-v3.12-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

Pull iommu fixes from Joerg Roedel:
 "A couple of fixes from the IOMMU side:

   - some small fixes for the new ARM-SMMU driver
   - a register offset correction for VT-d
   - add MAINTAINERS entry for drivers/iommu

  Overall no really big or intrusive changes"

* tag 'iommu-fixes-v3.12-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu:
  x86/iommu: correct ICS register offset
  MAINTAINERS: add overall IOMMU section
  iommu/arm-smmu: don't enable SMMU device until probing has completed
  iommu/arm-smmu: fix iommu_present() test in init
  iommu/arm-smmu: fix a signedness bug
parents 0d45dab6 82aeef0b
...@@ -4476,6 +4476,13 @@ L: linux-serial@vger.kernel.org ...@@ -4476,6 +4476,13 @@ L: linux-serial@vger.kernel.org
S: Maintained S: Maintained
F: drivers/tty/serial/ioc3_serial.c F: drivers/tty/serial/ioc3_serial.c
IOMMU DRIVERS
M: Joerg Roedel <joro@8bytes.org>
L: iommu@lists.linux-foundation.org
T: git git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
S: Maintained
F: drivers/iommu/
IP MASQUERADING IP MASQUERADING
M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar> M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar>
S: Maintained S: Maintained
......
...@@ -377,6 +377,7 @@ struct arm_smmu_cfg { ...@@ -377,6 +377,7 @@ struct arm_smmu_cfg {
u32 cbar; u32 cbar;
pgd_t *pgd; pgd_t *pgd;
}; };
#define INVALID_IRPTNDX 0xff
#define ARM_SMMU_CB_ASID(cfg) ((cfg)->cbndx) #define ARM_SMMU_CB_ASID(cfg) ((cfg)->cbndx)
#define ARM_SMMU_CB_VMID(cfg) ((cfg)->cbndx + 1) #define ARM_SMMU_CB_VMID(cfg) ((cfg)->cbndx + 1)
...@@ -840,7 +841,7 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, ...@@ -840,7 +841,7 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain,
if (IS_ERR_VALUE(ret)) { if (IS_ERR_VALUE(ret)) {
dev_err(smmu->dev, "failed to request context IRQ %d (%u)\n", dev_err(smmu->dev, "failed to request context IRQ %d (%u)\n",
root_cfg->irptndx, irq); root_cfg->irptndx, irq);
root_cfg->irptndx = -1; root_cfg->irptndx = INVALID_IRPTNDX;
goto out_free_context; goto out_free_context;
} }
...@@ -869,7 +870,7 @@ static void arm_smmu_destroy_domain_context(struct iommu_domain *domain) ...@@ -869,7 +870,7 @@ static void arm_smmu_destroy_domain_context(struct iommu_domain *domain)
writel_relaxed(0, cb_base + ARM_SMMU_CB_SCTLR); writel_relaxed(0, cb_base + ARM_SMMU_CB_SCTLR);
arm_smmu_tlb_inv_context(root_cfg); arm_smmu_tlb_inv_context(root_cfg);
if (root_cfg->irptndx != -1) { if (root_cfg->irptndx != INVALID_IRPTNDX) {
irq = smmu->irqs[smmu->num_global_irqs + root_cfg->irptndx]; irq = smmu->irqs[smmu->num_global_irqs + root_cfg->irptndx];
free_irq(irq, domain); free_irq(irq, domain);
} }
...@@ -1857,8 +1858,6 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev) ...@@ -1857,8 +1858,6 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev)
goto out_put_parent; goto out_put_parent;
} }
arm_smmu_device_reset(smmu);
for (i = 0; i < smmu->num_global_irqs; ++i) { for (i = 0; i < smmu->num_global_irqs; ++i) {
err = request_irq(smmu->irqs[i], err = request_irq(smmu->irqs[i],
arm_smmu_global_fault, arm_smmu_global_fault,
...@@ -1876,6 +1875,8 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev) ...@@ -1876,6 +1875,8 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev)
spin_lock(&arm_smmu_devices_lock); spin_lock(&arm_smmu_devices_lock);
list_add(&smmu->list, &arm_smmu_devices); list_add(&smmu->list, &arm_smmu_devices);
spin_unlock(&arm_smmu_devices_lock); spin_unlock(&arm_smmu_devices_lock);
arm_smmu_device_reset(smmu);
return 0; return 0;
out_free_irqs: out_free_irqs:
...@@ -1966,10 +1967,10 @@ static int __init arm_smmu_init(void) ...@@ -1966,10 +1967,10 @@ static int __init arm_smmu_init(void)
return ret; return ret;
/* Oh, for a proper bus abstraction */ /* Oh, for a proper bus abstraction */
if (!iommu_present(&platform_bus_type)); if (!iommu_present(&platform_bus_type))
bus_set_iommu(&platform_bus_type, &arm_smmu_ops); bus_set_iommu(&platform_bus_type, &arm_smmu_ops);
if (!iommu_present(&amba_bustype)); if (!iommu_present(&amba_bustype))
bus_set_iommu(&amba_bustype, &arm_smmu_ops); bus_set_iommu(&amba_bustype, &arm_smmu_ops);
return 0; return 0;
......
...@@ -55,7 +55,7 @@ ...@@ -55,7 +55,7 @@
#define DMAR_IQT_REG 0x88 /* Invalidation queue tail register */ #define DMAR_IQT_REG 0x88 /* Invalidation queue tail register */
#define DMAR_IQ_SHIFT 4 /* Invalidation queue head/tail shift */ #define DMAR_IQ_SHIFT 4 /* Invalidation queue head/tail shift */
#define DMAR_IQA_REG 0x90 /* Invalidation queue addr register */ #define DMAR_IQA_REG 0x90 /* Invalidation queue addr register */
#define DMAR_ICS_REG 0x98 /* Invalidation complete status register */ #define DMAR_ICS_REG 0x9c /* Invalidation complete status register */
#define DMAR_IRTA_REG 0xb8 /* Interrupt remapping table addr register */ #define DMAR_IRTA_REG 0xb8 /* Interrupt remapping table addr register */
#define OFFSET_STRIDE (9) #define OFFSET_STRIDE (9)
......
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